pxaficp_ir.c 20 KB

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  1. /*
  2. * linux/drivers/net/irda/pxaficp_ir.c
  3. *
  4. * Based on sa1100_ir.c by Russell King
  5. *
  6. * Changes copyright (C) 2003-2005 MontaVista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/init.h>
  18. #include <linux/errno.h>
  19. #include <linux/netdevice.h>
  20. #include <linux/slab.h>
  21. #include <linux/rtnetlink.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pm.h>
  26. #include <linux/clk.h>
  27. #include <net/irda/irda.h>
  28. #include <net/irda/irmod.h>
  29. #include <net/irda/wrapper.h>
  30. #include <net/irda/irda_device.h>
  31. #include <asm/irq.h>
  32. #include <asm/dma.h>
  33. #include <asm/delay.h>
  34. #include <asm/hardware.h>
  35. #include <asm/arch/irda.h>
  36. #include <asm/arch/pxa-regs.h>
  37. #ifdef CONFIG_MACH_MAINSTONE
  38. #include <asm/arch/mainstone.h>
  39. #endif
  40. #define IrSR_RXPL_NEG_IS_ZERO (1<<4)
  41. #define IrSR_RXPL_POS_IS_ZERO 0x0
  42. #define IrSR_TXPL_NEG_IS_ZERO (1<<3)
  43. #define IrSR_TXPL_POS_IS_ZERO 0x0
  44. #define IrSR_XMODE_PULSE_1_6 (1<<2)
  45. #define IrSR_XMODE_PULSE_3_16 0x0
  46. #define IrSR_RCVEIR_IR_MODE (1<<1)
  47. #define IrSR_RCVEIR_UART_MODE 0x0
  48. #define IrSR_XMITIR_IR_MODE (1<<0)
  49. #define IrSR_XMITIR_UART_MODE 0x0
  50. #define IrSR_IR_RECEIVE_ON (\
  51. IrSR_RXPL_NEG_IS_ZERO | \
  52. IrSR_TXPL_POS_IS_ZERO | \
  53. IrSR_XMODE_PULSE_3_16 | \
  54. IrSR_RCVEIR_IR_MODE | \
  55. IrSR_XMITIR_UART_MODE)
  56. #define IrSR_IR_TRANSMIT_ON (\
  57. IrSR_RXPL_NEG_IS_ZERO | \
  58. IrSR_TXPL_POS_IS_ZERO | \
  59. IrSR_XMODE_PULSE_3_16 | \
  60. IrSR_RCVEIR_UART_MODE | \
  61. IrSR_XMITIR_IR_MODE)
  62. struct pxa_irda {
  63. int speed;
  64. int newspeed;
  65. unsigned long last_oscr;
  66. unsigned char *dma_rx_buff;
  67. unsigned char *dma_tx_buff;
  68. dma_addr_t dma_rx_buff_phy;
  69. dma_addr_t dma_tx_buff_phy;
  70. unsigned int dma_tx_buff_len;
  71. int txdma;
  72. int rxdma;
  73. struct net_device_stats stats;
  74. struct irlap_cb *irlap;
  75. struct qos_info qos;
  76. iobuff_t tx_buff;
  77. iobuff_t rx_buff;
  78. struct device *dev;
  79. struct pxaficp_platform_data *pdata;
  80. struct clk *fir_clk;
  81. struct clk *sir_clk;
  82. struct clk *cur_clk;
  83. };
  84. static inline void pxa_irda_disable_clk(struct pxa_irda *si)
  85. {
  86. if (si->cur_clk)
  87. clk_disable(si->cur_clk);
  88. si->cur_clk = NULL;
  89. }
  90. static inline void pxa_irda_enable_firclk(struct pxa_irda *si)
  91. {
  92. si->cur_clk = si->fir_clk;
  93. clk_enable(si->fir_clk);
  94. }
  95. static inline void pxa_irda_enable_sirclk(struct pxa_irda *si)
  96. {
  97. si->cur_clk = si->sir_clk;
  98. clk_enable(si->sir_clk);
  99. }
  100. #define IS_FIR(si) ((si)->speed >= 4000000)
  101. #define IRDA_FRAME_SIZE_LIMIT 2047
  102. inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si)
  103. {
  104. DCSR(si->rxdma) = DCSR_NODESC;
  105. DSADR(si->rxdma) = __PREG(ICDR);
  106. DTADR(si->rxdma) = si->dma_rx_buff_phy;
  107. DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT;
  108. DCSR(si->rxdma) |= DCSR_RUN;
  109. }
  110. inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si)
  111. {
  112. DCSR(si->txdma) = DCSR_NODESC;
  113. DSADR(si->txdma) = si->dma_tx_buff_phy;
  114. DTADR(si->txdma) = __PREG(ICDR);
  115. DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len;
  116. DCSR(si->txdma) |= DCSR_RUN;
  117. }
  118. /*
  119. * Set the IrDA communications speed.
  120. */
  121. static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
  122. {
  123. unsigned long flags;
  124. unsigned int divisor;
  125. switch (speed) {
  126. case 9600: case 19200: case 38400:
  127. case 57600: case 115200:
  128. /* refer to PXA250/210 Developer's Manual 10-7 */
  129. /* BaudRate = 14.7456 MHz / (16*Divisor) */
  130. divisor = 14745600 / (16 * speed);
  131. local_irq_save(flags);
  132. if (IS_FIR(si)) {
  133. /* stop RX DMA */
  134. DCSR(si->rxdma) &= ~DCSR_RUN;
  135. /* disable FICP */
  136. ICCR0 = 0;
  137. pxa_irda_disable_clk(si);
  138. /* set board transceiver to SIR mode */
  139. si->pdata->transceiver_mode(si->dev, IR_SIRMODE);
  140. /* configure GPIO46/47 */
  141. pxa_gpio_mode(GPIO46_STRXD_MD);
  142. pxa_gpio_mode(GPIO47_STTXD_MD);
  143. /* enable the STUART clock */
  144. pxa_irda_enable_sirclk(si);
  145. }
  146. /* disable STUART first */
  147. STIER = 0;
  148. /* access DLL & DLH */
  149. STLCR |= LCR_DLAB;
  150. STDLL = divisor & 0xff;
  151. STDLH = divisor >> 8;
  152. STLCR &= ~LCR_DLAB;
  153. si->speed = speed;
  154. STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
  155. STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
  156. local_irq_restore(flags);
  157. break;
  158. case 4000000:
  159. local_irq_save(flags);
  160. /* disable STUART */
  161. STIER = 0;
  162. STISR = 0;
  163. pxa_irda_disable_clk(si);
  164. /* disable FICP first */
  165. ICCR0 = 0;
  166. /* set board transceiver to FIR mode */
  167. si->pdata->transceiver_mode(si->dev, IR_FIRMODE);
  168. /* configure GPIO46/47 */
  169. pxa_gpio_mode(GPIO46_ICPRXD_MD);
  170. pxa_gpio_mode(GPIO47_ICPTXD_MD);
  171. /* enable the FICP clock */
  172. pxa_irda_enable_firclk(si);
  173. si->speed = speed;
  174. pxa_irda_fir_dma_rx_start(si);
  175. ICCR0 = ICCR0_ITR | ICCR0_RXE;
  176. local_irq_restore(flags);
  177. break;
  178. default:
  179. return -EINVAL;
  180. }
  181. return 0;
  182. }
  183. /* SIR interrupt service routine. */
  184. static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id)
  185. {
  186. struct net_device *dev = dev_id;
  187. struct pxa_irda *si = netdev_priv(dev);
  188. int iir, lsr, data;
  189. iir = STIIR;
  190. switch (iir & 0x0F) {
  191. case 0x06: /* Receiver Line Status */
  192. lsr = STLSR;
  193. while (lsr & LSR_FIFOE) {
  194. data = STRBR;
  195. if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) {
  196. printk(KERN_DEBUG "pxa_ir: sir receiving error\n");
  197. si->stats.rx_errors++;
  198. if (lsr & LSR_FE)
  199. si->stats.rx_frame_errors++;
  200. if (lsr & LSR_OE)
  201. si->stats.rx_fifo_errors++;
  202. } else {
  203. si->stats.rx_bytes++;
  204. async_unwrap_char(dev, &si->stats, &si->rx_buff, data);
  205. }
  206. lsr = STLSR;
  207. }
  208. dev->last_rx = jiffies;
  209. si->last_oscr = OSCR;
  210. break;
  211. case 0x04: /* Received Data Available */
  212. /* forth through */
  213. case 0x0C: /* Character Timeout Indication */
  214. do {
  215. si->stats.rx_bytes++;
  216. async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR);
  217. } while (STLSR & LSR_DR);
  218. dev->last_rx = jiffies;
  219. si->last_oscr = OSCR;
  220. break;
  221. case 0x02: /* Transmit FIFO Data Request */
  222. while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) {
  223. STTHR = *si->tx_buff.data++;
  224. si->tx_buff.len -= 1;
  225. }
  226. if (si->tx_buff.len == 0) {
  227. si->stats.tx_packets++;
  228. si->stats.tx_bytes += si->tx_buff.data -
  229. si->tx_buff.head;
  230. /* We need to ensure that the transmitter has finished. */
  231. while ((STLSR & LSR_TEMT) == 0)
  232. cpu_relax();
  233. si->last_oscr = OSCR;
  234. /*
  235. * Ok, we've finished transmitting. Now enable
  236. * the receiver. Sometimes we get a receive IRQ
  237. * immediately after a transmit...
  238. */
  239. if (si->newspeed) {
  240. pxa_irda_set_speed(si, si->newspeed);
  241. si->newspeed = 0;
  242. } else {
  243. /* enable IR Receiver, disable IR Transmitter */
  244. STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
  245. /* enable STUART and receive interrupts */
  246. STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
  247. }
  248. /* I'm hungry! */
  249. netif_wake_queue(dev);
  250. }
  251. break;
  252. }
  253. return IRQ_HANDLED;
  254. }
  255. /* FIR Receive DMA interrupt handler */
  256. static void pxa_irda_fir_dma_rx_irq(int channel, void *data)
  257. {
  258. int dcsr = DCSR(channel);
  259. DCSR(channel) = dcsr & ~DCSR_RUN;
  260. printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr);
  261. }
  262. /* FIR Transmit DMA interrupt handler */
  263. static void pxa_irda_fir_dma_tx_irq(int channel, void *data)
  264. {
  265. struct net_device *dev = data;
  266. struct pxa_irda *si = netdev_priv(dev);
  267. int dcsr;
  268. dcsr = DCSR(channel);
  269. DCSR(channel) = dcsr & ~DCSR_RUN;
  270. if (dcsr & DCSR_ENDINTR) {
  271. si->stats.tx_packets++;
  272. si->stats.tx_bytes += si->dma_tx_buff_len;
  273. } else {
  274. si->stats.tx_errors++;
  275. }
  276. while (ICSR1 & ICSR1_TBY)
  277. cpu_relax();
  278. si->last_oscr = OSCR;
  279. /*
  280. * HACK: It looks like the TBY bit is dropped too soon.
  281. * Without this delay things break.
  282. */
  283. udelay(120);
  284. if (si->newspeed) {
  285. pxa_irda_set_speed(si, si->newspeed);
  286. si->newspeed = 0;
  287. } else {
  288. int i = 64;
  289. ICCR0 = 0;
  290. pxa_irda_fir_dma_rx_start(si);
  291. while ((ICSR1 & ICSR1_RNE) && i--)
  292. (void)ICDR;
  293. ICCR0 = ICCR0_ITR | ICCR0_RXE;
  294. if (i < 0)
  295. printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
  296. }
  297. netif_wake_queue(dev);
  298. }
  299. /* EIF(Error in FIFO/End in Frame) handler for FIR */
  300. static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0)
  301. {
  302. unsigned int len, stat, data;
  303. /* Get the current data position. */
  304. len = DTADR(si->rxdma) - si->dma_rx_buff_phy;
  305. do {
  306. /* Read Status, and then Data. */
  307. stat = ICSR1;
  308. rmb();
  309. data = ICDR;
  310. if (stat & (ICSR1_CRE | ICSR1_ROR)) {
  311. si->stats.rx_errors++;
  312. if (stat & ICSR1_CRE) {
  313. printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n");
  314. si->stats.rx_crc_errors++;
  315. }
  316. if (stat & ICSR1_ROR) {
  317. printk(KERN_DEBUG "pxa_ir: fir receive overrun\n");
  318. si->stats.rx_over_errors++;
  319. }
  320. } else {
  321. si->dma_rx_buff[len++] = data;
  322. }
  323. /* If we hit the end of frame, there's no point in continuing. */
  324. if (stat & ICSR1_EOF)
  325. break;
  326. } while (ICSR0 & ICSR0_EIF);
  327. if (stat & ICSR1_EOF) {
  328. /* end of frame. */
  329. struct sk_buff *skb;
  330. if (icsr0 & ICSR0_FRE) {
  331. printk(KERN_ERR "pxa_ir: dropping erroneous frame\n");
  332. si->stats.rx_dropped++;
  333. return;
  334. }
  335. skb = alloc_skb(len+1,GFP_ATOMIC);
  336. if (!skb) {
  337. printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n");
  338. si->stats.rx_dropped++;
  339. return;
  340. }
  341. /* Align IP header to 20 bytes */
  342. skb_reserve(skb, 1);
  343. skb_copy_to_linear_data(skb, si->dma_rx_buff, len);
  344. skb_put(skb, len);
  345. /* Feed it to IrLAP */
  346. skb->dev = dev;
  347. skb_reset_mac_header(skb);
  348. skb->protocol = htons(ETH_P_IRDA);
  349. netif_rx(skb);
  350. si->stats.rx_packets++;
  351. si->stats.rx_bytes += len;
  352. dev->last_rx = jiffies;
  353. }
  354. }
  355. /* FIR interrupt handler */
  356. static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id)
  357. {
  358. struct net_device *dev = dev_id;
  359. struct pxa_irda *si = netdev_priv(dev);
  360. int icsr0, i = 64;
  361. /* stop RX DMA */
  362. DCSR(si->rxdma) &= ~DCSR_RUN;
  363. si->last_oscr = OSCR;
  364. icsr0 = ICSR0;
  365. if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) {
  366. if (icsr0 & ICSR0_FRE) {
  367. printk(KERN_DEBUG "pxa_ir: fir receive frame error\n");
  368. si->stats.rx_frame_errors++;
  369. } else {
  370. printk(KERN_DEBUG "pxa_ir: fir receive abort\n");
  371. si->stats.rx_errors++;
  372. }
  373. ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB);
  374. }
  375. if (icsr0 & ICSR0_EIF) {
  376. /* An error in FIFO occured, or there is a end of frame */
  377. pxa_irda_fir_irq_eif(si, dev, icsr0);
  378. }
  379. ICCR0 = 0;
  380. pxa_irda_fir_dma_rx_start(si);
  381. while ((ICSR1 & ICSR1_RNE) && i--)
  382. (void)ICDR;
  383. ICCR0 = ICCR0_ITR | ICCR0_RXE;
  384. if (i < 0)
  385. printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
  386. return IRQ_HANDLED;
  387. }
  388. /* hard_xmit interface of irda device */
  389. static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
  390. {
  391. struct pxa_irda *si = netdev_priv(dev);
  392. int speed = irda_get_next_speed(skb);
  393. /*
  394. * Does this packet contain a request to change the interface
  395. * speed? If so, remember it until we complete the transmission
  396. * of this frame.
  397. */
  398. if (speed != si->speed && speed != -1)
  399. si->newspeed = speed;
  400. /*
  401. * If this is an empty frame, we can bypass a lot.
  402. */
  403. if (skb->len == 0) {
  404. if (si->newspeed) {
  405. si->newspeed = 0;
  406. pxa_irda_set_speed(si, speed);
  407. }
  408. dev_kfree_skb(skb);
  409. return 0;
  410. }
  411. netif_stop_queue(dev);
  412. if (!IS_FIR(si)) {
  413. si->tx_buff.data = si->tx_buff.head;
  414. si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize);
  415. /* Disable STUART interrupts and switch to transmit mode. */
  416. STIER = 0;
  417. STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6;
  418. /* enable STUART and transmit interrupts */
  419. STIER = IER_UUE | IER_TIE;
  420. } else {
  421. unsigned long mtt = irda_get_mtt(skb);
  422. si->dma_tx_buff_len = skb->len;
  423. skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len);
  424. if (mtt)
  425. while ((unsigned)(OSCR - si->last_oscr)/4 < mtt)
  426. cpu_relax();
  427. /* stop RX DMA, disable FICP */
  428. DCSR(si->rxdma) &= ~DCSR_RUN;
  429. ICCR0 = 0;
  430. pxa_irda_fir_dma_tx_start(si);
  431. ICCR0 = ICCR0_ITR | ICCR0_TXE;
  432. }
  433. dev_kfree_skb(skb);
  434. dev->trans_start = jiffies;
  435. return 0;
  436. }
  437. static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
  438. {
  439. struct if_irda_req *rq = (struct if_irda_req *)ifreq;
  440. struct pxa_irda *si = netdev_priv(dev);
  441. int ret;
  442. switch (cmd) {
  443. case SIOCSBANDWIDTH:
  444. ret = -EPERM;
  445. if (capable(CAP_NET_ADMIN)) {
  446. /*
  447. * We are unable to set the speed if the
  448. * device is not running.
  449. */
  450. if (netif_running(dev)) {
  451. ret = pxa_irda_set_speed(si,
  452. rq->ifr_baudrate);
  453. } else {
  454. printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n");
  455. ret = 0;
  456. }
  457. }
  458. break;
  459. case SIOCSMEDIABUSY:
  460. ret = -EPERM;
  461. if (capable(CAP_NET_ADMIN)) {
  462. irda_device_set_media_busy(dev, TRUE);
  463. ret = 0;
  464. }
  465. break;
  466. case SIOCGRECEIVING:
  467. ret = 0;
  468. rq->ifr_receiving = IS_FIR(si) ? 0
  469. : si->rx_buff.state != OUTSIDE_FRAME;
  470. break;
  471. default:
  472. ret = -EOPNOTSUPP;
  473. break;
  474. }
  475. return ret;
  476. }
  477. static struct net_device_stats *pxa_irda_stats(struct net_device *dev)
  478. {
  479. struct pxa_irda *si = netdev_priv(dev);
  480. return &si->stats;
  481. }
  482. static void pxa_irda_startup(struct pxa_irda *si)
  483. {
  484. /* Disable STUART interrupts */
  485. STIER = 0;
  486. /* enable STUART interrupt to the processor */
  487. STMCR = MCR_OUT2;
  488. /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */
  489. STLCR = LCR_WLS0 | LCR_WLS1;
  490. /* enable FIFO, we use FIFO to improve performance */
  491. STFCR = FCR_TRFIFOE | FCR_ITL_32;
  492. /* disable FICP */
  493. ICCR0 = 0;
  494. /* configure FICP ICCR2 */
  495. ICCR2 = ICCR2_TXP | ICCR2_TRIG_32;
  496. /* configure DMAC */
  497. DRCMR17 = si->rxdma | DRCMR_MAPVLD;
  498. DRCMR18 = si->txdma | DRCMR_MAPVLD;
  499. /* force SIR reinitialization */
  500. si->speed = 4000000;
  501. pxa_irda_set_speed(si, 9600);
  502. printk(KERN_DEBUG "pxa_ir: irda startup\n");
  503. }
  504. static void pxa_irda_shutdown(struct pxa_irda *si)
  505. {
  506. unsigned long flags;
  507. local_irq_save(flags);
  508. /* disable STUART and interrupt */
  509. STIER = 0;
  510. /* disable STUART SIR mode */
  511. STISR = 0;
  512. /* disable DMA */
  513. DCSR(si->txdma) &= ~DCSR_RUN;
  514. DCSR(si->rxdma) &= ~DCSR_RUN;
  515. /* disable FICP */
  516. ICCR0 = 0;
  517. /* disable the STUART or FICP clocks */
  518. pxa_irda_disable_clk(si);
  519. DRCMR17 = 0;
  520. DRCMR18 = 0;
  521. local_irq_restore(flags);
  522. /* power off board transceiver */
  523. si->pdata->transceiver_mode(si->dev, IR_OFF);
  524. printk(KERN_DEBUG "pxa_ir: irda shutdown\n");
  525. }
  526. static int pxa_irda_start(struct net_device *dev)
  527. {
  528. struct pxa_irda *si = netdev_priv(dev);
  529. int err;
  530. si->speed = 9600;
  531. err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev);
  532. if (err)
  533. goto err_irq1;
  534. err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev);
  535. if (err)
  536. goto err_irq2;
  537. /*
  538. * The interrupt must remain disabled for now.
  539. */
  540. disable_irq(IRQ_STUART);
  541. disable_irq(IRQ_ICP);
  542. err = -EBUSY;
  543. si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev);
  544. if (si->rxdma < 0)
  545. goto err_rx_dma;
  546. si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev);
  547. if (si->txdma < 0)
  548. goto err_tx_dma;
  549. err = -ENOMEM;
  550. si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
  551. &si->dma_rx_buff_phy, GFP_KERNEL );
  552. if (!si->dma_rx_buff)
  553. goto err_dma_rx_buff;
  554. si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
  555. &si->dma_tx_buff_phy, GFP_KERNEL );
  556. if (!si->dma_tx_buff)
  557. goto err_dma_tx_buff;
  558. /* Setup the serial port for the initial speed. */
  559. pxa_irda_startup(si);
  560. /*
  561. * Open a new IrLAP layer instance.
  562. */
  563. si->irlap = irlap_open(dev, &si->qos, "pxa");
  564. err = -ENOMEM;
  565. if (!si->irlap)
  566. goto err_irlap;
  567. /*
  568. * Now enable the interrupt and start the queue
  569. */
  570. enable_irq(IRQ_STUART);
  571. enable_irq(IRQ_ICP);
  572. netif_start_queue(dev);
  573. printk(KERN_DEBUG "pxa_ir: irda driver opened\n");
  574. return 0;
  575. err_irlap:
  576. pxa_irda_shutdown(si);
  577. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
  578. err_dma_tx_buff:
  579. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
  580. err_dma_rx_buff:
  581. pxa_free_dma(si->txdma);
  582. err_tx_dma:
  583. pxa_free_dma(si->rxdma);
  584. err_rx_dma:
  585. free_irq(IRQ_ICP, dev);
  586. err_irq2:
  587. free_irq(IRQ_STUART, dev);
  588. err_irq1:
  589. return err;
  590. }
  591. static int pxa_irda_stop(struct net_device *dev)
  592. {
  593. struct pxa_irda *si = netdev_priv(dev);
  594. netif_stop_queue(dev);
  595. pxa_irda_shutdown(si);
  596. /* Stop IrLAP */
  597. if (si->irlap) {
  598. irlap_close(si->irlap);
  599. si->irlap = NULL;
  600. }
  601. free_irq(IRQ_STUART, dev);
  602. free_irq(IRQ_ICP, dev);
  603. pxa_free_dma(si->rxdma);
  604. pxa_free_dma(si->txdma);
  605. if (si->dma_rx_buff)
  606. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
  607. if (si->dma_tx_buff)
  608. dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
  609. printk(KERN_DEBUG "pxa_ir: irda driver closed\n");
  610. return 0;
  611. }
  612. static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state)
  613. {
  614. struct net_device *dev = platform_get_drvdata(_dev);
  615. struct pxa_irda *si;
  616. if (dev && netif_running(dev)) {
  617. si = netdev_priv(dev);
  618. netif_device_detach(dev);
  619. pxa_irda_shutdown(si);
  620. }
  621. return 0;
  622. }
  623. static int pxa_irda_resume(struct platform_device *_dev)
  624. {
  625. struct net_device *dev = platform_get_drvdata(_dev);
  626. struct pxa_irda *si;
  627. if (dev && netif_running(dev)) {
  628. si = netdev_priv(dev);
  629. pxa_irda_startup(si);
  630. netif_device_attach(dev);
  631. netif_wake_queue(dev);
  632. }
  633. return 0;
  634. }
  635. static int pxa_irda_init_iobuf(iobuff_t *io, int size)
  636. {
  637. io->head = kmalloc(size, GFP_KERNEL | GFP_DMA);
  638. if (io->head != NULL) {
  639. io->truesize = size;
  640. io->in_frame = FALSE;
  641. io->state = OUTSIDE_FRAME;
  642. io->data = io->head;
  643. }
  644. return io->head ? 0 : -ENOMEM;
  645. }
  646. static int pxa_irda_probe(struct platform_device *pdev)
  647. {
  648. struct net_device *dev;
  649. struct pxa_irda *si;
  650. unsigned int baudrate_mask;
  651. int err;
  652. if (!pdev->dev.platform_data)
  653. return -ENODEV;
  654. err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY;
  655. if (err)
  656. goto err_mem_1;
  657. err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY;
  658. if (err)
  659. goto err_mem_2;
  660. dev = alloc_irdadev(sizeof(struct pxa_irda));
  661. if (!dev)
  662. goto err_mem_3;
  663. si = netdev_priv(dev);
  664. si->dev = &pdev->dev;
  665. si->pdata = pdev->dev.platform_data;
  666. si->sir_clk = clk_get(&pdev->dev, "UARTCLK");
  667. si->fir_clk = clk_get(&pdev->dev, "FICPCLK");
  668. if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) {
  669. err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk);
  670. goto err_mem_4;
  671. }
  672. /*
  673. * Initialise the SIR buffers
  674. */
  675. err = pxa_irda_init_iobuf(&si->rx_buff, 14384);
  676. if (err)
  677. goto err_mem_4;
  678. err = pxa_irda_init_iobuf(&si->tx_buff, 4000);
  679. if (err)
  680. goto err_mem_5;
  681. dev->hard_start_xmit = pxa_irda_hard_xmit;
  682. dev->open = pxa_irda_start;
  683. dev->stop = pxa_irda_stop;
  684. dev->do_ioctl = pxa_irda_ioctl;
  685. dev->get_stats = pxa_irda_stats;
  686. irda_init_max_qos_capabilies(&si->qos);
  687. baudrate_mask = 0;
  688. if (si->pdata->transceiver_cap & IR_SIRMODE)
  689. baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
  690. if (si->pdata->transceiver_cap & IR_FIRMODE)
  691. baudrate_mask |= IR_4000000 << 8;
  692. si->qos.baud_rate.bits &= baudrate_mask;
  693. si->qos.min_turn_time.bits = 7; /* 1ms or more */
  694. irda_qos_bits_to_value(&si->qos);
  695. err = register_netdev(dev);
  696. if (err == 0)
  697. dev_set_drvdata(&pdev->dev, dev);
  698. if (err) {
  699. kfree(si->tx_buff.head);
  700. err_mem_5:
  701. kfree(si->rx_buff.head);
  702. err_mem_4:
  703. if (si->sir_clk && !IS_ERR(si->sir_clk))
  704. clk_put(si->sir_clk);
  705. if (si->fir_clk && !IS_ERR(si->fir_clk))
  706. clk_put(si->fir_clk);
  707. free_netdev(dev);
  708. err_mem_3:
  709. release_mem_region(__PREG(FICP), 0x1c);
  710. err_mem_2:
  711. release_mem_region(__PREG(STUART), 0x24);
  712. }
  713. err_mem_1:
  714. return err;
  715. }
  716. static int pxa_irda_remove(struct platform_device *_dev)
  717. {
  718. struct net_device *dev = platform_get_drvdata(_dev);
  719. if (dev) {
  720. struct pxa_irda *si = netdev_priv(dev);
  721. unregister_netdev(dev);
  722. kfree(si->tx_buff.head);
  723. kfree(si->rx_buff.head);
  724. clk_put(si->fir_clk);
  725. clk_put(si->sir_clk);
  726. free_netdev(dev);
  727. }
  728. release_mem_region(__PREG(STUART), 0x24);
  729. release_mem_region(__PREG(FICP), 0x1c);
  730. return 0;
  731. }
  732. static struct platform_driver pxa_ir_driver = {
  733. .driver = {
  734. .name = "pxa2xx-ir",
  735. },
  736. .probe = pxa_irda_probe,
  737. .remove = pxa_irda_remove,
  738. .suspend = pxa_irda_suspend,
  739. .resume = pxa_irda_resume,
  740. };
  741. static int __init pxa_irda_init(void)
  742. {
  743. return platform_driver_register(&pxa_ir_driver);
  744. }
  745. static void __exit pxa_irda_exit(void)
  746. {
  747. platform_driver_unregister(&pxa_ir_driver);
  748. }
  749. module_init(pxa_irda_init);
  750. module_exit(pxa_irda_exit);
  751. MODULE_LICENSE("GPL");