fec_main.c 29 KB

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  1. /*
  2. * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
  8. * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
  9. *
  10. * Released under the GPL
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/string.h>
  16. #include <linux/ptrace.h>
  17. #include <linux/errno.h>
  18. #include <linux/ioport.h>
  19. #include <linux/slab.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/mii.h>
  28. #include <linux/ethtool.h>
  29. #include <linux/bitops.h>
  30. #include <linux/dma-mapping.h>
  31. #include <asm/8xx_immap.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/mpc8xx.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #include <asm/commproc.h>
  37. #include "fec_8xx.h"
  38. /*************************************************/
  39. #define FEC_MAX_MULTICAST_ADDRS 64
  40. /*************************************************/
  41. static char version[] __devinitdata =
  42. DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
  43. MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
  44. MODULE_DESCRIPTION("Motorola 8xx FEC ethernet driver");
  45. MODULE_LICENSE("GPL");
  46. int fec_8xx_debug = -1; /* -1 == use FEC_8XX_DEF_MSG_ENABLE as value */
  47. module_param(fec_8xx_debug, int, 0);
  48. MODULE_PARM_DESC(fec_8xx_debug,
  49. "FEC 8xx bitmapped debugging message enable value");
  50. /*************************************************/
  51. /*
  52. * Delay to wait for FEC reset command to complete (in us)
  53. */
  54. #define FEC_RESET_DELAY 50
  55. /*****************************************************************************************/
  56. static void fec_whack_reset(fec_t * fecp)
  57. {
  58. int i;
  59. /*
  60. * Whack a reset. We should wait for this.
  61. */
  62. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
  63. for (i = 0;
  64. (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY;
  65. i++)
  66. udelay(1);
  67. if (i == FEC_RESET_DELAY)
  68. printk(KERN_WARNING "FEC Reset timeout!\n");
  69. }
  70. /****************************************************************************/
  71. /*
  72. * Transmitter timeout.
  73. */
  74. #define TX_TIMEOUT (2*HZ)
  75. /****************************************************************************/
  76. /*
  77. * Returns the CRC needed when filling in the hash table for
  78. * multicast group filtering
  79. * pAddr must point to a MAC address (6 bytes)
  80. */
  81. static __u32 fec_mulicast_calc_crc(char *pAddr)
  82. {
  83. u8 byte;
  84. int byte_count;
  85. int bit_count;
  86. __u32 crc = 0xffffffff;
  87. u8 msb;
  88. for (byte_count = 0; byte_count < 6; byte_count++) {
  89. byte = pAddr[byte_count];
  90. for (bit_count = 0; bit_count < 8; bit_count++) {
  91. msb = crc >> 31;
  92. crc <<= 1;
  93. if (msb ^ (byte & 0x1)) {
  94. crc ^= FEC_CRC_POLY;
  95. }
  96. byte >>= 1;
  97. }
  98. }
  99. return (crc);
  100. }
  101. /*
  102. * Set or clear the multicast filter for this adaptor.
  103. * Skeleton taken from sunlance driver.
  104. * The CPM Ethernet implementation allows Multicast as well as individual
  105. * MAC address filtering. Some of the drivers check to make sure it is
  106. * a group multicast address, and discard those that are not. I guess I
  107. * will do the same for now, but just remove the test if you want
  108. * individual filtering as well (do the upper net layers want or support
  109. * this kind of feature?).
  110. */
  111. static void fec_set_multicast_list(struct net_device *dev)
  112. {
  113. struct fec_enet_private *fep = netdev_priv(dev);
  114. fec_t *fecp = fep->fecp;
  115. struct dev_mc_list *pmc;
  116. __u32 crc;
  117. int temp;
  118. __u32 csrVal;
  119. int hash_index;
  120. __u32 hthi, htlo;
  121. unsigned long flags;
  122. if ((dev->flags & IFF_PROMISC) != 0) {
  123. spin_lock_irqsave(&fep->lock, flags);
  124. FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
  125. spin_unlock_irqrestore(&fep->lock, flags);
  126. /*
  127. * Log any net taps.
  128. */
  129. printk(KERN_WARNING DRV_MODULE_NAME
  130. ": %s: Promiscuous mode enabled.\n", dev->name);
  131. return;
  132. }
  133. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  134. dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
  135. /*
  136. * Catch all multicast addresses, set the filter to all 1's.
  137. */
  138. hthi = 0xffffffffU;
  139. htlo = 0xffffffffU;
  140. } else {
  141. hthi = 0;
  142. htlo = 0;
  143. /*
  144. * Now populate the hash table
  145. */
  146. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) {
  147. crc = fec_mulicast_calc_crc(pmc->dmi_addr);
  148. temp = (crc & 0x3f) >> 1;
  149. hash_index = ((temp & 0x01) << 4) |
  150. ((temp & 0x02) << 2) |
  151. ((temp & 0x04)) |
  152. ((temp & 0x08) >> 2) |
  153. ((temp & 0x10) >> 4);
  154. csrVal = (1 << hash_index);
  155. if (crc & 1)
  156. hthi |= csrVal;
  157. else
  158. htlo |= csrVal;
  159. }
  160. }
  161. spin_lock_irqsave(&fep->lock, flags);
  162. FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
  163. FW(fecp, hash_table_high, hthi);
  164. FW(fecp, hash_table_low, htlo);
  165. spin_unlock_irqrestore(&fep->lock, flags);
  166. }
  167. static int fec_set_mac_address(struct net_device *dev, void *addr)
  168. {
  169. struct sockaddr *mac = addr;
  170. struct fec_enet_private *fep = netdev_priv(dev);
  171. struct fec *fecp = fep->fecp;
  172. int i;
  173. __u32 addrhi, addrlo;
  174. unsigned long flags;
  175. /* Get pointer to SCC area in parameter RAM. */
  176. for (i = 0; i < 6; i++)
  177. dev->dev_addr[i] = mac->sa_data[i];
  178. /*
  179. * Set station address.
  180. */
  181. addrhi = ((__u32) dev->dev_addr[0] << 24) |
  182. ((__u32) dev->dev_addr[1] << 16) |
  183. ((__u32) dev->dev_addr[2] << 8) |
  184. (__u32) dev->dev_addr[3];
  185. addrlo = ((__u32) dev->dev_addr[4] << 24) |
  186. ((__u32) dev->dev_addr[5] << 16);
  187. spin_lock_irqsave(&fep->lock, flags);
  188. FW(fecp, addr_low, addrhi);
  189. FW(fecp, addr_high, addrlo);
  190. spin_unlock_irqrestore(&fep->lock, flags);
  191. return 0;
  192. }
  193. /*
  194. * This function is called to start or restart the FEC during a link
  195. * change. This only happens when switching between half and full
  196. * duplex.
  197. */
  198. void fec_restart(struct net_device *dev, int duplex, int speed)
  199. {
  200. #ifdef CONFIG_DUET
  201. immap_t *immap = (immap_t *) IMAP_ADDR;
  202. __u32 cptr;
  203. #endif
  204. struct fec_enet_private *fep = netdev_priv(dev);
  205. struct fec *fecp = fep->fecp;
  206. const struct fec_platform_info *fpi = fep->fpi;
  207. cbd_t *bdp;
  208. struct sk_buff *skb;
  209. int i;
  210. __u32 addrhi, addrlo;
  211. fec_whack_reset(fep->fecp);
  212. /*
  213. * Set station address.
  214. */
  215. addrhi = ((__u32) dev->dev_addr[0] << 24) |
  216. ((__u32) dev->dev_addr[1] << 16) |
  217. ((__u32) dev->dev_addr[2] << 8) |
  218. (__u32) dev->dev_addr[3];
  219. addrlo = ((__u32) dev->dev_addr[4] << 24) |
  220. ((__u32) dev->dev_addr[5] << 16);
  221. FW(fecp, addr_low, addrhi);
  222. FW(fecp, addr_high, addrlo);
  223. /*
  224. * Reset all multicast.
  225. */
  226. FW(fecp, hash_table_high, 0);
  227. FW(fecp, hash_table_low, 0);
  228. /*
  229. * Set maximum receive buffer size.
  230. */
  231. FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
  232. FW(fecp, r_hash, PKT_MAXBUF_SIZE);
  233. /*
  234. * Set receive and transmit descriptor base.
  235. */
  236. FW(fecp, r_des_start, iopa((__u32) (fep->rx_bd_base)));
  237. FW(fecp, x_des_start, iopa((__u32) (fep->tx_bd_base)));
  238. fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
  239. fep->tx_free = fep->tx_ring;
  240. fep->cur_rx = fep->rx_bd_base;
  241. /*
  242. * Reset SKB receive buffers
  243. */
  244. for (i = 0; i < fep->rx_ring; i++) {
  245. if ((skb = fep->rx_skbuff[i]) == NULL)
  246. continue;
  247. fep->rx_skbuff[i] = NULL;
  248. dev_kfree_skb(skb);
  249. }
  250. /*
  251. * Initialize the receive buffer descriptors.
  252. */
  253. for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) {
  254. skb = dev_alloc_skb(ENET_RX_FRSIZE);
  255. if (skb == NULL) {
  256. printk(KERN_WARNING DRV_MODULE_NAME
  257. ": %s Memory squeeze, unable to allocate skb\n",
  258. dev->name);
  259. fep->stats.rx_dropped++;
  260. break;
  261. }
  262. fep->rx_skbuff[i] = skb;
  263. skb->dev = dev;
  264. CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
  265. L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
  266. DMA_FROM_DEVICE));
  267. CBDW_DATLEN(bdp, 0); /* zero */
  268. CBDW_SC(bdp, BD_ENET_RX_EMPTY |
  269. ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP));
  270. }
  271. /*
  272. * if we failed, fillup remainder
  273. */
  274. for (; i < fep->rx_ring; i++, bdp++) {
  275. fep->rx_skbuff[i] = NULL;
  276. CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP);
  277. }
  278. /*
  279. * Reset SKB transmit buffers.
  280. */
  281. for (i = 0; i < fep->tx_ring; i++) {
  282. if ((skb = fep->tx_skbuff[i]) == NULL)
  283. continue;
  284. fep->tx_skbuff[i] = NULL;
  285. dev_kfree_skb(skb);
  286. }
  287. /*
  288. * ...and the same for transmit.
  289. */
  290. for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) {
  291. fep->tx_skbuff[i] = NULL;
  292. CBDW_BUFADDR(bdp, virt_to_bus(NULL));
  293. CBDW_DATLEN(bdp, 0);
  294. CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP);
  295. }
  296. /*
  297. * Enable big endian and don't care about SDMA FC.
  298. */
  299. FW(fecp, fun_code, 0x78000000);
  300. /*
  301. * Set MII speed.
  302. */
  303. FW(fecp, mii_speed, fep->fec_phy_speed);
  304. /*
  305. * Clear any outstanding interrupt.
  306. */
  307. FW(fecp, ievent, 0xffc0);
  308. FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
  309. /*
  310. * adjust to speed (only for DUET & RMII)
  311. */
  312. #ifdef CONFIG_DUET
  313. cptr = in_be32(&immap->im_cpm.cp_cptr);
  314. switch (fpi->fec_no) {
  315. case 0:
  316. /*
  317. * check if in RMII mode
  318. */
  319. if ((cptr & 0x100) == 0)
  320. break;
  321. if (speed == 10)
  322. cptr |= 0x0000010;
  323. else if (speed == 100)
  324. cptr &= ~0x0000010;
  325. break;
  326. case 1:
  327. /*
  328. * check if in RMII mode
  329. */
  330. if ((cptr & 0x80) == 0)
  331. break;
  332. if (speed == 10)
  333. cptr |= 0x0000008;
  334. else if (speed == 100)
  335. cptr &= ~0x0000008;
  336. break;
  337. default:
  338. break;
  339. }
  340. out_be32(&immap->im_cpm.cp_cptr, cptr);
  341. #endif
  342. FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  343. /*
  344. * adjust to duplex mode
  345. */
  346. if (duplex) {
  347. FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
  348. FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
  349. } else {
  350. FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
  351. FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
  352. }
  353. /*
  354. * Enable interrupts we wish to service.
  355. */
  356. FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
  357. FEC_ENET_RXF | FEC_ENET_RXB);
  358. /*
  359. * And last, enable the transmit and receive processing.
  360. */
  361. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  362. FW(fecp, r_des_active, 0x01000000);
  363. }
  364. void fec_stop(struct net_device *dev)
  365. {
  366. struct fec_enet_private *fep = netdev_priv(dev);
  367. fec_t *fecp = fep->fecp;
  368. struct sk_buff *skb;
  369. int i;
  370. if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
  371. return; /* already down */
  372. FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
  373. for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
  374. i < FEC_RESET_DELAY; i++)
  375. udelay(1);
  376. if (i == FEC_RESET_DELAY)
  377. printk(KERN_WARNING DRV_MODULE_NAME
  378. ": %s FEC timeout on graceful transmit stop\n",
  379. dev->name);
  380. /*
  381. * Disable FEC. Let only MII interrupts.
  382. */
  383. FW(fecp, imask, 0);
  384. FW(fecp, ecntrl, ~FEC_ECNTRL_ETHER_EN);
  385. /*
  386. * Reset SKB transmit buffers.
  387. */
  388. for (i = 0; i < fep->tx_ring; i++) {
  389. if ((skb = fep->tx_skbuff[i]) == NULL)
  390. continue;
  391. fep->tx_skbuff[i] = NULL;
  392. dev_kfree_skb(skb);
  393. }
  394. /*
  395. * Reset SKB receive buffers
  396. */
  397. for (i = 0; i < fep->rx_ring; i++) {
  398. if ((skb = fep->rx_skbuff[i]) == NULL)
  399. continue;
  400. fep->rx_skbuff[i] = NULL;
  401. dev_kfree_skb(skb);
  402. }
  403. }
  404. /* common receive function */
  405. static int fec_enet_rx_common(struct fec_enet_private *ep,
  406. struct net_device *dev, int budget)
  407. {
  408. fec_t *fecp = fep->fecp;
  409. const struct fec_platform_info *fpi = fep->fpi;
  410. cbd_t *bdp;
  411. struct sk_buff *skb, *skbn, *skbt;
  412. int received = 0;
  413. __u16 pkt_len, sc;
  414. int curidx;
  415. if (fpi->use_napi) {
  416. if (!netif_running(dev))
  417. return 0;
  418. }
  419. /*
  420. * First, grab all of the stats for the incoming packet.
  421. * These get messed up if we get called due to a busy condition.
  422. */
  423. bdp = fep->cur_rx;
  424. /* clear RX status bits for napi*/
  425. if (fpi->use_napi)
  426. FW(fecp, ievent, FEC_ENET_RXF | FEC_ENET_RXB);
  427. while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
  428. curidx = bdp - fep->rx_bd_base;
  429. /*
  430. * Since we have allocated space to hold a complete frame,
  431. * the last indicator should be set.
  432. */
  433. if ((sc & BD_ENET_RX_LAST) == 0)
  434. printk(KERN_WARNING DRV_MODULE_NAME
  435. ": %s rcv is not +last\n",
  436. dev->name);
  437. /*
  438. * Check for errors.
  439. */
  440. if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
  441. BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
  442. fep->stats.rx_errors++;
  443. /* Frame too long or too short. */
  444. if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
  445. fep->stats.rx_length_errors++;
  446. /* Frame alignment */
  447. if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
  448. fep->stats.rx_frame_errors++;
  449. /* CRC Error */
  450. if (sc & BD_ENET_RX_CR)
  451. fep->stats.rx_crc_errors++;
  452. /* FIFO overrun */
  453. if (sc & BD_ENET_RX_OV)
  454. fep->stats.rx_crc_errors++;
  455. skbn = fep->rx_skbuff[curidx];
  456. BUG_ON(skbn == NULL);
  457. } else {
  458. skb = fep->rx_skbuff[curidx];
  459. BUG_ON(skb == NULL);
  460. /*
  461. * Process the incoming frame.
  462. */
  463. fep->stats.rx_packets++;
  464. pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
  465. fep->stats.rx_bytes += pkt_len + 4;
  466. if (pkt_len <= fpi->rx_copybreak) {
  467. /* +2 to make IP header L1 cache aligned */
  468. skbn = dev_alloc_skb(pkt_len + 2);
  469. if (skbn != NULL) {
  470. skb_reserve(skbn, 2); /* align IP header */
  471. skb_copy_from_linear_data(skb,
  472. skbn->data,
  473. pkt_len);
  474. /* swap */
  475. skbt = skb;
  476. skb = skbn;
  477. skbn = skbt;
  478. }
  479. } else
  480. skbn = dev_alloc_skb(ENET_RX_FRSIZE);
  481. if (skbn != NULL) {
  482. skb_put(skb, pkt_len); /* Make room */
  483. skb->protocol = eth_type_trans(skb, dev);
  484. received++;
  485. if (!fpi->use_napi)
  486. netif_rx(skb);
  487. else
  488. netif_receive_skb(skb);
  489. } else {
  490. printk(KERN_WARNING DRV_MODULE_NAME
  491. ": %s Memory squeeze, dropping packet.\n",
  492. dev->name);
  493. fep->stats.rx_dropped++;
  494. skbn = skb;
  495. }
  496. }
  497. fep->rx_skbuff[curidx] = skbn;
  498. CBDW_BUFADDR(bdp, dma_map_single(NULL, skbn->data,
  499. L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
  500. DMA_FROM_DEVICE));
  501. CBDW_DATLEN(bdp, 0);
  502. CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
  503. /*
  504. * Update BD pointer to next entry.
  505. */
  506. if ((sc & BD_ENET_RX_WRAP) == 0)
  507. bdp++;
  508. else
  509. bdp = fep->rx_bd_base;
  510. /*
  511. * Doing this here will keep the FEC running while we process
  512. * incoming frames. On a heavily loaded network, we should be
  513. * able to keep up at the expense of system resources.
  514. */
  515. FW(fecp, r_des_active, 0x01000000);
  516. if (received >= budget)
  517. break;
  518. }
  519. fep->cur_rx = bdp;
  520. if (fpi->use_napi) {
  521. if (received < budget) {
  522. netif_rx_complete(dev, &fep->napi);
  523. /* enable RX interrupt bits */
  524. FS(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  525. }
  526. }
  527. return received;
  528. }
  529. static void fec_enet_tx(struct net_device *dev)
  530. {
  531. struct fec_enet_private *fep = netdev_priv(dev);
  532. cbd_t *bdp;
  533. struct sk_buff *skb;
  534. int dirtyidx, do_wake;
  535. __u16 sc;
  536. spin_lock(&fep->lock);
  537. bdp = fep->dirty_tx;
  538. do_wake = 0;
  539. while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
  540. dirtyidx = bdp - fep->tx_bd_base;
  541. if (fep->tx_free == fep->tx_ring)
  542. break;
  543. skb = fep->tx_skbuff[dirtyidx];
  544. /*
  545. * Check for errors.
  546. */
  547. if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
  548. BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) {
  549. fep->stats.tx_errors++;
  550. if (sc & BD_ENET_TX_HB) /* No heartbeat */
  551. fep->stats.tx_heartbeat_errors++;
  552. if (sc & BD_ENET_TX_LC) /* Late collision */
  553. fep->stats.tx_window_errors++;
  554. if (sc & BD_ENET_TX_RL) /* Retrans limit */
  555. fep->stats.tx_aborted_errors++;
  556. if (sc & BD_ENET_TX_UN) /* Underrun */
  557. fep->stats.tx_fifo_errors++;
  558. if (sc & BD_ENET_TX_CSL) /* Carrier lost */
  559. fep->stats.tx_carrier_errors++;
  560. } else
  561. fep->stats.tx_packets++;
  562. if (sc & BD_ENET_TX_READY)
  563. printk(KERN_WARNING DRV_MODULE_NAME
  564. ": %s HEY! Enet xmit interrupt and TX_READY.\n",
  565. dev->name);
  566. /*
  567. * Deferred means some collisions occurred during transmit,
  568. * but we eventually sent the packet OK.
  569. */
  570. if (sc & BD_ENET_TX_DEF)
  571. fep->stats.collisions++;
  572. /*
  573. * Free the sk buffer associated with this last transmit.
  574. */
  575. dev_kfree_skb_irq(skb);
  576. fep->tx_skbuff[dirtyidx] = NULL;
  577. /*
  578. * Update pointer to next buffer descriptor to be transmitted.
  579. */
  580. if ((sc & BD_ENET_TX_WRAP) == 0)
  581. bdp++;
  582. else
  583. bdp = fep->tx_bd_base;
  584. /*
  585. * Since we have freed up a buffer, the ring is no longer
  586. * full.
  587. */
  588. if (!fep->tx_free++)
  589. do_wake = 1;
  590. }
  591. fep->dirty_tx = bdp;
  592. spin_unlock(&fep->lock);
  593. if (do_wake && netif_queue_stopped(dev))
  594. netif_wake_queue(dev);
  595. }
  596. /*
  597. * The interrupt handler.
  598. * This is called from the MPC core interrupt.
  599. */
  600. static irqreturn_t
  601. fec_enet_interrupt(int irq, void *dev_id)
  602. {
  603. struct net_device *dev = dev_id;
  604. struct fec_enet_private *fep;
  605. const struct fec_platform_info *fpi;
  606. fec_t *fecp;
  607. __u32 int_events;
  608. __u32 int_events_napi;
  609. if (unlikely(dev == NULL))
  610. return IRQ_NONE;
  611. fep = netdev_priv(dev);
  612. fecp = fep->fecp;
  613. fpi = fep->fpi;
  614. /*
  615. * Get the interrupt events that caused us to be here.
  616. */
  617. while ((int_events = FR(fecp, ievent) & FR(fecp, imask)) != 0) {
  618. if (!fpi->use_napi)
  619. FW(fecp, ievent, int_events);
  620. else {
  621. int_events_napi = int_events & ~(FEC_ENET_RXF | FEC_ENET_RXB);
  622. FW(fecp, ievent, int_events_napi);
  623. }
  624. if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
  625. FEC_ENET_BABT | FEC_ENET_EBERR)) != 0)
  626. printk(KERN_WARNING DRV_MODULE_NAME
  627. ": %s FEC ERROR(s) 0x%x\n",
  628. dev->name, int_events);
  629. if ((int_events & FEC_ENET_RXF) != 0) {
  630. if (!fpi->use_napi)
  631. fec_enet_rx_common(fep, dev, ~0);
  632. else {
  633. if (netif_rx_schedule_prep(dev, &fep->napi)) {
  634. /* disable rx interrupts */
  635. FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  636. __netif_rx_schedule(dev, &fep->napi);
  637. } else {
  638. printk(KERN_ERR DRV_MODULE_NAME
  639. ": %s driver bug! interrupt while in poll!\n",
  640. dev->name);
  641. FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  642. }
  643. }
  644. }
  645. if ((int_events & FEC_ENET_TXF) != 0)
  646. fec_enet_tx(dev);
  647. }
  648. return IRQ_HANDLED;
  649. }
  650. /* This interrupt occurs when the PHY detects a link change. */
  651. static irqreturn_t
  652. fec_mii_link_interrupt(int irq, void *dev_id)
  653. {
  654. struct net_device *dev = dev_id;
  655. struct fec_enet_private *fep;
  656. const struct fec_platform_info *fpi;
  657. if (unlikely(dev == NULL))
  658. return IRQ_NONE;
  659. fep = netdev_priv(dev);
  660. fpi = fep->fpi;
  661. if (!fpi->use_mdio)
  662. return IRQ_NONE;
  663. /*
  664. * Acknowledge the interrupt if possible. If we have not
  665. * found the PHY yet we can't process or acknowledge the
  666. * interrupt now. Instead we ignore this interrupt for now,
  667. * which we can do since it is edge triggered. It will be
  668. * acknowledged later by fec_enet_open().
  669. */
  670. if (!fep->phy)
  671. return IRQ_NONE;
  672. fec_mii_ack_int(dev);
  673. fec_mii_link_status_change_check(dev, 0);
  674. return IRQ_HANDLED;
  675. }
  676. /**********************************************************************************/
  677. static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
  678. {
  679. struct fec_enet_private *fep = netdev_priv(dev);
  680. fec_t *fecp = fep->fecp;
  681. cbd_t *bdp;
  682. int curidx;
  683. unsigned long flags;
  684. spin_lock_irqsave(&fep->tx_lock, flags);
  685. /*
  686. * Fill in a Tx ring entry
  687. */
  688. bdp = fep->cur_tx;
  689. if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) {
  690. netif_stop_queue(dev);
  691. spin_unlock_irqrestore(&fep->tx_lock, flags);
  692. /*
  693. * Ooops. All transmit buffers are full. Bail out.
  694. * This should not happen, since the tx queue should be stopped.
  695. */
  696. printk(KERN_WARNING DRV_MODULE_NAME
  697. ": %s tx queue full!.\n", dev->name);
  698. return 1;
  699. }
  700. curidx = bdp - fep->tx_bd_base;
  701. /*
  702. * Clear all of the status flags.
  703. */
  704. CBDC_SC(bdp, BD_ENET_TX_STATS);
  705. /*
  706. * Save skb pointer.
  707. */
  708. fep->tx_skbuff[curidx] = skb;
  709. fep->stats.tx_bytes += skb->len;
  710. /*
  711. * Push the data cache so the CPM does not get stale memory data.
  712. */
  713. CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
  714. skb->len, DMA_TO_DEVICE));
  715. CBDW_DATLEN(bdp, skb->len);
  716. dev->trans_start = jiffies;
  717. /*
  718. * If this was the last BD in the ring, start at the beginning again.
  719. */
  720. if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)
  721. fep->cur_tx++;
  722. else
  723. fep->cur_tx = fep->tx_bd_base;
  724. if (!--fep->tx_free)
  725. netif_stop_queue(dev);
  726. /*
  727. * Trigger transmission start
  728. */
  729. CBDS_SC(bdp, BD_ENET_TX_READY | BD_ENET_TX_INTR |
  730. BD_ENET_TX_LAST | BD_ENET_TX_TC);
  731. FW(fecp, x_des_active, 0x01000000);
  732. spin_unlock_irqrestore(&fep->tx_lock, flags);
  733. return 0;
  734. }
  735. static void fec_timeout(struct net_device *dev)
  736. {
  737. struct fec_enet_private *fep = netdev_priv(dev);
  738. fep->stats.tx_errors++;
  739. if (fep->tx_free)
  740. netif_wake_queue(dev);
  741. /* check link status again */
  742. fec_mii_link_status_change_check(dev, 0);
  743. }
  744. static int fec_enet_open(struct net_device *dev)
  745. {
  746. struct fec_enet_private *fep = netdev_priv(dev);
  747. const struct fec_platform_info *fpi = fep->fpi;
  748. unsigned long flags;
  749. napi_enable(&fep->napi);
  750. /* Install our interrupt handler. */
  751. if (request_irq(fpi->fec_irq, fec_enet_interrupt, 0, "fec", dev) != 0) {
  752. printk(KERN_ERR DRV_MODULE_NAME
  753. ": %s Could not allocate FEC IRQ!", dev->name);
  754. napi_disable(&fep->napi);
  755. return -EINVAL;
  756. }
  757. /* Install our phy interrupt handler */
  758. if (fpi->phy_irq != -1 &&
  759. request_irq(fpi->phy_irq, fec_mii_link_interrupt, 0, "fec-phy",
  760. dev) != 0) {
  761. printk(KERN_ERR DRV_MODULE_NAME
  762. ": %s Could not allocate PHY IRQ!", dev->name);
  763. free_irq(fpi->fec_irq, dev);
  764. napi_disable(&fep->napi);
  765. return -EINVAL;
  766. }
  767. if (fpi->use_mdio) {
  768. fec_mii_startup(dev);
  769. netif_carrier_off(dev);
  770. fec_mii_link_status_change_check(dev, 1);
  771. } else {
  772. spin_lock_irqsave(&fep->lock, flags);
  773. fec_restart(dev, 1, 100); /* XXX this sucks */
  774. spin_unlock_irqrestore(&fep->lock, flags);
  775. netif_carrier_on(dev);
  776. netif_start_queue(dev);
  777. }
  778. return 0;
  779. }
  780. static int fec_enet_close(struct net_device *dev)
  781. {
  782. struct fec_enet_private *fep = netdev_priv(dev);
  783. const struct fec_platform_info *fpi = fep->fpi;
  784. unsigned long flags;
  785. netif_stop_queue(dev);
  786. napi_disable(&fep->napi);
  787. netif_carrier_off(dev);
  788. if (fpi->use_mdio)
  789. fec_mii_shutdown(dev);
  790. spin_lock_irqsave(&fep->lock, flags);
  791. fec_stop(dev);
  792. spin_unlock_irqrestore(&fep->lock, flags);
  793. /* release any irqs */
  794. if (fpi->phy_irq != -1)
  795. free_irq(fpi->phy_irq, dev);
  796. free_irq(fpi->fec_irq, dev);
  797. return 0;
  798. }
  799. static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
  800. {
  801. struct fec_enet_private *fep = netdev_priv(dev);
  802. return &fep->stats;
  803. }
  804. static int fec_enet_poll(struct napi_struct *napi, int budget)
  805. {
  806. struct fec_enet_private *fep = container_of(napi, struct fec_enet_private, napi);
  807. struct net_device *dev = fep->dev;
  808. return fec_enet_rx_common(fep, dev, budget);
  809. }
  810. /*************************************************************************/
  811. static void fec_get_drvinfo(struct net_device *dev,
  812. struct ethtool_drvinfo *info)
  813. {
  814. strcpy(info->driver, DRV_MODULE_NAME);
  815. strcpy(info->version, DRV_MODULE_VERSION);
  816. }
  817. static int fec_get_regs_len(struct net_device *dev)
  818. {
  819. return sizeof(fec_t);
  820. }
  821. static void fec_get_regs(struct net_device *dev, struct ethtool_regs *regs,
  822. void *p)
  823. {
  824. struct fec_enet_private *fep = netdev_priv(dev);
  825. unsigned long flags;
  826. if (regs->len < sizeof(fec_t))
  827. return;
  828. regs->version = 0;
  829. spin_lock_irqsave(&fep->lock, flags);
  830. memcpy_fromio(p, fep->fecp, sizeof(fec_t));
  831. spin_unlock_irqrestore(&fep->lock, flags);
  832. }
  833. static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  834. {
  835. struct fec_enet_private *fep = netdev_priv(dev);
  836. unsigned long flags;
  837. int rc;
  838. spin_lock_irqsave(&fep->lock, flags);
  839. rc = mii_ethtool_gset(&fep->mii_if, cmd);
  840. spin_unlock_irqrestore(&fep->lock, flags);
  841. return rc;
  842. }
  843. static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  844. {
  845. struct fec_enet_private *fep = netdev_priv(dev);
  846. unsigned long flags;
  847. int rc;
  848. spin_lock_irqsave(&fep->lock, flags);
  849. rc = mii_ethtool_sset(&fep->mii_if, cmd);
  850. spin_unlock_irqrestore(&fep->lock, flags);
  851. return rc;
  852. }
  853. static int fec_nway_reset(struct net_device *dev)
  854. {
  855. struct fec_enet_private *fep = netdev_priv(dev);
  856. return mii_nway_restart(&fep->mii_if);
  857. }
  858. static __u32 fec_get_msglevel(struct net_device *dev)
  859. {
  860. struct fec_enet_private *fep = netdev_priv(dev);
  861. return fep->msg_enable;
  862. }
  863. static void fec_set_msglevel(struct net_device *dev, __u32 value)
  864. {
  865. struct fec_enet_private *fep = netdev_priv(dev);
  866. fep->msg_enable = value;
  867. }
  868. static const struct ethtool_ops fec_ethtool_ops = {
  869. .get_drvinfo = fec_get_drvinfo,
  870. .get_regs_len = fec_get_regs_len,
  871. .get_settings = fec_get_settings,
  872. .set_settings = fec_set_settings,
  873. .nway_reset = fec_nway_reset,
  874. .get_link = ethtool_op_get_link,
  875. .get_msglevel = fec_get_msglevel,
  876. .set_msglevel = fec_set_msglevel,
  877. .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
  878. .set_sg = ethtool_op_set_sg,
  879. .get_regs = fec_get_regs,
  880. };
  881. static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  882. {
  883. struct fec_enet_private *fep = netdev_priv(dev);
  884. struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
  885. unsigned long flags;
  886. int rc;
  887. if (!netif_running(dev))
  888. return -EINVAL;
  889. spin_lock_irqsave(&fep->lock, flags);
  890. rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL);
  891. spin_unlock_irqrestore(&fep->lock, flags);
  892. return rc;
  893. }
  894. int fec_8xx_init_one(const struct fec_platform_info *fpi,
  895. struct net_device **devp)
  896. {
  897. immap_t *immap = (immap_t *) IMAP_ADDR;
  898. static int fec_8xx_version_printed = 0;
  899. struct net_device *dev = NULL;
  900. struct fec_enet_private *fep = NULL;
  901. fec_t *fecp = NULL;
  902. int i;
  903. int err = 0;
  904. int registered = 0;
  905. __u32 siel;
  906. *devp = NULL;
  907. switch (fpi->fec_no) {
  908. case 0:
  909. fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
  910. break;
  911. #ifdef CONFIG_DUET
  912. case 1:
  913. fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec2;
  914. break;
  915. #endif
  916. default:
  917. return -EINVAL;
  918. }
  919. if (fec_8xx_version_printed++ == 0)
  920. printk(KERN_INFO "%s", version);
  921. i = sizeof(*fep) + (sizeof(struct sk_buff **) *
  922. (fpi->rx_ring + fpi->tx_ring));
  923. dev = alloc_etherdev(i);
  924. if (!dev) {
  925. err = -ENOMEM;
  926. goto err;
  927. }
  928. fep = netdev_priv(dev);
  929. fep->dev = dev;
  930. /* partial reset of FEC */
  931. fec_whack_reset(fecp);
  932. /* point rx_skbuff, tx_skbuff */
  933. fep->rx_skbuff = (struct sk_buff **)&fep[1];
  934. fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
  935. fep->fecp = fecp;
  936. fep->fpi = fpi;
  937. /* init locks */
  938. spin_lock_init(&fep->lock);
  939. spin_lock_init(&fep->tx_lock);
  940. /*
  941. * Set the Ethernet address.
  942. */
  943. for (i = 0; i < 6; i++)
  944. dev->dev_addr[i] = fpi->macaddr[i];
  945. fep->ring_base = dma_alloc_coherent(NULL,
  946. (fpi->tx_ring + fpi->rx_ring) *
  947. sizeof(cbd_t), &fep->ring_mem_addr,
  948. GFP_KERNEL);
  949. if (fep->ring_base == NULL) {
  950. printk(KERN_ERR DRV_MODULE_NAME
  951. ": %s dma alloc failed.\n", dev->name);
  952. err = -ENOMEM;
  953. goto err;
  954. }
  955. /*
  956. * Set receive and transmit descriptor base.
  957. */
  958. fep->rx_bd_base = fep->ring_base;
  959. fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
  960. /* initialize ring size variables */
  961. fep->tx_ring = fpi->tx_ring;
  962. fep->rx_ring = fpi->rx_ring;
  963. /* SIU interrupt */
  964. if (fpi->phy_irq != -1 &&
  965. (fpi->phy_irq >= SIU_IRQ0 && fpi->phy_irq < SIU_LEVEL7)) {
  966. siel = in_be32(&immap->im_siu_conf.sc_siel);
  967. if ((fpi->phy_irq & 1) == 0)
  968. siel |= (0x80000000 >> fpi->phy_irq);
  969. else
  970. siel &= ~(0x80000000 >> (fpi->phy_irq & ~1));
  971. out_be32(&immap->im_siu_conf.sc_siel, siel);
  972. }
  973. /*
  974. * The FEC Ethernet specific entries in the device structure.
  975. */
  976. dev->open = fec_enet_open;
  977. dev->hard_start_xmit = fec_enet_start_xmit;
  978. dev->tx_timeout = fec_timeout;
  979. dev->watchdog_timeo = TX_TIMEOUT;
  980. dev->stop = fec_enet_close;
  981. dev->get_stats = fec_enet_get_stats;
  982. dev->set_multicast_list = fec_set_multicast_list;
  983. dev->set_mac_address = fec_set_mac_address;
  984. netif_napi_add(dev, &fec->napi,
  985. fec_enet_poll, fpi->napi_weight);
  986. dev->ethtool_ops = &fec_ethtool_ops;
  987. dev->do_ioctl = fec_ioctl;
  988. fep->fec_phy_speed =
  989. ((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1;
  990. init_timer(&fep->phy_timer_list);
  991. /* partial reset of FEC so that only MII works */
  992. FW(fecp, mii_speed, fep->fec_phy_speed);
  993. FW(fecp, ievent, 0xffc0);
  994. FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
  995. FW(fecp, imask, 0);
  996. FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  997. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  998. netif_carrier_off(dev);
  999. err = register_netdev(dev);
  1000. if (err != 0)
  1001. goto err;
  1002. registered = 1;
  1003. if (fpi->use_mdio) {
  1004. fep->mii_if.dev = dev;
  1005. fep->mii_if.mdio_read = fec_mii_read;
  1006. fep->mii_if.mdio_write = fec_mii_write;
  1007. fep->mii_if.phy_id_mask = 0x1f;
  1008. fep->mii_if.reg_num_mask = 0x1f;
  1009. fep->mii_if.phy_id = fec_mii_phy_id_detect(dev);
  1010. }
  1011. *devp = dev;
  1012. return 0;
  1013. err:
  1014. if (dev != NULL) {
  1015. if (fecp != NULL)
  1016. fec_whack_reset(fecp);
  1017. if (registered)
  1018. unregister_netdev(dev);
  1019. if (fep != NULL) {
  1020. if (fep->ring_base)
  1021. dma_free_coherent(NULL,
  1022. (fpi->tx_ring +
  1023. fpi->rx_ring) *
  1024. sizeof(cbd_t), fep->ring_base,
  1025. fep->ring_mem_addr);
  1026. }
  1027. free_netdev(dev);
  1028. }
  1029. return err;
  1030. }
  1031. int fec_8xx_cleanup_one(struct net_device *dev)
  1032. {
  1033. struct fec_enet_private *fep = netdev_priv(dev);
  1034. fec_t *fecp = fep->fecp;
  1035. const struct fec_platform_info *fpi = fep->fpi;
  1036. fec_whack_reset(fecp);
  1037. unregister_netdev(dev);
  1038. dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
  1039. fep->ring_base, fep->ring_mem_addr);
  1040. free_netdev(dev);
  1041. return 0;
  1042. }
  1043. /**************************************************************************************/
  1044. /**************************************************************************************/
  1045. /**************************************************************************************/
  1046. static int __init fec_8xx_init(void)
  1047. {
  1048. return fec_8xx_platform_init();
  1049. }
  1050. static void __exit fec_8xx_cleanup(void)
  1051. {
  1052. fec_8xx_platform_cleanup();
  1053. }
  1054. /**************************************************************************************/
  1055. /**************************************************************************************/
  1056. /**************************************************************************************/
  1057. module_init(fec_8xx_init);
  1058. module_exit(fec_8xx_cleanup);