dm9000.c 28 KB

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  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. *
  52. * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
  53. * * fixed spinlock call without pointer
  54. * * ensure spinlock is initialised
  55. */
  56. #include <linux/module.h>
  57. #include <linux/ioport.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/init.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/spinlock.h>
  63. #include <linux/crc32.h>
  64. #include <linux/mii.h>
  65. #include <linux/dm9000.h>
  66. #include <linux/delay.h>
  67. #include <linux/platform_device.h>
  68. #include <asm/delay.h>
  69. #include <asm/irq.h>
  70. #include <asm/io.h>
  71. #include "dm9000.h"
  72. /* Board/System/Debug information/definition ---------------- */
  73. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  74. #define CARDNAME "dm9000"
  75. #define PFX CARDNAME ": "
  76. #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
  77. #define DM9000_DEBUG 0
  78. #if DM9000_DEBUG > 2
  79. #define PRINTK3(args...) printk(CARDNAME ": " args)
  80. #else
  81. #define PRINTK3(args...) do { } while(0)
  82. #endif
  83. #if DM9000_DEBUG > 1
  84. #define PRINTK2(args...) printk(CARDNAME ": " args)
  85. #else
  86. #define PRINTK2(args...) do { } while(0)
  87. #endif
  88. #if DM9000_DEBUG > 0
  89. #define PRINTK1(args...) printk(CARDNAME ": " args)
  90. #define PRINTK(args...) printk(CARDNAME ": " args)
  91. #else
  92. #define PRINTK1(args...) do { } while(0)
  93. #define PRINTK(args...) printk(KERN_DEBUG args)
  94. #endif
  95. #ifdef CONFIG_BLACKFIN
  96. #define readsb insb
  97. #define readsw insw
  98. #define readsl insl
  99. #define writesb outsb
  100. #define writesw outsw
  101. #define writesl outsl
  102. #define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQF_TRIGGER_HIGH)
  103. #else
  104. #define DM9000_IRQ_FLAGS IRQF_SHARED
  105. #endif
  106. /*
  107. * Transmit timeout, default 5 seconds.
  108. */
  109. static int watchdog = 5000;
  110. module_param(watchdog, int, 0400);
  111. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  112. /* Structure/enum declaration ------------------------------- */
  113. typedef struct board_info {
  114. void __iomem *io_addr; /* Register I/O base address */
  115. void __iomem *io_data; /* Data I/O address */
  116. u16 irq; /* IRQ */
  117. u16 tx_pkt_cnt;
  118. u16 queue_pkt_len;
  119. u16 queue_start_addr;
  120. u16 dbug_cnt;
  121. u8 io_mode; /* 0:word, 2:byte */
  122. u8 phy_addr;
  123. void (*inblk)(void __iomem *port, void *data, int length);
  124. void (*outblk)(void __iomem *port, void *data, int length);
  125. void (*dumpblk)(void __iomem *port, int length);
  126. struct resource *addr_res; /* resources found */
  127. struct resource *data_res;
  128. struct resource *addr_req; /* resources requested */
  129. struct resource *data_req;
  130. struct resource *irq_res;
  131. struct timer_list timer;
  132. unsigned char srom[128];
  133. spinlock_t lock;
  134. struct mii_if_info mii;
  135. u32 msg_enable;
  136. } board_info_t;
  137. /* function declaration ------------------------------------- */
  138. static int dm9000_probe(struct platform_device *);
  139. static int dm9000_open(struct net_device *);
  140. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  141. static int dm9000_stop(struct net_device *);
  142. static void dm9000_timer(unsigned long);
  143. static void dm9000_init_dm9000(struct net_device *);
  144. static irqreturn_t dm9000_interrupt(int, void *);
  145. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  146. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  147. int value);
  148. static u16 read_srom_word(board_info_t *, int);
  149. static void dm9000_rx(struct net_device *);
  150. static void dm9000_hash_table(struct net_device *);
  151. //#define DM9000_PROGRAM_EEPROM
  152. #ifdef DM9000_PROGRAM_EEPROM
  153. static void program_eeprom(board_info_t * db);
  154. #endif
  155. /* DM9000 network board routine ---------------------------- */
  156. static void
  157. dm9000_reset(board_info_t * db)
  158. {
  159. PRINTK1("dm9000x: resetting\n");
  160. /* RESET device */
  161. writeb(DM9000_NCR, db->io_addr);
  162. udelay(200);
  163. writeb(NCR_RST, db->io_data);
  164. udelay(200);
  165. }
  166. /*
  167. * Read a byte from I/O port
  168. */
  169. static u8
  170. ior(board_info_t * db, int reg)
  171. {
  172. writeb(reg, db->io_addr);
  173. return readb(db->io_data);
  174. }
  175. /*
  176. * Write a byte to I/O port
  177. */
  178. static void
  179. iow(board_info_t * db, int reg, int value)
  180. {
  181. writeb(reg, db->io_addr);
  182. writeb(value, db->io_data);
  183. }
  184. /* routines for sending block to chip */
  185. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  186. {
  187. writesb(reg, data, count);
  188. }
  189. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  190. {
  191. writesw(reg, data, (count+1) >> 1);
  192. }
  193. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  194. {
  195. writesl(reg, data, (count+3) >> 2);
  196. }
  197. /* input block from chip to memory */
  198. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  199. {
  200. readsb(reg, data, count);
  201. }
  202. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  203. {
  204. readsw(reg, data, (count+1) >> 1);
  205. }
  206. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  207. {
  208. readsl(reg, data, (count+3) >> 2);
  209. }
  210. /* dump block from chip to null */
  211. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  212. {
  213. int i;
  214. int tmp;
  215. for (i = 0; i < count; i++)
  216. tmp = readb(reg);
  217. }
  218. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  219. {
  220. int i;
  221. int tmp;
  222. count = (count + 1) >> 1;
  223. for (i = 0; i < count; i++)
  224. tmp = readw(reg);
  225. }
  226. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  227. {
  228. int i;
  229. int tmp;
  230. count = (count + 3) >> 2;
  231. for (i = 0; i < count; i++)
  232. tmp = readl(reg);
  233. }
  234. /* dm9000_set_io
  235. *
  236. * select the specified set of io routines to use with the
  237. * device
  238. */
  239. static void dm9000_set_io(struct board_info *db, int byte_width)
  240. {
  241. /* use the size of the data resource to work out what IO
  242. * routines we want to use
  243. */
  244. switch (byte_width) {
  245. case 1:
  246. db->dumpblk = dm9000_dumpblk_8bit;
  247. db->outblk = dm9000_outblk_8bit;
  248. db->inblk = dm9000_inblk_8bit;
  249. break;
  250. case 2:
  251. db->dumpblk = dm9000_dumpblk_16bit;
  252. db->outblk = dm9000_outblk_16bit;
  253. db->inblk = dm9000_inblk_16bit;
  254. break;
  255. case 3:
  256. printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
  257. db->dumpblk = dm9000_dumpblk_16bit;
  258. db->outblk = dm9000_outblk_16bit;
  259. db->inblk = dm9000_inblk_16bit;
  260. break;
  261. case 4:
  262. default:
  263. db->dumpblk = dm9000_dumpblk_32bit;
  264. db->outblk = dm9000_outblk_32bit;
  265. db->inblk = dm9000_inblk_32bit;
  266. break;
  267. }
  268. }
  269. /* Our watchdog timed out. Called by the networking layer */
  270. static void dm9000_timeout(struct net_device *dev)
  271. {
  272. board_info_t *db = (board_info_t *) dev->priv;
  273. u8 reg_save;
  274. unsigned long flags;
  275. /* Save previous register address */
  276. reg_save = readb(db->io_addr);
  277. spin_lock_irqsave(&db->lock,flags);
  278. netif_stop_queue(dev);
  279. dm9000_reset(db);
  280. dm9000_init_dm9000(dev);
  281. /* We can accept TX packets again */
  282. dev->trans_start = jiffies;
  283. netif_wake_queue(dev);
  284. /* Restore previous register address */
  285. writeb(reg_save, db->io_addr);
  286. spin_unlock_irqrestore(&db->lock,flags);
  287. }
  288. #ifdef CONFIG_NET_POLL_CONTROLLER
  289. /*
  290. *Used by netconsole
  291. */
  292. static void dm9000_poll_controller(struct net_device *dev)
  293. {
  294. disable_irq(dev->irq);
  295. dm9000_interrupt(dev->irq,dev);
  296. enable_irq(dev->irq);
  297. }
  298. #endif
  299. /* dm9000_release_board
  300. *
  301. * release a board, and any mapped resources
  302. */
  303. static void
  304. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  305. {
  306. if (db->data_res == NULL) {
  307. if (db->addr_res != NULL)
  308. release_mem_region((unsigned long)db->io_addr, 4);
  309. return;
  310. }
  311. /* unmap our resources */
  312. iounmap(db->io_addr);
  313. iounmap(db->io_data);
  314. /* release the resources */
  315. if (db->data_req != NULL) {
  316. release_resource(db->data_req);
  317. kfree(db->data_req);
  318. }
  319. if (db->addr_req != NULL) {
  320. release_resource(db->addr_req);
  321. kfree(db->addr_req);
  322. }
  323. }
  324. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  325. /*
  326. * Search DM9000 board, allocate space and register it
  327. */
  328. static int
  329. dm9000_probe(struct platform_device *pdev)
  330. {
  331. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  332. struct board_info *db; /* Point a board information structure */
  333. struct net_device *ndev;
  334. unsigned long base;
  335. int ret = 0;
  336. int iosize;
  337. int i;
  338. u32 id_val;
  339. /* Init network device */
  340. ndev = alloc_etherdev(sizeof (struct board_info));
  341. if (!ndev) {
  342. printk("%s: could not allocate device.\n", CARDNAME);
  343. return -ENOMEM;
  344. }
  345. SET_NETDEV_DEV(ndev, &pdev->dev);
  346. PRINTK2("dm9000_probe()");
  347. /* setup board info structure */
  348. db = (struct board_info *) ndev->priv;
  349. memset(db, 0, sizeof (*db));
  350. spin_lock_init(&db->lock);
  351. if (pdev->num_resources < 2) {
  352. ret = -ENODEV;
  353. goto out;
  354. } else if (pdev->num_resources == 2) {
  355. base = pdev->resource[0].start;
  356. if (!request_mem_region(base, 4, ndev->name)) {
  357. ret = -EBUSY;
  358. goto out;
  359. }
  360. ndev->base_addr = base;
  361. ndev->irq = pdev->resource[1].start;
  362. db->io_addr = (void __iomem *)base;
  363. db->io_data = (void __iomem *)(base + 4);
  364. /* ensure at least we have a default set of IO routines */
  365. dm9000_set_io(db, 2);
  366. } else {
  367. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  368. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  369. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  370. if (db->addr_res == NULL || db->data_res == NULL ||
  371. db->irq_res == NULL) {
  372. printk(KERN_ERR PFX "insufficient resources\n");
  373. ret = -ENOENT;
  374. goto out;
  375. }
  376. i = res_size(db->addr_res);
  377. db->addr_req = request_mem_region(db->addr_res->start, i,
  378. pdev->name);
  379. if (db->addr_req == NULL) {
  380. printk(KERN_ERR PFX "cannot claim address reg area\n");
  381. ret = -EIO;
  382. goto out;
  383. }
  384. db->io_addr = ioremap(db->addr_res->start, i);
  385. if (db->io_addr == NULL) {
  386. printk(KERN_ERR "failed to ioremap address reg\n");
  387. ret = -EINVAL;
  388. goto out;
  389. }
  390. iosize = res_size(db->data_res);
  391. db->data_req = request_mem_region(db->data_res->start, iosize,
  392. pdev->name);
  393. if (db->data_req == NULL) {
  394. printk(KERN_ERR PFX "cannot claim data reg area\n");
  395. ret = -EIO;
  396. goto out;
  397. }
  398. db->io_data = ioremap(db->data_res->start, iosize);
  399. if (db->io_data == NULL) {
  400. printk(KERN_ERR "failed to ioremap data reg\n");
  401. ret = -EINVAL;
  402. goto out;
  403. }
  404. /* fill in parameters for net-dev structure */
  405. ndev->base_addr = (unsigned long)db->io_addr;
  406. ndev->irq = db->irq_res->start;
  407. /* ensure at least we have a default set of IO routines */
  408. dm9000_set_io(db, iosize);
  409. }
  410. /* check to see if anything is being over-ridden */
  411. if (pdata != NULL) {
  412. /* check to see if the driver wants to over-ride the
  413. * default IO width */
  414. if (pdata->flags & DM9000_PLATF_8BITONLY)
  415. dm9000_set_io(db, 1);
  416. if (pdata->flags & DM9000_PLATF_16BITONLY)
  417. dm9000_set_io(db, 2);
  418. if (pdata->flags & DM9000_PLATF_32BITONLY)
  419. dm9000_set_io(db, 4);
  420. /* check to see if there are any IO routine
  421. * over-rides */
  422. if (pdata->inblk != NULL)
  423. db->inblk = pdata->inblk;
  424. if (pdata->outblk != NULL)
  425. db->outblk = pdata->outblk;
  426. if (pdata->dumpblk != NULL)
  427. db->dumpblk = pdata->dumpblk;
  428. }
  429. dm9000_reset(db);
  430. /* try two times, DM9000 sometimes gets the first read wrong */
  431. for (i = 0; i < 2; i++) {
  432. id_val = ior(db, DM9000_VIDL);
  433. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  434. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  435. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  436. if (id_val == DM9000_ID)
  437. break;
  438. printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
  439. }
  440. if (id_val != DM9000_ID) {
  441. printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
  442. ret = -ENODEV;
  443. goto out;
  444. }
  445. /* from this point we assume that we have found a DM9000 */
  446. /* driver system function */
  447. ether_setup(ndev);
  448. ndev->open = &dm9000_open;
  449. ndev->hard_start_xmit = &dm9000_start_xmit;
  450. ndev->tx_timeout = &dm9000_timeout;
  451. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  452. ndev->stop = &dm9000_stop;
  453. ndev->set_multicast_list = &dm9000_hash_table;
  454. #ifdef CONFIG_NET_POLL_CONTROLLER
  455. ndev->poll_controller = &dm9000_poll_controller;
  456. #endif
  457. #ifdef DM9000_PROGRAM_EEPROM
  458. program_eeprom(db);
  459. #endif
  460. db->msg_enable = NETIF_MSG_LINK;
  461. db->mii.phy_id_mask = 0x1f;
  462. db->mii.reg_num_mask = 0x1f;
  463. db->mii.force_media = 0;
  464. db->mii.full_duplex = 0;
  465. db->mii.dev = ndev;
  466. db->mii.mdio_read = dm9000_phy_read;
  467. db->mii.mdio_write = dm9000_phy_write;
  468. /* Read SROM content */
  469. for (i = 0; i < 64; i++)
  470. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  471. /* Set Node Address */
  472. for (i = 0; i < 6; i++)
  473. ndev->dev_addr[i] = db->srom[i];
  474. if (!is_valid_ether_addr(ndev->dev_addr)) {
  475. /* try reading from mac */
  476. for (i = 0; i < 6; i++)
  477. ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
  478. }
  479. if (!is_valid_ether_addr(ndev->dev_addr))
  480. printk("%s: Invalid ethernet MAC address. Please "
  481. "set using ifconfig\n", ndev->name);
  482. platform_set_drvdata(pdev, ndev);
  483. ret = register_netdev(ndev);
  484. if (ret == 0) {
  485. DECLARE_MAC_BUF(mac);
  486. printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
  487. ndev->name, db->io_addr, db->io_data, ndev->irq,
  488. print_mac(mac, ndev->dev_addr));
  489. }
  490. return 0;
  491. out:
  492. printk("%s: not found (%d).\n", CARDNAME, ret);
  493. dm9000_release_board(pdev, db);
  494. free_netdev(ndev);
  495. return ret;
  496. }
  497. /*
  498. * Open the interface.
  499. * The interface is opened whenever "ifconfig" actives it.
  500. */
  501. static int
  502. dm9000_open(struct net_device *dev)
  503. {
  504. board_info_t *db = (board_info_t *) dev->priv;
  505. PRINTK2("entering dm9000_open\n");
  506. if (request_irq(dev->irq, &dm9000_interrupt, DM9000_IRQ_FLAGS, dev->name, dev))
  507. return -EAGAIN;
  508. /* Initialize DM9000 board */
  509. dm9000_reset(db);
  510. dm9000_init_dm9000(dev);
  511. /* Init driver variable */
  512. db->dbug_cnt = 0;
  513. /* set and active a timer process */
  514. init_timer(&db->timer);
  515. db->timer.expires = DM9000_TIMER_WUT;
  516. db->timer.data = (unsigned long) dev;
  517. db->timer.function = &dm9000_timer;
  518. add_timer(&db->timer);
  519. mii_check_media(&db->mii, netif_msg_link(db), 1);
  520. netif_start_queue(dev);
  521. return 0;
  522. }
  523. /*
  524. * Initilize dm9000 board
  525. */
  526. static void
  527. dm9000_init_dm9000(struct net_device *dev)
  528. {
  529. board_info_t *db = (board_info_t *) dev->priv;
  530. PRINTK1("entering %s\n",__FUNCTION__);
  531. /* I/O mode */
  532. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  533. /* GPIO0 on pre-activate PHY */
  534. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  535. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  536. iow(db, DM9000_GPR, 0); /* Enable PHY */
  537. /* Program operating register */
  538. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  539. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  540. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  541. iow(db, DM9000_SMCR, 0); /* Special Mode */
  542. /* clear TX status */
  543. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  544. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  545. /* Set address filter table */
  546. dm9000_hash_table(dev);
  547. /* Activate DM9000 */
  548. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  549. /* Enable TX/RX interrupt mask */
  550. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  551. /* Init Driver variable */
  552. db->tx_pkt_cnt = 0;
  553. db->queue_pkt_len = 0;
  554. dev->trans_start = 0;
  555. }
  556. /*
  557. * Hardware start transmission.
  558. * Send a packet to media from the upper layer.
  559. */
  560. static int
  561. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  562. {
  563. unsigned long flags;
  564. board_info_t *db = (board_info_t *) dev->priv;
  565. PRINTK3("dm9000_start_xmit\n");
  566. if (db->tx_pkt_cnt > 1)
  567. return 1;
  568. spin_lock_irqsave(&db->lock, flags);
  569. /* Move data to DM9000 TX RAM */
  570. writeb(DM9000_MWCMD, db->io_addr);
  571. (db->outblk)(db->io_data, skb->data, skb->len);
  572. dev->stats.tx_bytes += skb->len;
  573. db->tx_pkt_cnt++;
  574. /* TX control: First packet immediately send, second packet queue */
  575. if (db->tx_pkt_cnt == 1) {
  576. /* Set TX length to DM9000 */
  577. iow(db, DM9000_TXPLL, skb->len & 0xff);
  578. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  579. /* Issue TX polling command */
  580. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  581. dev->trans_start = jiffies; /* save the time stamp */
  582. } else {
  583. /* Second packet */
  584. db->queue_pkt_len = skb->len;
  585. netif_stop_queue(dev);
  586. }
  587. spin_unlock_irqrestore(&db->lock, flags);
  588. /* free this SKB */
  589. dev_kfree_skb(skb);
  590. return 0;
  591. }
  592. static void
  593. dm9000_shutdown(struct net_device *dev)
  594. {
  595. board_info_t *db = (board_info_t *) dev->priv;
  596. /* RESET device */
  597. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  598. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  599. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  600. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  601. }
  602. /*
  603. * Stop the interface.
  604. * The interface is stopped when it is brought.
  605. */
  606. static int
  607. dm9000_stop(struct net_device *ndev)
  608. {
  609. board_info_t *db = (board_info_t *) ndev->priv;
  610. PRINTK1("entering %s\n",__FUNCTION__);
  611. /* deleted timer */
  612. del_timer(&db->timer);
  613. netif_stop_queue(ndev);
  614. netif_carrier_off(ndev);
  615. /* free interrupt */
  616. free_irq(ndev->irq, ndev);
  617. dm9000_shutdown(ndev);
  618. return 0;
  619. }
  620. /*
  621. * DM9000 interrupt handler
  622. * receive the packet to upper layer, free the transmitted packet
  623. */
  624. static void
  625. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  626. {
  627. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  628. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  629. /* One packet sent complete */
  630. db->tx_pkt_cnt--;
  631. dev->stats.tx_packets++;
  632. /* Queue packet check & send */
  633. if (db->tx_pkt_cnt > 0) {
  634. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  635. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  636. iow(db, DM9000_TCR, TCR_TXREQ);
  637. dev->trans_start = jiffies;
  638. }
  639. netif_wake_queue(dev);
  640. }
  641. }
  642. static irqreturn_t
  643. dm9000_interrupt(int irq, void *dev_id)
  644. {
  645. struct net_device *dev = dev_id;
  646. board_info_t *db;
  647. int int_status;
  648. u8 reg_save;
  649. PRINTK3("entering %s\n",__FUNCTION__);
  650. if (!dev) {
  651. PRINTK1("dm9000_interrupt() without DEVICE arg\n");
  652. return IRQ_HANDLED;
  653. }
  654. /* A real interrupt coming */
  655. db = (board_info_t *) dev->priv;
  656. spin_lock(&db->lock);
  657. /* Save previous register address */
  658. reg_save = readb(db->io_addr);
  659. /* Disable all interrupts */
  660. iow(db, DM9000_IMR, IMR_PAR);
  661. /* Got DM9000 interrupt status */
  662. int_status = ior(db, DM9000_ISR); /* Got ISR */
  663. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  664. /* Received the coming packet */
  665. if (int_status & ISR_PRS)
  666. dm9000_rx(dev);
  667. /* Trnasmit Interrupt check */
  668. if (int_status & ISR_PTS)
  669. dm9000_tx_done(dev, db);
  670. /* Re-enable interrupt mask */
  671. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  672. /* Restore previous register address */
  673. writeb(reg_save, db->io_addr);
  674. spin_unlock(&db->lock);
  675. return IRQ_HANDLED;
  676. }
  677. /*
  678. * A periodic timer routine
  679. * Dynamic media sense, allocated Rx buffer...
  680. */
  681. static void
  682. dm9000_timer(unsigned long data)
  683. {
  684. struct net_device *dev = (struct net_device *) data;
  685. board_info_t *db = (board_info_t *) dev->priv;
  686. PRINTK3("dm9000_timer()\n");
  687. mii_check_media(&db->mii, netif_msg_link(db), 0);
  688. /* Set timer again */
  689. db->timer.expires = DM9000_TIMER_WUT;
  690. add_timer(&db->timer);
  691. }
  692. struct dm9000_rxhdr {
  693. u16 RxStatus;
  694. u16 RxLen;
  695. } __attribute__((__packed__));
  696. /*
  697. * Received a packet and pass to upper layer
  698. */
  699. static void
  700. dm9000_rx(struct net_device *dev)
  701. {
  702. board_info_t *db = (board_info_t *) dev->priv;
  703. struct dm9000_rxhdr rxhdr;
  704. struct sk_buff *skb;
  705. u8 rxbyte, *rdptr;
  706. bool GoodPacket;
  707. int RxLen;
  708. /* Check packet ready or not */
  709. do {
  710. ior(db, DM9000_MRCMDX); /* Dummy read */
  711. /* Get most updated data */
  712. rxbyte = readb(db->io_data);
  713. /* Status check: this byte must be 0 or 1 */
  714. if (rxbyte > DM9000_PKT_RDY) {
  715. printk("status check failed: %d\n", rxbyte);
  716. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  717. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  718. return;
  719. }
  720. if (rxbyte != DM9000_PKT_RDY)
  721. return;
  722. /* A packet ready now & Get status/length */
  723. GoodPacket = true;
  724. writeb(DM9000_MRCMD, db->io_addr);
  725. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  726. RxLen = rxhdr.RxLen;
  727. /* Packet Status check */
  728. if (RxLen < 0x40) {
  729. GoodPacket = false;
  730. PRINTK1("Bad Packet received (runt)\n");
  731. }
  732. if (RxLen > DM9000_PKT_MAX) {
  733. PRINTK1("RST: RX Len:%x\n", RxLen);
  734. }
  735. if (rxhdr.RxStatus & 0xbf00) {
  736. GoodPacket = false;
  737. if (rxhdr.RxStatus & 0x100) {
  738. PRINTK1("fifo error\n");
  739. dev->stats.rx_fifo_errors++;
  740. }
  741. if (rxhdr.RxStatus & 0x200) {
  742. PRINTK1("crc error\n");
  743. dev->stats.rx_crc_errors++;
  744. }
  745. if (rxhdr.RxStatus & 0x8000) {
  746. PRINTK1("length error\n");
  747. dev->stats.rx_length_errors++;
  748. }
  749. }
  750. /* Move data from DM9000 */
  751. if (GoodPacket
  752. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  753. skb_reserve(skb, 2);
  754. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  755. /* Read received packet from RX SRAM */
  756. (db->inblk)(db->io_data, rdptr, RxLen);
  757. dev->stats.rx_bytes += RxLen;
  758. /* Pass to upper layer */
  759. skb->protocol = eth_type_trans(skb, dev);
  760. netif_rx(skb);
  761. dev->stats.rx_packets++;
  762. } else {
  763. /* need to dump the packet's data */
  764. (db->dumpblk)(db->io_data, RxLen);
  765. }
  766. } while (rxbyte == DM9000_PKT_RDY);
  767. }
  768. /*
  769. * Read a word data from SROM
  770. */
  771. static u16
  772. read_srom_word(board_info_t * db, int offset)
  773. {
  774. iow(db, DM9000_EPAR, offset);
  775. iow(db, DM9000_EPCR, EPCR_ERPRR);
  776. mdelay(8); /* according to the datasheet 200us should be enough,
  777. but it doesn't work */
  778. iow(db, DM9000_EPCR, 0x0);
  779. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  780. }
  781. #ifdef DM9000_PROGRAM_EEPROM
  782. /*
  783. * Write a word data to SROM
  784. */
  785. static void
  786. write_srom_word(board_info_t * db, int offset, u16 val)
  787. {
  788. iow(db, DM9000_EPAR, offset);
  789. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  790. iow(db, DM9000_EPDRL, (val & 0xff));
  791. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  792. mdelay(8); /* same shit */
  793. iow(db, DM9000_EPCR, 0);
  794. }
  795. /*
  796. * Only for development:
  797. * Here we write static data to the eeprom in case
  798. * we don't have valid content on a new board
  799. */
  800. static void
  801. program_eeprom(board_info_t * db)
  802. {
  803. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  804. 0x0000, /* Autoload: accept nothing */
  805. 0x0a46, 0x9000, /* Vendor / Product ID */
  806. 0x0000, /* pin control */
  807. 0x0000,
  808. }; /* Wake-up mode control */
  809. int i;
  810. for (i = 0; i < 8; i++)
  811. write_srom_word(db, i, eeprom[i]);
  812. }
  813. #endif
  814. /*
  815. * Calculate the CRC valude of the Rx packet
  816. * flag = 1 : return the reverse CRC (for the received packet CRC)
  817. * 0 : return the normal CRC (for Hash Table index)
  818. */
  819. static unsigned long
  820. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  821. {
  822. u32 crc = ether_crc_le(Len, Data);
  823. if (flag)
  824. return ~crc;
  825. return crc;
  826. }
  827. /*
  828. * Set DM9000 multicast address
  829. */
  830. static void
  831. dm9000_hash_table(struct net_device *dev)
  832. {
  833. board_info_t *db = (board_info_t *) dev->priv;
  834. struct dev_mc_list *mcptr = dev->mc_list;
  835. int mc_cnt = dev->mc_count;
  836. u32 hash_val;
  837. u16 i, oft, hash_table[4];
  838. unsigned long flags;
  839. PRINTK2("dm9000_hash_table()\n");
  840. spin_lock_irqsave(&db->lock,flags);
  841. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  842. iow(db, oft, dev->dev_addr[i]);
  843. /* Clear Hash Table */
  844. for (i = 0; i < 4; i++)
  845. hash_table[i] = 0x0;
  846. /* broadcast address */
  847. hash_table[3] = 0x8000;
  848. /* the multicast address in Hash Table : 64 bits */
  849. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  850. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  851. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  852. }
  853. /* Write the hash table to MAC MD table */
  854. for (i = 0, oft = 0x16; i < 4; i++) {
  855. iow(db, oft++, hash_table[i] & 0xff);
  856. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  857. }
  858. spin_unlock_irqrestore(&db->lock,flags);
  859. }
  860. /*
  861. * Read a word from phyxcer
  862. */
  863. static int
  864. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  865. {
  866. board_info_t *db = (board_info_t *) dev->priv;
  867. unsigned long flags;
  868. unsigned int reg_save;
  869. int ret;
  870. spin_lock_irqsave(&db->lock,flags);
  871. /* Save previous register address */
  872. reg_save = readb(db->io_addr);
  873. /* Fill the phyxcer register into REG_0C */
  874. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  875. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  876. udelay(100); /* Wait read complete */
  877. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  878. /* The read data keeps on REG_0D & REG_0E */
  879. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  880. /* restore the previous address */
  881. writeb(reg_save, db->io_addr);
  882. spin_unlock_irqrestore(&db->lock,flags);
  883. return ret;
  884. }
  885. /*
  886. * Write a word to phyxcer
  887. */
  888. static void
  889. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  890. {
  891. board_info_t *db = (board_info_t *) dev->priv;
  892. unsigned long flags;
  893. unsigned long reg_save;
  894. spin_lock_irqsave(&db->lock,flags);
  895. /* Save previous register address */
  896. reg_save = readb(db->io_addr);
  897. /* Fill the phyxcer register into REG_0C */
  898. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  899. /* Fill the written data into REG_0D & REG_0E */
  900. iow(db, DM9000_EPDRL, (value & 0xff));
  901. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  902. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  903. udelay(500); /* Wait write complete */
  904. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  905. /* restore the previous address */
  906. writeb(reg_save, db->io_addr);
  907. spin_unlock_irqrestore(&db->lock,flags);
  908. }
  909. static int
  910. dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
  911. {
  912. struct net_device *ndev = platform_get_drvdata(dev);
  913. if (ndev) {
  914. if (netif_running(ndev)) {
  915. netif_device_detach(ndev);
  916. dm9000_shutdown(ndev);
  917. }
  918. }
  919. return 0;
  920. }
  921. static int
  922. dm9000_drv_resume(struct platform_device *dev)
  923. {
  924. struct net_device *ndev = platform_get_drvdata(dev);
  925. board_info_t *db = (board_info_t *) ndev->priv;
  926. if (ndev) {
  927. if (netif_running(ndev)) {
  928. dm9000_reset(db);
  929. dm9000_init_dm9000(ndev);
  930. netif_device_attach(ndev);
  931. }
  932. }
  933. return 0;
  934. }
  935. static int
  936. dm9000_drv_remove(struct platform_device *pdev)
  937. {
  938. struct net_device *ndev = platform_get_drvdata(pdev);
  939. platform_set_drvdata(pdev, NULL);
  940. unregister_netdev(ndev);
  941. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  942. free_netdev(ndev); /* free device structure */
  943. PRINTK1("clean_module() exit\n");
  944. return 0;
  945. }
  946. static struct platform_driver dm9000_driver = {
  947. .driver = {
  948. .name = "dm9000",
  949. .owner = THIS_MODULE,
  950. },
  951. .probe = dm9000_probe,
  952. .remove = dm9000_drv_remove,
  953. .suspend = dm9000_drv_suspend,
  954. .resume = dm9000_drv_resume,
  955. };
  956. static int __init
  957. dm9000_init(void)
  958. {
  959. printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
  960. return platform_driver_register(&dm9000_driver); /* search board and register */
  961. }
  962. static void __exit
  963. dm9000_cleanup(void)
  964. {
  965. platform_driver_unregister(&dm9000_driver);
  966. }
  967. module_init(dm9000_init);
  968. module_exit(dm9000_cleanup);
  969. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  970. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  971. MODULE_LICENSE("GPL");