atl1_main.c 68 KB

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  1. /*
  2. * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
  3. * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
  4. * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  5. *
  6. * Derived from Intel e1000 driver
  7. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the Free
  11. * Software Foundation; either version 2 of the License, or (at your option)
  12. * any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program; if not, write to the Free Software Foundation, Inc., 59
  21. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. *
  23. * The full GNU General Public License is included in this distribution in the
  24. * file called COPYING.
  25. *
  26. * Contact Information:
  27. * Xiong Huang <xiong_huang@attansic.com>
  28. * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29. * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
  30. *
  31. * Chris Snook <csnook@redhat.com>
  32. * Jay Cliburn <jcliburn@gmail.com>
  33. *
  34. * This version is adapted from the Attansic reference driver for
  35. * inclusion in the Linux kernel. It is currently under heavy development.
  36. * A very incomplete list of things that need to be dealt with:
  37. *
  38. * TODO:
  39. * Fix TSO; tx performance is horrible with TSO enabled.
  40. * Wake on LAN.
  41. * Add more ethtool functions.
  42. * Fix abstruse irq enable/disable condition described here:
  43. * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  44. *
  45. * NEEDS TESTING:
  46. * VLAN
  47. * multicast
  48. * promiscuous mode
  49. * interrupt coalescing
  50. * SMP torture testing
  51. */
  52. #include <linux/types.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/pci.h>
  55. #include <linux/spinlock.h>
  56. #include <linux/slab.h>
  57. #include <linux/string.h>
  58. #include <linux/skbuff.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/if_vlan.h>
  61. #include <linux/if_ether.h>
  62. #include <linux/irqreturn.h>
  63. #include <linux/workqueue.h>
  64. #include <linux/timer.h>
  65. #include <linux/jiffies.h>
  66. #include <linux/hardirq.h>
  67. #include <linux/interrupt.h>
  68. #include <linux/irqflags.h>
  69. #include <linux/dma-mapping.h>
  70. #include <linux/net.h>
  71. #include <linux/pm.h>
  72. #include <linux/in.h>
  73. #include <linux/ip.h>
  74. #include <linux/tcp.h>
  75. #include <linux/compiler.h>
  76. #include <linux/delay.h>
  77. #include <linux/mii.h>
  78. #include <net/checksum.h>
  79. #include <asm/atomic.h>
  80. #include <asm/byteorder.h>
  81. #include "atl1.h"
  82. #define DRIVER_VERSION "2.0.7"
  83. char atl1_driver_name[] = "atl1";
  84. static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
  85. static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
  86. char atl1_driver_version[] = DRIVER_VERSION;
  87. MODULE_AUTHOR
  88. ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
  89. MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
  90. MODULE_LICENSE("GPL");
  91. MODULE_VERSION(DRIVER_VERSION);
  92. /*
  93. * atl1_pci_tbl - PCI Device ID Table
  94. */
  95. static const struct pci_device_id atl1_pci_tbl[] = {
  96. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  97. /* required last entry */
  98. {0,}
  99. };
  100. MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
  101. /*
  102. * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
  103. * @adapter: board private structure to initialize
  104. *
  105. * atl1_sw_init initializes the Adapter private data structure.
  106. * Fields are initialized based on PCI device information and
  107. * OS network device settings (MTU size).
  108. */
  109. static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
  110. {
  111. struct atl1_hw *hw = &adapter->hw;
  112. struct net_device *netdev = adapter->netdev;
  113. hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  114. hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
  115. adapter->wol = 0;
  116. adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
  117. adapter->ict = 50000; /* 100ms */
  118. adapter->link_speed = SPEED_0; /* hardware init */
  119. adapter->link_duplex = FULL_DUPLEX;
  120. hw->phy_configured = false;
  121. hw->preamble_len = 7;
  122. hw->ipgt = 0x60;
  123. hw->min_ifg = 0x50;
  124. hw->ipgr1 = 0x40;
  125. hw->ipgr2 = 0x60;
  126. hw->max_retry = 0xf;
  127. hw->lcol = 0x37;
  128. hw->jam_ipg = 7;
  129. hw->rfd_burst = 8;
  130. hw->rrd_burst = 8;
  131. hw->rfd_fetch_gap = 1;
  132. hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
  133. hw->rx_jumbo_lkah = 1;
  134. hw->rrd_ret_timer = 16;
  135. hw->tpd_burst = 4;
  136. hw->tpd_fetch_th = 16;
  137. hw->txf_burst = 0x100;
  138. hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
  139. hw->tpd_fetch_gap = 1;
  140. hw->rcb_value = atl1_rcb_64;
  141. hw->dma_ord = atl1_dma_ord_enh;
  142. hw->dmar_block = atl1_dma_req_256;
  143. hw->dmaw_block = atl1_dma_req_256;
  144. hw->cmb_rrd = 4;
  145. hw->cmb_tpd = 4;
  146. hw->cmb_rx_timer = 1; /* about 2us */
  147. hw->cmb_tx_timer = 1; /* about 2us */
  148. hw->smb_timer = 100000; /* about 200ms */
  149. spin_lock_init(&adapter->lock);
  150. spin_lock_init(&adapter->mb_lock);
  151. return 0;
  152. }
  153. static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  154. {
  155. struct atl1_adapter *adapter = netdev_priv(netdev);
  156. u16 result;
  157. atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
  158. return result;
  159. }
  160. static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
  161. int val)
  162. {
  163. struct atl1_adapter *adapter = netdev_priv(netdev);
  164. atl1_write_phy_reg(&adapter->hw, reg_num, val);
  165. }
  166. /*
  167. * atl1_mii_ioctl -
  168. * @netdev:
  169. * @ifreq:
  170. * @cmd:
  171. */
  172. static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  173. {
  174. struct atl1_adapter *adapter = netdev_priv(netdev);
  175. unsigned long flags;
  176. int retval;
  177. if (!netif_running(netdev))
  178. return -EINVAL;
  179. spin_lock_irqsave(&adapter->lock, flags);
  180. retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
  181. spin_unlock_irqrestore(&adapter->lock, flags);
  182. return retval;
  183. }
  184. /*
  185. * atl1_ioctl -
  186. * @netdev:
  187. * @ifreq:
  188. * @cmd:
  189. */
  190. static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  191. {
  192. switch (cmd) {
  193. case SIOCGMIIPHY:
  194. case SIOCGMIIREG:
  195. case SIOCSMIIREG:
  196. return atl1_mii_ioctl(netdev, ifr, cmd);
  197. default:
  198. return -EOPNOTSUPP;
  199. }
  200. }
  201. /*
  202. * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
  203. * @adapter: board private structure
  204. *
  205. * Return 0 on success, negative on failure
  206. */
  207. s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
  208. {
  209. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  210. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  211. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  212. struct atl1_ring_header *ring_header = &adapter->ring_header;
  213. struct pci_dev *pdev = adapter->pdev;
  214. int size;
  215. u8 offset = 0;
  216. size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
  217. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  218. if (unlikely(!tpd_ring->buffer_info)) {
  219. dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
  220. goto err_nomem;
  221. }
  222. rfd_ring->buffer_info =
  223. (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
  224. /* real ring DMA buffer
  225. * each ring/block may need up to 8 bytes for alignment, hence the
  226. * additional 40 bytes tacked onto the end.
  227. */
  228. ring_header->size = size =
  229. sizeof(struct tx_packet_desc) * tpd_ring->count
  230. + sizeof(struct rx_free_desc) * rfd_ring->count
  231. + sizeof(struct rx_return_desc) * rrd_ring->count
  232. + sizeof(struct coals_msg_block)
  233. + sizeof(struct stats_msg_block)
  234. + 40;
  235. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  236. &ring_header->dma);
  237. if (unlikely(!ring_header->desc)) {
  238. dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
  239. goto err_nomem;
  240. }
  241. memset(ring_header->desc, 0, ring_header->size);
  242. /* init TPD ring */
  243. tpd_ring->dma = ring_header->dma;
  244. offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
  245. tpd_ring->dma += offset;
  246. tpd_ring->desc = (u8 *) ring_header->desc + offset;
  247. tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
  248. /* init RFD ring */
  249. rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
  250. offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
  251. rfd_ring->dma += offset;
  252. rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
  253. rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
  254. /* init RRD ring */
  255. rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
  256. offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
  257. rrd_ring->dma += offset;
  258. rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
  259. rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
  260. /* init CMB */
  261. adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
  262. offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
  263. adapter->cmb.dma += offset;
  264. adapter->cmb.cmb = (struct coals_msg_block *)
  265. ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
  266. /* init SMB */
  267. adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
  268. offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
  269. adapter->smb.dma += offset;
  270. adapter->smb.smb = (struct stats_msg_block *)
  271. ((u8 *) adapter->cmb.cmb +
  272. (sizeof(struct coals_msg_block) + offset));
  273. return ATL1_SUCCESS;
  274. err_nomem:
  275. kfree(tpd_ring->buffer_info);
  276. return -ENOMEM;
  277. }
  278. static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
  279. {
  280. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  281. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  282. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  283. atomic_set(&tpd_ring->next_to_use, 0);
  284. atomic_set(&tpd_ring->next_to_clean, 0);
  285. rfd_ring->next_to_clean = 0;
  286. atomic_set(&rfd_ring->next_to_use, 0);
  287. rrd_ring->next_to_use = 0;
  288. atomic_set(&rrd_ring->next_to_clean, 0);
  289. }
  290. /*
  291. * atl1_clean_rx_ring - Free RFD Buffers
  292. * @adapter: board private structure
  293. */
  294. static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
  295. {
  296. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  297. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  298. struct atl1_buffer *buffer_info;
  299. struct pci_dev *pdev = adapter->pdev;
  300. unsigned long size;
  301. unsigned int i;
  302. /* Free all the Rx ring sk_buffs */
  303. for (i = 0; i < rfd_ring->count; i++) {
  304. buffer_info = &rfd_ring->buffer_info[i];
  305. if (buffer_info->dma) {
  306. pci_unmap_page(pdev, buffer_info->dma,
  307. buffer_info->length, PCI_DMA_FROMDEVICE);
  308. buffer_info->dma = 0;
  309. }
  310. if (buffer_info->skb) {
  311. dev_kfree_skb(buffer_info->skb);
  312. buffer_info->skb = NULL;
  313. }
  314. }
  315. size = sizeof(struct atl1_buffer) * rfd_ring->count;
  316. memset(rfd_ring->buffer_info, 0, size);
  317. /* Zero out the descriptor ring */
  318. memset(rfd_ring->desc, 0, rfd_ring->size);
  319. rfd_ring->next_to_clean = 0;
  320. atomic_set(&rfd_ring->next_to_use, 0);
  321. rrd_ring->next_to_use = 0;
  322. atomic_set(&rrd_ring->next_to_clean, 0);
  323. }
  324. /*
  325. * atl1_clean_tx_ring - Free Tx Buffers
  326. * @adapter: board private structure
  327. */
  328. static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
  329. {
  330. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  331. struct atl1_buffer *buffer_info;
  332. struct pci_dev *pdev = adapter->pdev;
  333. unsigned long size;
  334. unsigned int i;
  335. /* Free all the Tx ring sk_buffs */
  336. for (i = 0; i < tpd_ring->count; i++) {
  337. buffer_info = &tpd_ring->buffer_info[i];
  338. if (buffer_info->dma) {
  339. pci_unmap_page(pdev, buffer_info->dma,
  340. buffer_info->length, PCI_DMA_TODEVICE);
  341. buffer_info->dma = 0;
  342. }
  343. }
  344. for (i = 0; i < tpd_ring->count; i++) {
  345. buffer_info = &tpd_ring->buffer_info[i];
  346. if (buffer_info->skb) {
  347. dev_kfree_skb_any(buffer_info->skb);
  348. buffer_info->skb = NULL;
  349. }
  350. }
  351. size = sizeof(struct atl1_buffer) * tpd_ring->count;
  352. memset(tpd_ring->buffer_info, 0, size);
  353. /* Zero out the descriptor ring */
  354. memset(tpd_ring->desc, 0, tpd_ring->size);
  355. atomic_set(&tpd_ring->next_to_use, 0);
  356. atomic_set(&tpd_ring->next_to_clean, 0);
  357. }
  358. /*
  359. * atl1_free_ring_resources - Free Tx / RX descriptor Resources
  360. * @adapter: board private structure
  361. *
  362. * Free all transmit software resources
  363. */
  364. void atl1_free_ring_resources(struct atl1_adapter *adapter)
  365. {
  366. struct pci_dev *pdev = adapter->pdev;
  367. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  368. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  369. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  370. struct atl1_ring_header *ring_header = &adapter->ring_header;
  371. atl1_clean_tx_ring(adapter);
  372. atl1_clean_rx_ring(adapter);
  373. kfree(tpd_ring->buffer_info);
  374. pci_free_consistent(pdev, ring_header->size, ring_header->desc,
  375. ring_header->dma);
  376. tpd_ring->buffer_info = NULL;
  377. tpd_ring->desc = NULL;
  378. tpd_ring->dma = 0;
  379. rfd_ring->buffer_info = NULL;
  380. rfd_ring->desc = NULL;
  381. rfd_ring->dma = 0;
  382. rrd_ring->desc = NULL;
  383. rrd_ring->dma = 0;
  384. }
  385. static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
  386. {
  387. u32 value;
  388. struct atl1_hw *hw = &adapter->hw;
  389. struct net_device *netdev = adapter->netdev;
  390. /* Config MAC CTRL Register */
  391. value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  392. /* duplex */
  393. if (FULL_DUPLEX == adapter->link_duplex)
  394. value |= MAC_CTRL_DUPLX;
  395. /* speed */
  396. value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
  397. MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
  398. MAC_CTRL_SPEED_SHIFT);
  399. /* flow control */
  400. value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  401. /* PAD & CRC */
  402. value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  403. /* preamble length */
  404. value |= (((u32) adapter->hw.preamble_len
  405. & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
  406. /* vlan */
  407. if (adapter->vlgrp)
  408. value |= MAC_CTRL_RMV_VLAN;
  409. /* rx checksum
  410. if (adapter->rx_csum)
  411. value |= MAC_CTRL_RX_CHKSUM_EN;
  412. */
  413. /* filter mode */
  414. value |= MAC_CTRL_BC_EN;
  415. if (netdev->flags & IFF_PROMISC)
  416. value |= MAC_CTRL_PROMIS_EN;
  417. else if (netdev->flags & IFF_ALLMULTI)
  418. value |= MAC_CTRL_MC_ALL_EN;
  419. /* value |= MAC_CTRL_LOOPBACK; */
  420. iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
  421. }
  422. /*
  423. * atl1_set_mac - Change the Ethernet Address of the NIC
  424. * @netdev: network interface device structure
  425. * @p: pointer to an address structure
  426. *
  427. * Returns 0 on success, negative on failure
  428. */
  429. static int atl1_set_mac(struct net_device *netdev, void *p)
  430. {
  431. struct atl1_adapter *adapter = netdev_priv(netdev);
  432. struct sockaddr *addr = p;
  433. if (netif_running(netdev))
  434. return -EBUSY;
  435. if (!is_valid_ether_addr(addr->sa_data))
  436. return -EADDRNOTAVAIL;
  437. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  438. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  439. atl1_set_mac_addr(&adapter->hw);
  440. return 0;
  441. }
  442. static u32 atl1_check_link(struct atl1_adapter *adapter)
  443. {
  444. struct atl1_hw *hw = &adapter->hw;
  445. struct net_device *netdev = adapter->netdev;
  446. u32 ret_val;
  447. u16 speed, duplex, phy_data;
  448. int reconfig = 0;
  449. /* MII_BMSR must read twice */
  450. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  451. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  452. if (!(phy_data & BMSR_LSTATUS)) { /* link down */
  453. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  454. dev_info(&adapter->pdev->dev, "link is down\n");
  455. adapter->link_speed = SPEED_0;
  456. netif_carrier_off(netdev);
  457. netif_stop_queue(netdev);
  458. }
  459. return ATL1_SUCCESS;
  460. }
  461. /* Link Up */
  462. ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
  463. if (ret_val)
  464. return ret_val;
  465. switch (hw->media_type) {
  466. case MEDIA_TYPE_1000M_FULL:
  467. if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
  468. reconfig = 1;
  469. break;
  470. case MEDIA_TYPE_100M_FULL:
  471. if (speed != SPEED_100 || duplex != FULL_DUPLEX)
  472. reconfig = 1;
  473. break;
  474. case MEDIA_TYPE_100M_HALF:
  475. if (speed != SPEED_100 || duplex != HALF_DUPLEX)
  476. reconfig = 1;
  477. break;
  478. case MEDIA_TYPE_10M_FULL:
  479. if (speed != SPEED_10 || duplex != FULL_DUPLEX)
  480. reconfig = 1;
  481. break;
  482. case MEDIA_TYPE_10M_HALF:
  483. if (speed != SPEED_10 || duplex != HALF_DUPLEX)
  484. reconfig = 1;
  485. break;
  486. }
  487. /* link result is our setting */
  488. if (!reconfig) {
  489. if (adapter->link_speed != speed
  490. || adapter->link_duplex != duplex) {
  491. adapter->link_speed = speed;
  492. adapter->link_duplex = duplex;
  493. atl1_setup_mac_ctrl(adapter);
  494. dev_info(&adapter->pdev->dev,
  495. "%s link is up %d Mbps %s\n",
  496. netdev->name, adapter->link_speed,
  497. adapter->link_duplex == FULL_DUPLEX ?
  498. "full duplex" : "half duplex");
  499. }
  500. if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
  501. netif_carrier_on(netdev);
  502. netif_wake_queue(netdev);
  503. }
  504. return ATL1_SUCCESS;
  505. }
  506. /* change orignal link status */
  507. if (netif_carrier_ok(netdev)) {
  508. adapter->link_speed = SPEED_0;
  509. netif_carrier_off(netdev);
  510. netif_stop_queue(netdev);
  511. }
  512. if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
  513. hw->media_type != MEDIA_TYPE_1000M_FULL) {
  514. switch (hw->media_type) {
  515. case MEDIA_TYPE_100M_FULL:
  516. phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
  517. MII_CR_RESET;
  518. break;
  519. case MEDIA_TYPE_100M_HALF:
  520. phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
  521. break;
  522. case MEDIA_TYPE_10M_FULL:
  523. phy_data =
  524. MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
  525. break;
  526. default: /* MEDIA_TYPE_10M_HALF: */
  527. phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
  528. break;
  529. }
  530. atl1_write_phy_reg(hw, MII_BMCR, phy_data);
  531. return ATL1_SUCCESS;
  532. }
  533. /* auto-neg, insert timer to re-config phy */
  534. if (!adapter->phy_timer_pending) {
  535. adapter->phy_timer_pending = true;
  536. mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
  537. }
  538. return ATL1_SUCCESS;
  539. }
  540. static void atl1_check_for_link(struct atl1_adapter *adapter)
  541. {
  542. struct net_device *netdev = adapter->netdev;
  543. u16 phy_data = 0;
  544. spin_lock(&adapter->lock);
  545. adapter->phy_timer_pending = false;
  546. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  547. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  548. spin_unlock(&adapter->lock);
  549. /* notify upper layer link down ASAP */
  550. if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
  551. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  552. dev_info(&adapter->pdev->dev, "%s link is down\n",
  553. netdev->name);
  554. adapter->link_speed = SPEED_0;
  555. netif_carrier_off(netdev);
  556. netif_stop_queue(netdev);
  557. }
  558. }
  559. schedule_work(&adapter->link_chg_task);
  560. }
  561. /*
  562. * atl1_set_multi - Multicast and Promiscuous mode set
  563. * @netdev: network interface device structure
  564. *
  565. * The set_multi entry point is called whenever the multicast address
  566. * list or the network interface flags are updated. This routine is
  567. * responsible for configuring the hardware for proper multicast,
  568. * promiscuous mode, and all-multi behavior.
  569. */
  570. static void atl1_set_multi(struct net_device *netdev)
  571. {
  572. struct atl1_adapter *adapter = netdev_priv(netdev);
  573. struct atl1_hw *hw = &adapter->hw;
  574. struct dev_mc_list *mc_ptr;
  575. u32 rctl;
  576. u32 hash_value;
  577. /* Check for Promiscuous and All Multicast modes */
  578. rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  579. if (netdev->flags & IFF_PROMISC)
  580. rctl |= MAC_CTRL_PROMIS_EN;
  581. else if (netdev->flags & IFF_ALLMULTI) {
  582. rctl |= MAC_CTRL_MC_ALL_EN;
  583. rctl &= ~MAC_CTRL_PROMIS_EN;
  584. } else
  585. rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  586. iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
  587. /* clear the old settings from the multicast hash table */
  588. iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
  589. iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
  590. /* compute mc addresses' hash value ,and put it into hash table */
  591. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  592. hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
  593. atl1_hash_set(hw, hash_value);
  594. }
  595. }
  596. /*
  597. * atl1_change_mtu - Change the Maximum Transfer Unit
  598. * @netdev: network interface device structure
  599. * @new_mtu: new value for maximum frame size
  600. *
  601. * Returns 0 on success, negative on failure
  602. */
  603. static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
  604. {
  605. struct atl1_adapter *adapter = netdev_priv(netdev);
  606. int old_mtu = netdev->mtu;
  607. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  608. if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
  609. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  610. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  611. return -EINVAL;
  612. }
  613. adapter->hw.max_frame_size = max_frame;
  614. adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
  615. adapter->rx_buffer_len = (max_frame + 7) & ~7;
  616. adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
  617. netdev->mtu = new_mtu;
  618. if ((old_mtu != new_mtu) && netif_running(netdev)) {
  619. atl1_down(adapter);
  620. atl1_up(adapter);
  621. }
  622. return 0;
  623. }
  624. static void set_flow_ctrl_old(struct atl1_adapter *adapter)
  625. {
  626. u32 hi, lo, value;
  627. /* RFD Flow Control */
  628. value = adapter->rfd_ring.count;
  629. hi = value / 16;
  630. if (hi < 2)
  631. hi = 2;
  632. lo = value * 7 / 8;
  633. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  634. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  635. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  636. /* RRD Flow Control */
  637. value = adapter->rrd_ring.count;
  638. lo = value / 16;
  639. hi = value * 7 / 8;
  640. if (lo < 2)
  641. lo = 2;
  642. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  643. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  644. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  645. }
  646. static void set_flow_ctrl_new(struct atl1_hw *hw)
  647. {
  648. u32 hi, lo, value;
  649. /* RXF Flow Control */
  650. value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
  651. lo = value / 16;
  652. if (lo < 192)
  653. lo = 192;
  654. hi = value * 7 / 8;
  655. if (hi < lo)
  656. hi = lo + 16;
  657. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  658. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  659. iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  660. /* RRD Flow Control */
  661. value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
  662. lo = value / 8;
  663. hi = value * 7 / 8;
  664. if (lo < 2)
  665. lo = 2;
  666. if (hi < lo)
  667. hi = lo + 3;
  668. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  669. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  670. iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  671. }
  672. /*
  673. * atl1_configure - Configure Transmit&Receive Unit after Reset
  674. * @adapter: board private structure
  675. *
  676. * Configure the Tx /Rx unit of the MAC after a reset.
  677. */
  678. static u32 atl1_configure(struct atl1_adapter *adapter)
  679. {
  680. struct atl1_hw *hw = &adapter->hw;
  681. u32 value;
  682. /* clear interrupt status */
  683. iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
  684. /* set MAC Address */
  685. value = (((u32) hw->mac_addr[2]) << 24) |
  686. (((u32) hw->mac_addr[3]) << 16) |
  687. (((u32) hw->mac_addr[4]) << 8) |
  688. (((u32) hw->mac_addr[5]));
  689. iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
  690. value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
  691. iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
  692. /* tx / rx ring */
  693. /* HI base address */
  694. iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
  695. hw->hw_addr + REG_DESC_BASE_ADDR_HI);
  696. /* LO base address */
  697. iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
  698. hw->hw_addr + REG_DESC_RFD_ADDR_LO);
  699. iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
  700. hw->hw_addr + REG_DESC_RRD_ADDR_LO);
  701. iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
  702. hw->hw_addr + REG_DESC_TPD_ADDR_LO);
  703. iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
  704. hw->hw_addr + REG_DESC_CMB_ADDR_LO);
  705. iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
  706. hw->hw_addr + REG_DESC_SMB_ADDR_LO);
  707. /* element count */
  708. value = adapter->rrd_ring.count;
  709. value <<= 16;
  710. value += adapter->rfd_ring.count;
  711. iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
  712. iowrite32(adapter->tpd_ring.count, hw->hw_addr +
  713. REG_DESC_TPD_RING_SIZE);
  714. /* Load Ptr */
  715. iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
  716. /* config Mailbox */
  717. value = ((atomic_read(&adapter->tpd_ring.next_to_use)
  718. & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
  719. ((atomic_read(&adapter->rrd_ring.next_to_clean)
  720. & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
  721. ((atomic_read(&adapter->rfd_ring.next_to_use)
  722. & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
  723. iowrite32(value, hw->hw_addr + REG_MAILBOX);
  724. /* config IPG/IFG */
  725. value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
  726. << MAC_IPG_IFG_IPGT_SHIFT) |
  727. (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
  728. << MAC_IPG_IFG_MIFG_SHIFT) |
  729. (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
  730. << MAC_IPG_IFG_IPGR1_SHIFT) |
  731. (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
  732. << MAC_IPG_IFG_IPGR2_SHIFT);
  733. iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
  734. /* config Half-Duplex Control */
  735. value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
  736. (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
  737. << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
  738. MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
  739. (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
  740. (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
  741. << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
  742. iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
  743. /* set Interrupt Moderator Timer */
  744. iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
  745. iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
  746. /* set Interrupt Clear Timer */
  747. iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
  748. /* set MTU, 4 : VLAN */
  749. iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
  750. /* jumbo size & rrd retirement timer */
  751. value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
  752. << RXQ_JMBOSZ_TH_SHIFT) |
  753. (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
  754. << RXQ_JMBO_LKAH_SHIFT) |
  755. (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
  756. << RXQ_RRD_TIMER_SHIFT);
  757. iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
  758. /* Flow Control */
  759. switch (hw->dev_rev) {
  760. case 0x8001:
  761. case 0x9001:
  762. case 0x9002:
  763. case 0x9003:
  764. set_flow_ctrl_old(adapter);
  765. break;
  766. default:
  767. set_flow_ctrl_new(hw);
  768. break;
  769. }
  770. /* config TXQ */
  771. value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
  772. << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
  773. (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
  774. << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
  775. (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
  776. << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
  777. TXQ_CTRL_EN;
  778. iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
  779. /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
  780. value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
  781. << TX_JUMBO_TASK_TH_SHIFT) |
  782. (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
  783. << TX_TPD_MIN_IPG_SHIFT);
  784. iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
  785. /* config RXQ */
  786. value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
  787. << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
  788. (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
  789. << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
  790. (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
  791. << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
  792. RXQ_CTRL_EN;
  793. iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
  794. /* config DMA Engine */
  795. value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  796. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  797. ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
  798. << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
  799. DMA_CTRL_DMAW_EN;
  800. value |= (u32) hw->dma_ord;
  801. if (atl1_rcb_128 == hw->rcb_value)
  802. value |= DMA_CTRL_RCB_VALUE;
  803. iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
  804. /* config CMB / SMB */
  805. value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
  806. hw->cmb_tpd : adapter->tpd_ring.count;
  807. value <<= 16;
  808. value |= hw->cmb_rrd;
  809. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
  810. value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
  811. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
  812. iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
  813. /* --- enable CMB / SMB */
  814. value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
  815. iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
  816. value = ioread32(adapter->hw.hw_addr + REG_ISR);
  817. if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
  818. value = 1; /* config failed */
  819. else
  820. value = 0;
  821. /* clear all interrupt status */
  822. iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
  823. iowrite32(0, adapter->hw.hw_addr + REG_ISR);
  824. return value;
  825. }
  826. /*
  827. * atl1_pcie_patch - Patch for PCIE module
  828. */
  829. static void atl1_pcie_patch(struct atl1_adapter *adapter)
  830. {
  831. u32 value;
  832. /* much vendor magic here */
  833. value = 0x6500;
  834. iowrite32(value, adapter->hw.hw_addr + 0x12FC);
  835. /* pcie flow control mode change */
  836. value = ioread32(adapter->hw.hw_addr + 0x1008);
  837. value |= 0x8000;
  838. iowrite32(value, adapter->hw.hw_addr + 0x1008);
  839. }
  840. /*
  841. * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
  842. * on PCI Command register is disable.
  843. * The function enable this bit.
  844. * Brackett, 2006/03/15
  845. */
  846. static void atl1_via_workaround(struct atl1_adapter *adapter)
  847. {
  848. unsigned long value;
  849. value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
  850. if (value & PCI_COMMAND_INTX_DISABLE)
  851. value &= ~PCI_COMMAND_INTX_DISABLE;
  852. iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
  853. }
  854. /*
  855. * atl1_irq_enable - Enable default interrupt generation settings
  856. * @adapter: board private structure
  857. */
  858. static void atl1_irq_enable(struct atl1_adapter *adapter)
  859. {
  860. iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
  861. ioread32(adapter->hw.hw_addr + REG_IMR);
  862. }
  863. /*
  864. * atl1_irq_disable - Mask off interrupt generation on the NIC
  865. * @adapter: board private structure
  866. */
  867. static void atl1_irq_disable(struct atl1_adapter *adapter)
  868. {
  869. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  870. ioread32(adapter->hw.hw_addr + REG_IMR);
  871. synchronize_irq(adapter->pdev->irq);
  872. }
  873. static void atl1_clear_phy_int(struct atl1_adapter *adapter)
  874. {
  875. u16 phy_data;
  876. unsigned long flags;
  877. spin_lock_irqsave(&adapter->lock, flags);
  878. atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
  879. spin_unlock_irqrestore(&adapter->lock, flags);
  880. }
  881. static void atl1_inc_smb(struct atl1_adapter *adapter)
  882. {
  883. struct stats_msg_block *smb = adapter->smb.smb;
  884. /* Fill out the OS statistics structure */
  885. adapter->soft_stats.rx_packets += smb->rx_ok;
  886. adapter->soft_stats.tx_packets += smb->tx_ok;
  887. adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
  888. adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
  889. adapter->soft_stats.multicast += smb->rx_mcast;
  890. adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
  891. smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
  892. /* Rx Errors */
  893. adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
  894. smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
  895. smb->rx_rrd_ov + smb->rx_align_err);
  896. adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
  897. adapter->soft_stats.rx_length_errors += smb->rx_len_err;
  898. adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
  899. adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
  900. adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
  901. smb->rx_rxf_ov);
  902. adapter->soft_stats.rx_pause += smb->rx_pause;
  903. adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
  904. adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
  905. /* Tx Errors */
  906. adapter->soft_stats.tx_errors += (smb->tx_late_col +
  907. smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
  908. adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
  909. adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
  910. adapter->soft_stats.tx_window_errors += smb->tx_late_col;
  911. adapter->soft_stats.excecol += smb->tx_abort_col;
  912. adapter->soft_stats.deffer += smb->tx_defer;
  913. adapter->soft_stats.scc += smb->tx_1_col;
  914. adapter->soft_stats.mcc += smb->tx_2_col;
  915. adapter->soft_stats.latecol += smb->tx_late_col;
  916. adapter->soft_stats.tx_underun += smb->tx_underrun;
  917. adapter->soft_stats.tx_trunc += smb->tx_trunc;
  918. adapter->soft_stats.tx_pause += smb->tx_pause;
  919. adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
  920. adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
  921. adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
  922. adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
  923. adapter->net_stats.multicast = adapter->soft_stats.multicast;
  924. adapter->net_stats.collisions = adapter->soft_stats.collisions;
  925. adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
  926. adapter->net_stats.rx_over_errors =
  927. adapter->soft_stats.rx_missed_errors;
  928. adapter->net_stats.rx_length_errors =
  929. adapter->soft_stats.rx_length_errors;
  930. adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
  931. adapter->net_stats.rx_frame_errors =
  932. adapter->soft_stats.rx_frame_errors;
  933. adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
  934. adapter->net_stats.rx_missed_errors =
  935. adapter->soft_stats.rx_missed_errors;
  936. adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
  937. adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
  938. adapter->net_stats.tx_aborted_errors =
  939. adapter->soft_stats.tx_aborted_errors;
  940. adapter->net_stats.tx_window_errors =
  941. adapter->soft_stats.tx_window_errors;
  942. adapter->net_stats.tx_carrier_errors =
  943. adapter->soft_stats.tx_carrier_errors;
  944. }
  945. /*
  946. * atl1_get_stats - Get System Network Statistics
  947. * @netdev: network interface device structure
  948. *
  949. * Returns the address of the device statistics structure.
  950. * The statistics are actually updated from the timer callback.
  951. */
  952. static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
  953. {
  954. struct atl1_adapter *adapter = netdev_priv(netdev);
  955. return &adapter->net_stats;
  956. }
  957. static void atl1_update_mailbox(struct atl1_adapter *adapter)
  958. {
  959. unsigned long flags;
  960. u32 tpd_next_to_use;
  961. u32 rfd_next_to_use;
  962. u32 rrd_next_to_clean;
  963. u32 value;
  964. spin_lock_irqsave(&adapter->mb_lock, flags);
  965. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  966. rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
  967. rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
  968. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  969. MB_RFD_PROD_INDX_SHIFT) |
  970. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  971. MB_RRD_CONS_INDX_SHIFT) |
  972. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  973. MB_TPD_PROD_INDX_SHIFT);
  974. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  975. spin_unlock_irqrestore(&adapter->mb_lock, flags);
  976. }
  977. static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
  978. struct rx_return_desc *rrd, u16 offset)
  979. {
  980. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  981. while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
  982. rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
  983. if (++rfd_ring->next_to_clean == rfd_ring->count) {
  984. rfd_ring->next_to_clean = 0;
  985. }
  986. }
  987. }
  988. static void atl1_update_rfd_index(struct atl1_adapter *adapter,
  989. struct rx_return_desc *rrd)
  990. {
  991. u16 num_buf;
  992. num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
  993. adapter->rx_buffer_len;
  994. if (rrd->num_buf == num_buf)
  995. /* clean alloc flag for bad rrd */
  996. atl1_clean_alloc_flag(adapter, rrd, num_buf);
  997. }
  998. static void atl1_rx_checksum(struct atl1_adapter *adapter,
  999. struct rx_return_desc *rrd, struct sk_buff *skb)
  1000. {
  1001. struct pci_dev *pdev = adapter->pdev;
  1002. skb->ip_summed = CHECKSUM_NONE;
  1003. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  1004. if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
  1005. ERR_FLAG_CODE | ERR_FLAG_OV)) {
  1006. adapter->hw_csum_err++;
  1007. dev_printk(KERN_DEBUG, &pdev->dev,
  1008. "rx checksum error\n");
  1009. return;
  1010. }
  1011. }
  1012. /* not IPv4 */
  1013. if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
  1014. /* checksum is invalid, but it's not an IPv4 pkt, so ok */
  1015. return;
  1016. /* IPv4 packet */
  1017. if (likely(!(rrd->err_flg &
  1018. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
  1019. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1020. adapter->hw_csum_good++;
  1021. return;
  1022. }
  1023. /* IPv4, but hardware thinks its checksum is wrong */
  1024. dev_printk(KERN_DEBUG, &pdev->dev,
  1025. "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
  1026. rrd->pkt_flg, rrd->err_flg);
  1027. skb->ip_summed = CHECKSUM_COMPLETE;
  1028. skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
  1029. adapter->hw_csum_err++;
  1030. return;
  1031. }
  1032. /*
  1033. * atl1_alloc_rx_buffers - Replace used receive buffers
  1034. * @adapter: address of board private structure
  1035. */
  1036. static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
  1037. {
  1038. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1039. struct pci_dev *pdev = adapter->pdev;
  1040. struct page *page;
  1041. unsigned long offset;
  1042. struct atl1_buffer *buffer_info, *next_info;
  1043. struct sk_buff *skb;
  1044. u16 num_alloc = 0;
  1045. u16 rfd_next_to_use, next_next;
  1046. struct rx_free_desc *rfd_desc;
  1047. next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
  1048. if (++next_next == rfd_ring->count)
  1049. next_next = 0;
  1050. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1051. next_info = &rfd_ring->buffer_info[next_next];
  1052. while (!buffer_info->alloced && !next_info->alloced) {
  1053. if (buffer_info->skb) {
  1054. buffer_info->alloced = 1;
  1055. goto next;
  1056. }
  1057. rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
  1058. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  1059. if (unlikely(!skb)) { /* Better luck next round */
  1060. adapter->net_stats.rx_dropped++;
  1061. break;
  1062. }
  1063. /*
  1064. * Make buffer alignment 2 beyond a 16 byte boundary
  1065. * this will result in a 16 byte aligned IP header after
  1066. * the 14 byte MAC header is removed
  1067. */
  1068. skb_reserve(skb, NET_IP_ALIGN);
  1069. buffer_info->alloced = 1;
  1070. buffer_info->skb = skb;
  1071. buffer_info->length = (u16) adapter->rx_buffer_len;
  1072. page = virt_to_page(skb->data);
  1073. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1074. buffer_info->dma = pci_map_page(pdev, page, offset,
  1075. adapter->rx_buffer_len,
  1076. PCI_DMA_FROMDEVICE);
  1077. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1078. rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
  1079. rfd_desc->coalese = 0;
  1080. next:
  1081. rfd_next_to_use = next_next;
  1082. if (unlikely(++next_next == rfd_ring->count))
  1083. next_next = 0;
  1084. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1085. next_info = &rfd_ring->buffer_info[next_next];
  1086. num_alloc++;
  1087. }
  1088. if (num_alloc) {
  1089. /*
  1090. * Force memory writes to complete before letting h/w
  1091. * know there are new descriptors to fetch. (Only
  1092. * applicable for weak-ordered memory model archs,
  1093. * such as IA-64).
  1094. */
  1095. wmb();
  1096. atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
  1097. }
  1098. return num_alloc;
  1099. }
  1100. static void atl1_intr_rx(struct atl1_adapter *adapter)
  1101. {
  1102. int i, count;
  1103. u16 length;
  1104. u16 rrd_next_to_clean;
  1105. u32 value;
  1106. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1107. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1108. struct atl1_buffer *buffer_info;
  1109. struct rx_return_desc *rrd;
  1110. struct sk_buff *skb;
  1111. count = 0;
  1112. rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
  1113. while (1) {
  1114. rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
  1115. i = 1;
  1116. if (likely(rrd->xsz.valid)) { /* packet valid */
  1117. chk_rrd:
  1118. /* check rrd status */
  1119. if (likely(rrd->num_buf == 1))
  1120. goto rrd_ok;
  1121. /* rrd seems to be bad */
  1122. if (unlikely(i-- > 0)) {
  1123. /* rrd may not be DMAed completely */
  1124. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1125. "incomplete RRD DMA transfer\n");
  1126. udelay(1);
  1127. goto chk_rrd;
  1128. }
  1129. /* bad rrd */
  1130. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1131. "bad RRD\n");
  1132. /* see if update RFD index */
  1133. if (rrd->num_buf > 1)
  1134. atl1_update_rfd_index(adapter, rrd);
  1135. /* update rrd */
  1136. rrd->xsz.valid = 0;
  1137. if (++rrd_next_to_clean == rrd_ring->count)
  1138. rrd_next_to_clean = 0;
  1139. count++;
  1140. continue;
  1141. } else { /* current rrd still not be updated */
  1142. break;
  1143. }
  1144. rrd_ok:
  1145. /* clean alloc flag for bad rrd */
  1146. atl1_clean_alloc_flag(adapter, rrd, 0);
  1147. buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
  1148. if (++rfd_ring->next_to_clean == rfd_ring->count)
  1149. rfd_ring->next_to_clean = 0;
  1150. /* update rrd next to clean */
  1151. if (++rrd_next_to_clean == rrd_ring->count)
  1152. rrd_next_to_clean = 0;
  1153. count++;
  1154. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  1155. if (!(rrd->err_flg &
  1156. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
  1157. | ERR_FLAG_LEN))) {
  1158. /* packet error, don't need upstream */
  1159. buffer_info->alloced = 0;
  1160. rrd->xsz.valid = 0;
  1161. continue;
  1162. }
  1163. }
  1164. /* Good Receive */
  1165. pci_unmap_page(adapter->pdev, buffer_info->dma,
  1166. buffer_info->length, PCI_DMA_FROMDEVICE);
  1167. skb = buffer_info->skb;
  1168. length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
  1169. skb_put(skb, length - ETH_FCS_LEN);
  1170. /* Receive Checksum Offload */
  1171. atl1_rx_checksum(adapter, rrd, skb);
  1172. skb->protocol = eth_type_trans(skb, adapter->netdev);
  1173. if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
  1174. u16 vlan_tag = (rrd->vlan_tag >> 4) |
  1175. ((rrd->vlan_tag & 7) << 13) |
  1176. ((rrd->vlan_tag & 8) << 9);
  1177. vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
  1178. } else
  1179. netif_rx(skb);
  1180. /* let protocol layer free skb */
  1181. buffer_info->skb = NULL;
  1182. buffer_info->alloced = 0;
  1183. rrd->xsz.valid = 0;
  1184. adapter->netdev->last_rx = jiffies;
  1185. }
  1186. atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
  1187. atl1_alloc_rx_buffers(adapter);
  1188. /* update mailbox ? */
  1189. if (count) {
  1190. u32 tpd_next_to_use;
  1191. u32 rfd_next_to_use;
  1192. spin_lock(&adapter->mb_lock);
  1193. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  1194. rfd_next_to_use =
  1195. atomic_read(&adapter->rfd_ring.next_to_use);
  1196. rrd_next_to_clean =
  1197. atomic_read(&adapter->rrd_ring.next_to_clean);
  1198. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  1199. MB_RFD_PROD_INDX_SHIFT) |
  1200. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  1201. MB_RRD_CONS_INDX_SHIFT) |
  1202. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  1203. MB_TPD_PROD_INDX_SHIFT);
  1204. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  1205. spin_unlock(&adapter->mb_lock);
  1206. }
  1207. }
  1208. static void atl1_intr_tx(struct atl1_adapter *adapter)
  1209. {
  1210. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1211. struct atl1_buffer *buffer_info;
  1212. u16 sw_tpd_next_to_clean;
  1213. u16 cmb_tpd_next_to_clean;
  1214. sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1215. cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
  1216. while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
  1217. struct tx_packet_desc *tpd;
  1218. tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
  1219. buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
  1220. if (buffer_info->dma) {
  1221. pci_unmap_page(adapter->pdev, buffer_info->dma,
  1222. buffer_info->length, PCI_DMA_TODEVICE);
  1223. buffer_info->dma = 0;
  1224. }
  1225. if (buffer_info->skb) {
  1226. dev_kfree_skb_irq(buffer_info->skb);
  1227. buffer_info->skb = NULL;
  1228. }
  1229. tpd->buffer_addr = 0;
  1230. tpd->desc.data = 0;
  1231. if (++sw_tpd_next_to_clean == tpd_ring->count)
  1232. sw_tpd_next_to_clean = 0;
  1233. }
  1234. atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
  1235. if (netif_queue_stopped(adapter->netdev)
  1236. && netif_carrier_ok(adapter->netdev))
  1237. netif_wake_queue(adapter->netdev);
  1238. }
  1239. static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
  1240. {
  1241. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1242. u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
  1243. return ((next_to_clean > next_to_use) ?
  1244. next_to_clean - next_to_use - 1 :
  1245. tpd_ring->count + next_to_clean - next_to_use - 1);
  1246. }
  1247. static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
  1248. struct tso_param *tso)
  1249. {
  1250. /* We enter this function holding a spinlock. */
  1251. u8 ipofst;
  1252. int err;
  1253. if (skb_shinfo(skb)->gso_size) {
  1254. if (skb_header_cloned(skb)) {
  1255. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1256. if (unlikely(err))
  1257. return err;
  1258. }
  1259. if (skb->protocol == ntohs(ETH_P_IP)) {
  1260. struct iphdr *iph = ip_hdr(skb);
  1261. iph->tot_len = 0;
  1262. iph->check = 0;
  1263. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  1264. iph->daddr, 0, IPPROTO_TCP, 0);
  1265. ipofst = skb_network_offset(skb);
  1266. if (ipofst != ETH_HLEN) /* 802.3 frame */
  1267. tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
  1268. tso->tsopl |= (iph->ihl &
  1269. CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
  1270. tso->tsopl |= (tcp_hdrlen(skb) &
  1271. TSO_PARAM_TCPHDRLEN_MASK) <<
  1272. TSO_PARAM_TCPHDRLEN_SHIFT;
  1273. tso->tsopl |= (skb_shinfo(skb)->gso_size &
  1274. TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
  1275. tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
  1276. tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
  1277. tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
  1278. return true;
  1279. }
  1280. }
  1281. return false;
  1282. }
  1283. static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
  1284. struct csum_param *csum)
  1285. {
  1286. u8 css, cso;
  1287. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1288. cso = skb_transport_offset(skb);
  1289. css = cso + skb->csum_offset;
  1290. if (unlikely(cso & 0x1)) {
  1291. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1292. "payload offset not an even number\n");
  1293. return -1;
  1294. }
  1295. csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
  1296. CSUM_PARAM_PLOADOFFSET_SHIFT;
  1297. csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
  1298. CSUM_PARAM_XSUMOFFSET_SHIFT;
  1299. csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
  1300. return true;
  1301. }
  1302. return true;
  1303. }
  1304. static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
  1305. bool tcp_seg)
  1306. {
  1307. /* We enter this function holding a spinlock. */
  1308. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1309. struct atl1_buffer *buffer_info;
  1310. struct page *page;
  1311. int first_buf_len = skb->len;
  1312. unsigned long offset;
  1313. unsigned int nr_frags;
  1314. unsigned int f;
  1315. u16 tpd_next_to_use;
  1316. u16 proto_hdr_len;
  1317. u16 len12;
  1318. first_buf_len -= skb->data_len;
  1319. nr_frags = skb_shinfo(skb)->nr_frags;
  1320. tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1321. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1322. if (unlikely(buffer_info->skb))
  1323. BUG();
  1324. buffer_info->skb = NULL; /* put skb in last TPD */
  1325. if (tcp_seg) {
  1326. /* TSO/GSO */
  1327. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1328. buffer_info->length = proto_hdr_len;
  1329. page = virt_to_page(skb->data);
  1330. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1331. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1332. offset, proto_hdr_len,
  1333. PCI_DMA_TODEVICE);
  1334. if (++tpd_next_to_use == tpd_ring->count)
  1335. tpd_next_to_use = 0;
  1336. if (first_buf_len > proto_hdr_len) {
  1337. int i, m;
  1338. len12 = first_buf_len - proto_hdr_len;
  1339. m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) /
  1340. ATL1_MAX_TX_BUF_LEN;
  1341. for (i = 0; i < m; i++) {
  1342. buffer_info =
  1343. &tpd_ring->buffer_info[tpd_next_to_use];
  1344. buffer_info->skb = NULL;
  1345. buffer_info->length =
  1346. (ATL1_MAX_TX_BUF_LEN >=
  1347. len12) ? ATL1_MAX_TX_BUF_LEN : len12;
  1348. len12 -= buffer_info->length;
  1349. page = virt_to_page(skb->data +
  1350. (proto_hdr_len +
  1351. i * ATL1_MAX_TX_BUF_LEN));
  1352. offset = (unsigned long)(skb->data +
  1353. (proto_hdr_len +
  1354. i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK;
  1355. buffer_info->dma = pci_map_page(adapter->pdev,
  1356. page, offset, buffer_info->length,
  1357. PCI_DMA_TODEVICE);
  1358. if (++tpd_next_to_use == tpd_ring->count)
  1359. tpd_next_to_use = 0;
  1360. }
  1361. }
  1362. } else {
  1363. /* not TSO/GSO */
  1364. buffer_info->length = first_buf_len;
  1365. page = virt_to_page(skb->data);
  1366. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1367. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1368. offset, first_buf_len, PCI_DMA_TODEVICE);
  1369. if (++tpd_next_to_use == tpd_ring->count)
  1370. tpd_next_to_use = 0;
  1371. }
  1372. for (f = 0; f < nr_frags; f++) {
  1373. struct skb_frag_struct *frag;
  1374. u16 lenf, i, m;
  1375. frag = &skb_shinfo(skb)->frags[f];
  1376. lenf = frag->size;
  1377. m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
  1378. for (i = 0; i < m; i++) {
  1379. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1380. if (unlikely(buffer_info->skb))
  1381. BUG();
  1382. buffer_info->skb = NULL;
  1383. buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ?
  1384. ATL1_MAX_TX_BUF_LEN : lenf;
  1385. lenf -= buffer_info->length;
  1386. buffer_info->dma = pci_map_page(adapter->pdev,
  1387. frag->page,
  1388. frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
  1389. buffer_info->length, PCI_DMA_TODEVICE);
  1390. if (++tpd_next_to_use == tpd_ring->count)
  1391. tpd_next_to_use = 0;
  1392. }
  1393. }
  1394. /* last tpd's buffer-info */
  1395. buffer_info->skb = skb;
  1396. }
  1397. static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
  1398. union tpd_descr *descr)
  1399. {
  1400. /* We enter this function holding a spinlock. */
  1401. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1402. int j;
  1403. u32 val;
  1404. struct atl1_buffer *buffer_info;
  1405. struct tx_packet_desc *tpd;
  1406. u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1407. for (j = 0; j < count; j++) {
  1408. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1409. tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
  1410. tpd->desc.csum.csumpu = descr->csum.csumpu;
  1411. tpd->desc.csum.csumpl = descr->csum.csumpl;
  1412. tpd->desc.tso.tsopu = descr->tso.tsopu;
  1413. tpd->desc.tso.tsopl = descr->tso.tsopl;
  1414. tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1415. tpd->desc.data = descr->data;
  1416. tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
  1417. CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
  1418. val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
  1419. TSO_PARAM_SEGMENT_MASK;
  1420. if (val && !j)
  1421. tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
  1422. if (j == (count - 1))
  1423. tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
  1424. if (++tpd_next_to_use == tpd_ring->count)
  1425. tpd_next_to_use = 0;
  1426. }
  1427. /*
  1428. * Force memory writes to complete before letting h/w
  1429. * know there are new descriptors to fetch. (Only
  1430. * applicable for weak-ordered memory model archs,
  1431. * such as IA-64).
  1432. */
  1433. wmb();
  1434. atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
  1435. }
  1436. static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1437. {
  1438. struct atl1_adapter *adapter = netdev_priv(netdev);
  1439. int len = skb->len;
  1440. int tso;
  1441. int count = 1;
  1442. int ret_val;
  1443. u32 val;
  1444. union tpd_descr param;
  1445. u16 frag_size;
  1446. u16 vlan_tag;
  1447. unsigned long flags;
  1448. unsigned int nr_frags = 0;
  1449. unsigned int mss = 0;
  1450. unsigned int f;
  1451. unsigned int proto_hdr_len;
  1452. len -= skb->data_len;
  1453. if (unlikely(skb->len == 0)) {
  1454. dev_kfree_skb_any(skb);
  1455. return NETDEV_TX_OK;
  1456. }
  1457. param.data = 0;
  1458. param.tso.tsopu = 0;
  1459. param.tso.tsopl = 0;
  1460. param.csum.csumpu = 0;
  1461. param.csum.csumpl = 0;
  1462. /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
  1463. nr_frags = skb_shinfo(skb)->nr_frags;
  1464. for (f = 0; f < nr_frags; f++) {
  1465. frag_size = skb_shinfo(skb)->frags[f].size;
  1466. if (frag_size)
  1467. count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
  1468. ATL1_MAX_TX_BUF_LEN;
  1469. }
  1470. /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
  1471. mss = skb_shinfo(skb)->gso_size;
  1472. if (mss) {
  1473. if (skb->protocol == htons(ETH_P_IP)) {
  1474. proto_hdr_len = (skb_transport_offset(skb) +
  1475. tcp_hdrlen(skb));
  1476. if (unlikely(proto_hdr_len > len)) {
  1477. dev_kfree_skb_any(skb);
  1478. return NETDEV_TX_OK;
  1479. }
  1480. /* need additional TPD ? */
  1481. if (proto_hdr_len != len)
  1482. count += (len - proto_hdr_len +
  1483. ATL1_MAX_TX_BUF_LEN - 1) /
  1484. ATL1_MAX_TX_BUF_LEN;
  1485. }
  1486. }
  1487. if (!spin_trylock_irqsave(&adapter->lock, flags)) {
  1488. /* Can't get lock - tell upper layer to requeue */
  1489. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx locked\n");
  1490. return NETDEV_TX_LOCKED;
  1491. }
  1492. if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
  1493. /* not enough descriptors */
  1494. netif_stop_queue(netdev);
  1495. spin_unlock_irqrestore(&adapter->lock, flags);
  1496. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx busy\n");
  1497. return NETDEV_TX_BUSY;
  1498. }
  1499. param.data = 0;
  1500. if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1501. vlan_tag = vlan_tx_tag_get(skb);
  1502. vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
  1503. ((vlan_tag >> 9) & 0x8);
  1504. param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
  1505. param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
  1506. CSUM_PARAM_VALAN_SHIFT;
  1507. }
  1508. tso = atl1_tso(adapter, skb, &param.tso);
  1509. if (tso < 0) {
  1510. spin_unlock_irqrestore(&adapter->lock, flags);
  1511. dev_kfree_skb_any(skb);
  1512. return NETDEV_TX_OK;
  1513. }
  1514. if (!tso) {
  1515. ret_val = atl1_tx_csum(adapter, skb, &param.csum);
  1516. if (ret_val < 0) {
  1517. spin_unlock_irqrestore(&adapter->lock, flags);
  1518. dev_kfree_skb_any(skb);
  1519. return NETDEV_TX_OK;
  1520. }
  1521. }
  1522. val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
  1523. CSUM_PARAM_SEGMENT_MASK;
  1524. atl1_tx_map(adapter, skb, 1 == val);
  1525. atl1_tx_queue(adapter, count, &param);
  1526. netdev->trans_start = jiffies;
  1527. spin_unlock_irqrestore(&adapter->lock, flags);
  1528. atl1_update_mailbox(adapter);
  1529. return NETDEV_TX_OK;
  1530. }
  1531. /*
  1532. * atl1_intr - Interrupt Handler
  1533. * @irq: interrupt number
  1534. * @data: pointer to a network interface device structure
  1535. * @pt_regs: CPU registers structure
  1536. */
  1537. static irqreturn_t atl1_intr(int irq, void *data)
  1538. {
  1539. struct atl1_adapter *adapter = netdev_priv(data);
  1540. u32 status;
  1541. u8 update_rx;
  1542. int max_ints = 10;
  1543. status = adapter->cmb.cmb->int_stats;
  1544. if (!status)
  1545. return IRQ_NONE;
  1546. update_rx = 0;
  1547. do {
  1548. /* clear CMB interrupt status at once */
  1549. adapter->cmb.cmb->int_stats = 0;
  1550. if (status & ISR_GPHY) /* clear phy status */
  1551. atl1_clear_phy_int(adapter);
  1552. /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
  1553. iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
  1554. /* check if SMB intr */
  1555. if (status & ISR_SMB)
  1556. atl1_inc_smb(adapter);
  1557. /* check if PCIE PHY Link down */
  1558. if (status & ISR_PHY_LINKDOWN) {
  1559. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1560. "pcie phy link down %x\n", status);
  1561. if (netif_running(adapter->netdev)) { /* reset MAC */
  1562. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1563. schedule_work(&adapter->pcie_dma_to_rst_task);
  1564. return IRQ_HANDLED;
  1565. }
  1566. }
  1567. /* check if DMA read/write error ? */
  1568. if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
  1569. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1570. "pcie DMA r/w error (status = 0x%x)\n",
  1571. status);
  1572. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1573. schedule_work(&adapter->pcie_dma_to_rst_task);
  1574. return IRQ_HANDLED;
  1575. }
  1576. /* link event */
  1577. if (status & ISR_GPHY) {
  1578. adapter->soft_stats.tx_carrier_errors++;
  1579. atl1_check_for_link(adapter);
  1580. }
  1581. /* transmit event */
  1582. if (status & ISR_CMB_TX)
  1583. atl1_intr_tx(adapter);
  1584. /* rx exception */
  1585. if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  1586. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  1587. ISR_HOST_RRD_OV | ISR_CMB_RX))) {
  1588. if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  1589. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  1590. ISR_HOST_RRD_OV))
  1591. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1592. "rx exception, ISR = 0x%x\n", status);
  1593. atl1_intr_rx(adapter);
  1594. }
  1595. if (--max_ints < 0)
  1596. break;
  1597. } while ((status = adapter->cmb.cmb->int_stats));
  1598. /* re-enable Interrupt */
  1599. iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
  1600. return IRQ_HANDLED;
  1601. }
  1602. /*
  1603. * atl1_watchdog - Timer Call-back
  1604. * @data: pointer to netdev cast into an unsigned long
  1605. */
  1606. static void atl1_watchdog(unsigned long data)
  1607. {
  1608. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1609. /* Reset the timer */
  1610. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1611. }
  1612. /*
  1613. * atl1_phy_config - Timer Call-back
  1614. * @data: pointer to netdev cast into an unsigned long
  1615. */
  1616. static void atl1_phy_config(unsigned long data)
  1617. {
  1618. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1619. struct atl1_hw *hw = &adapter->hw;
  1620. unsigned long flags;
  1621. spin_lock_irqsave(&adapter->lock, flags);
  1622. adapter->phy_timer_pending = false;
  1623. atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
  1624. atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
  1625. atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
  1626. spin_unlock_irqrestore(&adapter->lock, flags);
  1627. }
  1628. /*
  1629. * atl1_tx_timeout - Respond to a Tx Hang
  1630. * @netdev: network interface device structure
  1631. */
  1632. static void atl1_tx_timeout(struct net_device *netdev)
  1633. {
  1634. struct atl1_adapter *adapter = netdev_priv(netdev);
  1635. /* Do the reset outside of interrupt context */
  1636. schedule_work(&adapter->tx_timeout_task);
  1637. }
  1638. /*
  1639. * Orphaned vendor comment left intact here:
  1640. * <vendor comment>
  1641. * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
  1642. * will assert. We do soft reset <0x1400=1> according
  1643. * with the SPEC. BUT, it seemes that PCIE or DMA
  1644. * state-machine will not be reset. DMAR_TO_INT will
  1645. * assert again and again.
  1646. * </vendor comment>
  1647. */
  1648. static void atl1_tx_timeout_task(struct work_struct *work)
  1649. {
  1650. struct atl1_adapter *adapter =
  1651. container_of(work, struct atl1_adapter, tx_timeout_task);
  1652. struct net_device *netdev = adapter->netdev;
  1653. netif_device_detach(netdev);
  1654. atl1_down(adapter);
  1655. atl1_up(adapter);
  1656. netif_device_attach(netdev);
  1657. }
  1658. /*
  1659. * atl1_link_chg_task - deal with link change event Out of interrupt context
  1660. */
  1661. static void atl1_link_chg_task(struct work_struct *work)
  1662. {
  1663. struct atl1_adapter *adapter =
  1664. container_of(work, struct atl1_adapter, link_chg_task);
  1665. unsigned long flags;
  1666. spin_lock_irqsave(&adapter->lock, flags);
  1667. atl1_check_link(adapter);
  1668. spin_unlock_irqrestore(&adapter->lock, flags);
  1669. }
  1670. static void atl1_vlan_rx_register(struct net_device *netdev,
  1671. struct vlan_group *grp)
  1672. {
  1673. struct atl1_adapter *adapter = netdev_priv(netdev);
  1674. unsigned long flags;
  1675. u32 ctrl;
  1676. spin_lock_irqsave(&adapter->lock, flags);
  1677. /* atl1_irq_disable(adapter); */
  1678. adapter->vlgrp = grp;
  1679. if (grp) {
  1680. /* enable VLAN tag insert/strip */
  1681. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1682. ctrl |= MAC_CTRL_RMV_VLAN;
  1683. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1684. } else {
  1685. /* disable VLAN tag insert/strip */
  1686. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1687. ctrl &= ~MAC_CTRL_RMV_VLAN;
  1688. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1689. }
  1690. /* atl1_irq_enable(adapter); */
  1691. spin_unlock_irqrestore(&adapter->lock, flags);
  1692. }
  1693. static void atl1_restore_vlan(struct atl1_adapter *adapter)
  1694. {
  1695. atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1696. }
  1697. int atl1_reset(struct atl1_adapter *adapter)
  1698. {
  1699. int ret;
  1700. ret = atl1_reset_hw(&adapter->hw);
  1701. if (ret != ATL1_SUCCESS)
  1702. return ret;
  1703. return atl1_init_hw(&adapter->hw);
  1704. }
  1705. s32 atl1_up(struct atl1_adapter *adapter)
  1706. {
  1707. struct net_device *netdev = adapter->netdev;
  1708. int err;
  1709. int irq_flags = IRQF_SAMPLE_RANDOM;
  1710. /* hardware has been reset, we need to reload some things */
  1711. atl1_set_multi(netdev);
  1712. atl1_init_ring_ptrs(adapter);
  1713. atl1_restore_vlan(adapter);
  1714. err = atl1_alloc_rx_buffers(adapter);
  1715. if (unlikely(!err)) /* no RX BUFFER allocated */
  1716. return -ENOMEM;
  1717. if (unlikely(atl1_configure(adapter))) {
  1718. err = -EIO;
  1719. goto err_up;
  1720. }
  1721. err = pci_enable_msi(adapter->pdev);
  1722. if (err) {
  1723. dev_info(&adapter->pdev->dev,
  1724. "Unable to enable MSI: %d\n", err);
  1725. irq_flags |= IRQF_SHARED;
  1726. }
  1727. err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
  1728. netdev->name, netdev);
  1729. if (unlikely(err))
  1730. goto err_up;
  1731. mod_timer(&adapter->watchdog_timer, jiffies);
  1732. atl1_irq_enable(adapter);
  1733. atl1_check_link(adapter);
  1734. return 0;
  1735. err_up:
  1736. pci_disable_msi(adapter->pdev);
  1737. /* free rx_buffers */
  1738. atl1_clean_rx_ring(adapter);
  1739. return err;
  1740. }
  1741. void atl1_down(struct atl1_adapter *adapter)
  1742. {
  1743. struct net_device *netdev = adapter->netdev;
  1744. del_timer_sync(&adapter->watchdog_timer);
  1745. del_timer_sync(&adapter->phy_config_timer);
  1746. adapter->phy_timer_pending = false;
  1747. atl1_irq_disable(adapter);
  1748. free_irq(adapter->pdev->irq, netdev);
  1749. pci_disable_msi(adapter->pdev);
  1750. atl1_reset_hw(&adapter->hw);
  1751. adapter->cmb.cmb->int_stats = 0;
  1752. adapter->link_speed = SPEED_0;
  1753. adapter->link_duplex = -1;
  1754. netif_carrier_off(netdev);
  1755. netif_stop_queue(netdev);
  1756. atl1_clean_tx_ring(adapter);
  1757. atl1_clean_rx_ring(adapter);
  1758. }
  1759. /*
  1760. * atl1_open - Called when a network interface is made active
  1761. * @netdev: network interface device structure
  1762. *
  1763. * Returns 0 on success, negative value on failure
  1764. *
  1765. * The open entry point is called when a network interface is made
  1766. * active by the system (IFF_UP). At this point all resources needed
  1767. * for transmit and receive operations are allocated, the interrupt
  1768. * handler is registered with the OS, the watchdog timer is started,
  1769. * and the stack is notified that the interface is ready.
  1770. */
  1771. static int atl1_open(struct net_device *netdev)
  1772. {
  1773. struct atl1_adapter *adapter = netdev_priv(netdev);
  1774. int err;
  1775. /* allocate transmit descriptors */
  1776. err = atl1_setup_ring_resources(adapter);
  1777. if (err)
  1778. return err;
  1779. err = atl1_up(adapter);
  1780. if (err)
  1781. goto err_up;
  1782. return 0;
  1783. err_up:
  1784. atl1_reset(adapter);
  1785. return err;
  1786. }
  1787. /*
  1788. * atl1_close - Disables a network interface
  1789. * @netdev: network interface device structure
  1790. *
  1791. * Returns 0, this is not allowed to fail
  1792. *
  1793. * The close entry point is called when an interface is de-activated
  1794. * by the OS. The hardware is still under the drivers control, but
  1795. * needs to be disabled. A global MAC reset is issued to stop the
  1796. * hardware, and all transmit and receive resources are freed.
  1797. */
  1798. static int atl1_close(struct net_device *netdev)
  1799. {
  1800. struct atl1_adapter *adapter = netdev_priv(netdev);
  1801. atl1_down(adapter);
  1802. atl1_free_ring_resources(adapter);
  1803. return 0;
  1804. }
  1805. #ifdef CONFIG_PM
  1806. static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
  1807. {
  1808. struct net_device *netdev = pci_get_drvdata(pdev);
  1809. struct atl1_adapter *adapter = netdev_priv(netdev);
  1810. struct atl1_hw *hw = &adapter->hw;
  1811. u32 ctrl = 0;
  1812. u32 wufc = adapter->wol;
  1813. netif_device_detach(netdev);
  1814. if (netif_running(netdev))
  1815. atl1_down(adapter);
  1816. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  1817. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  1818. if (ctrl & BMSR_LSTATUS)
  1819. wufc &= ~ATL1_WUFC_LNKC;
  1820. /* reduce speed to 10/100M */
  1821. if (wufc) {
  1822. atl1_phy_enter_power_saving(hw);
  1823. /* if resume, let driver to re- setup link */
  1824. hw->phy_configured = false;
  1825. atl1_set_mac_addr(hw);
  1826. atl1_set_multi(netdev);
  1827. ctrl = 0;
  1828. /* turn on magic packet wol */
  1829. if (wufc & ATL1_WUFC_MAG)
  1830. ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  1831. /* turn on Link change WOL */
  1832. if (wufc & ATL1_WUFC_LNKC)
  1833. ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
  1834. iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
  1835. /* turn on all-multi mode if wake on multicast is enabled */
  1836. ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  1837. ctrl &= ~MAC_CTRL_DBG;
  1838. ctrl &= ~MAC_CTRL_PROMIS_EN;
  1839. if (wufc & ATL1_WUFC_MC)
  1840. ctrl |= MAC_CTRL_MC_ALL_EN;
  1841. else
  1842. ctrl &= ~MAC_CTRL_MC_ALL_EN;
  1843. /* turn on broadcast mode if wake on-BC is enabled */
  1844. if (wufc & ATL1_WUFC_BC)
  1845. ctrl |= MAC_CTRL_BC_EN;
  1846. else
  1847. ctrl &= ~MAC_CTRL_BC_EN;
  1848. /* enable RX */
  1849. ctrl |= MAC_CTRL_RX_EN;
  1850. iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
  1851. pci_enable_wake(pdev, PCI_D3hot, 1);
  1852. pci_enable_wake(pdev, PCI_D3cold, 1);
  1853. } else {
  1854. iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
  1855. pci_enable_wake(pdev, PCI_D3hot, 0);
  1856. pci_enable_wake(pdev, PCI_D3cold, 0);
  1857. }
  1858. pci_save_state(pdev);
  1859. pci_disable_device(pdev);
  1860. pci_set_power_state(pdev, PCI_D3hot);
  1861. return 0;
  1862. }
  1863. static int atl1_resume(struct pci_dev *pdev)
  1864. {
  1865. struct net_device *netdev = pci_get_drvdata(pdev);
  1866. struct atl1_adapter *adapter = netdev_priv(netdev);
  1867. u32 ret_val;
  1868. pci_set_power_state(pdev, 0);
  1869. pci_restore_state(pdev);
  1870. ret_val = pci_enable_device(pdev);
  1871. pci_enable_wake(pdev, PCI_D3hot, 0);
  1872. pci_enable_wake(pdev, PCI_D3cold, 0);
  1873. iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
  1874. atl1_reset(adapter);
  1875. if (netif_running(netdev))
  1876. atl1_up(adapter);
  1877. netif_device_attach(netdev);
  1878. atl1_via_workaround(adapter);
  1879. return 0;
  1880. }
  1881. #else
  1882. #define atl1_suspend NULL
  1883. #define atl1_resume NULL
  1884. #endif
  1885. #ifdef CONFIG_NET_POLL_CONTROLLER
  1886. static void atl1_poll_controller(struct net_device *netdev)
  1887. {
  1888. disable_irq(netdev->irq);
  1889. atl1_intr(netdev->irq, netdev);
  1890. enable_irq(netdev->irq);
  1891. }
  1892. #endif
  1893. /*
  1894. * atl1_probe - Device Initialization Routine
  1895. * @pdev: PCI device information struct
  1896. * @ent: entry in atl1_pci_tbl
  1897. *
  1898. * Returns 0 on success, negative on failure
  1899. *
  1900. * atl1_probe initializes an adapter identified by a pci_dev structure.
  1901. * The OS initialization, configuring of the adapter private structure,
  1902. * and a hardware reset occur.
  1903. */
  1904. static int __devinit atl1_probe(struct pci_dev *pdev,
  1905. const struct pci_device_id *ent)
  1906. {
  1907. struct net_device *netdev;
  1908. struct atl1_adapter *adapter;
  1909. static int cards_found = 0;
  1910. int err;
  1911. err = pci_enable_device(pdev);
  1912. if (err)
  1913. return err;
  1914. /*
  1915. * The atl1 chip can DMA to 64-bit addresses, but it uses a single
  1916. * shared register for the high 32 bits, so only a single, aligned,
  1917. * 4 GB physical address range can be used at a time.
  1918. *
  1919. * Supporting 64-bit DMA on this hardware is more trouble than it's
  1920. * worth. It is far easier to limit to 32-bit DMA than update
  1921. * various kernel subsystems to support the mechanics required by a
  1922. * fixed-high-32-bit system.
  1923. */
  1924. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1925. if (err) {
  1926. dev_err(&pdev->dev, "no usable DMA configuration\n");
  1927. goto err_dma;
  1928. }
  1929. /* Mark all PCI regions associated with PCI device
  1930. * pdev as being reserved by owner atl1_driver_name
  1931. */
  1932. err = pci_request_regions(pdev, atl1_driver_name);
  1933. if (err)
  1934. goto err_request_regions;
  1935. /* Enables bus-mastering on the device and calls
  1936. * pcibios_set_master to do the needed arch specific settings
  1937. */
  1938. pci_set_master(pdev);
  1939. netdev = alloc_etherdev(sizeof(struct atl1_adapter));
  1940. if (!netdev) {
  1941. err = -ENOMEM;
  1942. goto err_alloc_etherdev;
  1943. }
  1944. SET_NETDEV_DEV(netdev, &pdev->dev);
  1945. pci_set_drvdata(pdev, netdev);
  1946. adapter = netdev_priv(netdev);
  1947. adapter->netdev = netdev;
  1948. adapter->pdev = pdev;
  1949. adapter->hw.back = adapter;
  1950. adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
  1951. if (!adapter->hw.hw_addr) {
  1952. err = -EIO;
  1953. goto err_pci_iomap;
  1954. }
  1955. /* get device revision number */
  1956. adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
  1957. (REG_MASTER_CTRL + 2));
  1958. dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
  1959. /* set default ring resource counts */
  1960. adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
  1961. adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
  1962. adapter->mii.dev = netdev;
  1963. adapter->mii.mdio_read = mdio_read;
  1964. adapter->mii.mdio_write = mdio_write;
  1965. adapter->mii.phy_id_mask = 0x1f;
  1966. adapter->mii.reg_num_mask = 0x1f;
  1967. netdev->open = &atl1_open;
  1968. netdev->stop = &atl1_close;
  1969. netdev->hard_start_xmit = &atl1_xmit_frame;
  1970. netdev->get_stats = &atl1_get_stats;
  1971. netdev->set_multicast_list = &atl1_set_multi;
  1972. netdev->set_mac_address = &atl1_set_mac;
  1973. netdev->change_mtu = &atl1_change_mtu;
  1974. netdev->do_ioctl = &atl1_ioctl;
  1975. netdev->tx_timeout = &atl1_tx_timeout;
  1976. netdev->watchdog_timeo = 5 * HZ;
  1977. #ifdef CONFIG_NET_POLL_CONTROLLER
  1978. netdev->poll_controller = atl1_poll_controller;
  1979. #endif
  1980. netdev->vlan_rx_register = atl1_vlan_rx_register;
  1981. netdev->ethtool_ops = &atl1_ethtool_ops;
  1982. adapter->bd_number = cards_found;
  1983. /* setup the private structure */
  1984. err = atl1_sw_init(adapter);
  1985. if (err)
  1986. goto err_common;
  1987. netdev->features = NETIF_F_HW_CSUM;
  1988. netdev->features |= NETIF_F_SG;
  1989. netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
  1990. /*
  1991. * FIXME - Until tso performance gets fixed, disable the feature.
  1992. * Enable it with ethtool -K if desired.
  1993. */
  1994. /* netdev->features |= NETIF_F_TSO; */
  1995. netdev->features |= NETIF_F_LLTX;
  1996. /*
  1997. * patch for some L1 of old version,
  1998. * the final version of L1 may not need these
  1999. * patches
  2000. */
  2001. /* atl1_pcie_patch(adapter); */
  2002. /* really reset GPHY core */
  2003. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2004. /*
  2005. * reset the controller to
  2006. * put the device in a known good starting state
  2007. */
  2008. if (atl1_reset_hw(&adapter->hw)) {
  2009. err = -EIO;
  2010. goto err_common;
  2011. }
  2012. /* copy the MAC address out of the EEPROM */
  2013. atl1_read_mac_addr(&adapter->hw);
  2014. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2015. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2016. err = -EIO;
  2017. goto err_common;
  2018. }
  2019. atl1_check_options(adapter);
  2020. /* pre-init the MAC, and setup link */
  2021. err = atl1_init_hw(&adapter->hw);
  2022. if (err) {
  2023. err = -EIO;
  2024. goto err_common;
  2025. }
  2026. atl1_pcie_patch(adapter);
  2027. /* assume we have no link for now */
  2028. netif_carrier_off(netdev);
  2029. netif_stop_queue(netdev);
  2030. init_timer(&adapter->watchdog_timer);
  2031. adapter->watchdog_timer.function = &atl1_watchdog;
  2032. adapter->watchdog_timer.data = (unsigned long)adapter;
  2033. init_timer(&adapter->phy_config_timer);
  2034. adapter->phy_config_timer.function = &atl1_phy_config;
  2035. adapter->phy_config_timer.data = (unsigned long)adapter;
  2036. adapter->phy_timer_pending = false;
  2037. INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
  2038. INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
  2039. INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
  2040. err = register_netdev(netdev);
  2041. if (err)
  2042. goto err_common;
  2043. cards_found++;
  2044. atl1_via_workaround(adapter);
  2045. return 0;
  2046. err_common:
  2047. pci_iounmap(pdev, adapter->hw.hw_addr);
  2048. err_pci_iomap:
  2049. free_netdev(netdev);
  2050. err_alloc_etherdev:
  2051. pci_release_regions(pdev);
  2052. err_dma:
  2053. err_request_regions:
  2054. pci_disable_device(pdev);
  2055. return err;
  2056. }
  2057. /*
  2058. * atl1_remove - Device Removal Routine
  2059. * @pdev: PCI device information struct
  2060. *
  2061. * atl1_remove is called by the PCI subsystem to alert the driver
  2062. * that it should release a PCI device. The could be caused by a
  2063. * Hot-Plug event, or because the driver is going to be removed from
  2064. * memory.
  2065. */
  2066. static void __devexit atl1_remove(struct pci_dev *pdev)
  2067. {
  2068. struct net_device *netdev = pci_get_drvdata(pdev);
  2069. struct atl1_adapter *adapter;
  2070. /* Device not available. Return. */
  2071. if (!netdev)
  2072. return;
  2073. adapter = netdev_priv(netdev);
  2074. /* Some atl1 boards lack persistent storage for their MAC, and get it
  2075. * from the BIOS during POST. If we've been messing with the MAC
  2076. * address, we need to save the permanent one.
  2077. */
  2078. if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
  2079. memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
  2080. ETH_ALEN);
  2081. atl1_set_mac_addr(&adapter->hw);
  2082. }
  2083. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2084. unregister_netdev(netdev);
  2085. pci_iounmap(pdev, adapter->hw.hw_addr);
  2086. pci_release_regions(pdev);
  2087. free_netdev(netdev);
  2088. pci_disable_device(pdev);
  2089. }
  2090. static struct pci_driver atl1_driver = {
  2091. .name = atl1_driver_name,
  2092. .id_table = atl1_pci_tbl,
  2093. .probe = atl1_probe,
  2094. .remove = __devexit_p(atl1_remove),
  2095. .suspend = atl1_suspend,
  2096. .resume = atl1_resume
  2097. };
  2098. /*
  2099. * atl1_exit_module - Driver Exit Cleanup Routine
  2100. *
  2101. * atl1_exit_module is called just before the driver is removed
  2102. * from memory.
  2103. */
  2104. static void __exit atl1_exit_module(void)
  2105. {
  2106. pci_unregister_driver(&atl1_driver);
  2107. }
  2108. /*
  2109. * atl1_init_module - Driver Registration Routine
  2110. *
  2111. * atl1_init_module is the first routine called when the driver is
  2112. * loaded. All it does is register with the PCI subsystem.
  2113. */
  2114. static int __init atl1_init_module(void)
  2115. {
  2116. return pci_register_driver(&atl1_driver);
  2117. }
  2118. module_init(atl1_init_module);
  2119. module_exit(atl1_exit_module);