stradis.c 64 KB

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  1. /*
  2. * stradis.c - stradis 4:2:2 mpeg decoder driver
  3. *
  4. * Stradis 4:2:2 MPEG-2 Decoder Driver
  5. * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/errno.h>
  24. #include <linux/fs.h>
  25. #include <linux/kernel.h>
  26. #include <linux/major.h>
  27. #include <linux/slab.h>
  28. #include <linux/mm.h>
  29. #include <linux/init.h>
  30. #include <linux/poll.h>
  31. #include <linux/pci.h>
  32. #include <linux/signal.h>
  33. #include <asm/io.h>
  34. #include <linux/ioport.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/page.h>
  37. #include <linux/sched.h>
  38. #include <asm/types.h>
  39. #include <linux/types.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include <linux/vmalloc.h>
  43. #include <linux/videodev.h>
  44. #include <media/v4l2-common.h>
  45. #include "saa7146.h"
  46. #include "saa7146reg.h"
  47. #include "ibmmpeg2.h"
  48. #include "saa7121.h"
  49. #include "cs8420.h"
  50. #define DEBUG(x) /* debug driver */
  51. #undef IDEBUG /* debug irq handler */
  52. #undef MDEBUG /* debug memory management */
  53. #define SAA7146_MAX 6
  54. static struct saa7146 saa7146s[SAA7146_MAX];
  55. static int saa_num = 0; /* number of SAA7146s in use */
  56. static int video_nr = -1;
  57. module_param(video_nr, int, 0);
  58. MODULE_LICENSE("GPL");
  59. #define nDebNormal 0x00480000
  60. #define nDebNoInc 0x00480000
  61. #define nDebVideo 0xd0480000
  62. #define nDebAudio 0xd0400000
  63. #define nDebDMA 0x02c80000
  64. #define oDebNormal 0x13c80000
  65. #define oDebNoInc 0x13c80000
  66. #define oDebVideo 0xd1080000
  67. #define oDebAudio 0xd1080000
  68. #define oDebDMA 0x03080000
  69. #define NewCard (saa->boardcfg[3])
  70. #define ChipControl (saa->boardcfg[1])
  71. #define NTSCFirstActive (saa->boardcfg[4])
  72. #define PALFirstActive (saa->boardcfg[5])
  73. #define NTSCLastActive (saa->boardcfg[54])
  74. #define PALLastActive (saa->boardcfg[55])
  75. #define Have2MB (saa->boardcfg[18] & 0x40)
  76. #define HaveCS8420 (saa->boardcfg[18] & 0x04)
  77. #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
  78. #define HaveCS3310 (saa->boardcfg[18] & 0x01)
  79. #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
  80. #define HaveCS4341 (saa->boardcfg[40] == 2)
  81. #define SDIType (saa->boardcfg[27])
  82. #define CurrentMode (saa->boardcfg[2])
  83. #define debNormal (NewCard ? nDebNormal : oDebNormal)
  84. #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
  85. #define debVideo (NewCard ? nDebVideo : oDebVideo)
  86. #define debAudio (NewCard ? nDebAudio : oDebAudio)
  87. #define debDMA (NewCard ? nDebDMA : oDebDMA)
  88. #ifdef USE_RESCUE_EEPROM_SDM275
  89. static unsigned char rescue_eeprom[64] = {
  90. 0x00, 0x01, 0x04, 0x13, 0x26, 0x0f, 0x10, 0x00, 0x00, 0x00, 0x43, 0x63,
  91. 0x22, 0x01, 0x29, 0x15, 0x73, 0x00, 0x1f, 'd', 'e', 'c', 'x', 'l',
  92. 'd', 'v', 'a', 0x02, 0x00, 0x01, 0x00, 0xcc, 0xa4, 0x63, 0x09, 0xe2,
  93. 0x10, 0x00, 0x0a, 0x00, 0x02, 0x02, 'd', 'e', 'c', 'x', 'l', 'a',
  94. 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  95. 0x00, 0x00, 0x00, 0x00,
  96. };
  97. #endif
  98. /* ----------------------------------------------------------------------- */
  99. /* Hardware I2C functions */
  100. static void I2CWipe(struct saa7146 *saa)
  101. {
  102. int i;
  103. /* set i2c to ~=100kHz, abort transfer, clear busy */
  104. saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
  105. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  106. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  107. /* wait for i2c registers to be programmed */
  108. for (i = 0; i < 1000 &&
  109. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  110. schedule();
  111. saawrite(0x600, SAA7146_I2C_STATUS);
  112. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  113. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  114. /* wait for i2c registers to be programmed */
  115. for (i = 0; i < 1000 &&
  116. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  117. schedule();
  118. saawrite(0x600, SAA7146_I2C_STATUS);
  119. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  120. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  121. /* wait for i2c registers to be programmed */
  122. for (i = 0; i < 1000 &&
  123. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  124. schedule();
  125. }
  126. /* read I2C */
  127. static int I2CRead(struct saa7146 *saa, unsigned char addr,
  128. unsigned char subaddr, int dosub)
  129. {
  130. int i;
  131. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  132. I2CWipe(saa);
  133. for (i = 0;
  134. i < 1000 && (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY);
  135. i++)
  136. schedule();
  137. if (i == 1000)
  138. I2CWipe(saa);
  139. if (dosub)
  140. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
  141. ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
  142. else
  143. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
  144. 0xf1, SAA7146_I2C_TRANSFER);
  145. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  146. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  147. /* wait for i2c registers to be programmed */
  148. for (i = 0; i < 1000 &&
  149. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  150. schedule();
  151. /* wait for valid data */
  152. for (i = 0; i < 1000 &&
  153. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  154. schedule();
  155. if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
  156. return -1;
  157. if (i == 1000)
  158. printk("i2c setup read timeout\n");
  159. saawrite(0x41, SAA7146_I2C_TRANSFER);
  160. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  161. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  162. /* wait for i2c registers to be programmed */
  163. for (i = 0; i < 1000 &&
  164. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  165. schedule();
  166. /* wait for valid data */
  167. for (i = 0; i < 1000 &&
  168. (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
  169. schedule();
  170. if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
  171. return -1;
  172. if (i == 1000)
  173. printk("i2c read timeout\n");
  174. return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
  175. }
  176. /* set both to write both bytes, reset it to write only b1 */
  177. static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1,
  178. unsigned char b2, int both)
  179. {
  180. int i;
  181. u32 data;
  182. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  183. I2CWipe(saa);
  184. for (i = 0; i < 1000 &&
  185. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  186. schedule();
  187. if (i == 1000)
  188. I2CWipe(saa);
  189. data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
  190. if (both)
  191. data |= ((b2 & 0xff) << 8) | 0xe5;
  192. else
  193. data |= 0xd1;
  194. saawrite(data, SAA7146_I2C_TRANSFER);
  195. saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
  196. SAA7146_MC2);
  197. return 0;
  198. }
  199. static void attach_inform(struct saa7146 *saa, int id)
  200. {
  201. int i;
  202. DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr,
  203. id));
  204. if (id == 0xa0) { /* we have rev2 or later board, fill in info */
  205. for (i = 0; i < 64; i++)
  206. saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1);
  207. #ifdef USE_RESCUE_EEPROM_SDM275
  208. if (saa->boardcfg[0] != 0) {
  209. printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE "
  210. "BEEN IGNORED\n", saa->nr);
  211. for (i = 0; i < 64; i++)
  212. saa->boardcfg[i] = rescue_eeprom[i];
  213. }
  214. #endif
  215. printk("stradis%d: config =", saa->nr);
  216. for (i = 0; i < 51; i++) {
  217. printk(" %02x", saa->boardcfg[i]);
  218. }
  219. printk("\n");
  220. }
  221. }
  222. static void I2CBusScan(struct saa7146 *saa)
  223. {
  224. int i;
  225. for (i = 0; i < 0xff; i += 2)
  226. if ((I2CRead(saa, i, 0, 0)) >= 0)
  227. attach_inform(saa, i);
  228. }
  229. static int debiwait_maxwait = 0;
  230. static int wait_for_debi_done(struct saa7146 *saa)
  231. {
  232. int i;
  233. /* wait for registers to be programmed */
  234. for (i = 0; i < 100000 &&
  235. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
  236. saaread(SAA7146_MC2);
  237. /* wait for transfer to complete */
  238. for (i = 0; i < 500000 &&
  239. (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
  240. saaread(SAA7146_MC2);
  241. if (i > debiwait_maxwait)
  242. printk("wait-for-debi-done maxwait: %d\n",
  243. debiwait_maxwait = i);
  244. if (i == 500000)
  245. return -1;
  246. return 0;
  247. }
  248. static int debiwrite(struct saa7146 *saa, u32 config, int addr,
  249. u32 val, int count)
  250. {
  251. u32 cmd;
  252. if (count <= 0 || count > 32764)
  253. return -1;
  254. if (wait_for_debi_done(saa) < 0)
  255. return -1;
  256. saawrite(config, SAA7146_DEBI_CONFIG);
  257. if (count <= 4) /* immediate transfer */
  258. saawrite(val, SAA7146_DEBI_AD);
  259. else /* block transfer */
  260. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  261. saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
  262. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  263. SAA7146_MC2);
  264. return 0;
  265. }
  266. static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
  267. {
  268. u32 result = 0;
  269. if (count > 32764 || count <= 0)
  270. return 0;
  271. if (wait_for_debi_done(saa) < 0)
  272. return 0;
  273. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  274. saawrite((count << 17) | 0x10000 | (addr & 0xffff),
  275. SAA7146_DEBI_COMMAND);
  276. saawrite(config, SAA7146_DEBI_CONFIG);
  277. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  278. SAA7146_MC2);
  279. if (count > 4) /* not an immediate transfer */
  280. return count;
  281. wait_for_debi_done(saa);
  282. result = saaread(SAA7146_DEBI_AD);
  283. if (count == 1)
  284. result &= 0xff;
  285. if (count == 2)
  286. result &= 0xffff;
  287. if (count == 3)
  288. result &= 0xffffff;
  289. return result;
  290. }
  291. static void do_irq_send_data(struct saa7146 *saa)
  292. {
  293. int split, audbytes, vidbytes;
  294. saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
  295. /* if special feature mode in effect, disable audio sending */
  296. if (saa->playmode != VID_PLAY_NORMAL)
  297. saa->audtail = saa->audhead = 0;
  298. if (saa->audhead <= saa->audtail)
  299. audbytes = saa->audtail - saa->audhead;
  300. else
  301. audbytes = 65536 - (saa->audhead - saa->audtail);
  302. if (saa->vidhead <= saa->vidtail)
  303. vidbytes = saa->vidtail - saa->vidhead;
  304. else
  305. vidbytes = 524288 - (saa->vidhead - saa->vidtail);
  306. if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
  307. saawrite(0, SAA7146_IER);
  308. return;
  309. }
  310. /* if at least 1 block audio waiting and audio fifo isn't full */
  311. if (audbytes >= 2048 && (debiread(saa, debNormal, IBM_MP2_AUD_FIFO, 2)
  312. & 0xff) < 60) {
  313. if (saa->audhead > saa->audtail)
  314. split = 65536 - saa->audhead;
  315. else
  316. split = 0;
  317. audbytes = 2048;
  318. if (split > 0 && split < 2048) {
  319. memcpy(saa->dmadebi, saa->audbuf + saa->audhead, split);
  320. saa->audhead = 0;
  321. audbytes -= split;
  322. } else
  323. split = 0;
  324. memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
  325. audbytes);
  326. saa->audhead += audbytes;
  327. saa->audhead &= 0xffff;
  328. debiwrite(saa, debAudio, (NewCard ? IBM_MP2_AUD_FIFO :
  329. IBM_MP2_AUD_FIFOW), 0, 2048);
  330. wake_up_interruptible(&saa->audq);
  331. /* if at least 1 block video waiting and video fifo isn't full */
  332. } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
  333. IBM_MP2_FIFO, 2)) < 16384) {
  334. if (saa->vidhead > saa->vidtail)
  335. split = 524288 - saa->vidhead;
  336. else
  337. split = 0;
  338. vidbytes = 30720;
  339. if (split > 0 && split < 30720) {
  340. memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, split);
  341. saa->vidhead = 0;
  342. vidbytes -= split;
  343. } else
  344. split = 0;
  345. memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
  346. vidbytes);
  347. saa->vidhead += vidbytes;
  348. saa->vidhead &= 0x7ffff;
  349. debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
  350. IBM_MP2_FIFOW), 0, 30720);
  351. wake_up_interruptible(&saa->vidq);
  352. }
  353. saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
  354. }
  355. static void send_osd_data(struct saa7146 *saa)
  356. {
  357. int size = saa->osdtail - saa->osdhead;
  358. if (size > 30720)
  359. size = 30720;
  360. /* ensure some multiple of 8 bytes is transferred */
  361. size = 8 * ((size + 8) >> 3);
  362. if (size) {
  363. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
  364. (saa->osdhead >> 3), 2);
  365. memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
  366. saa->osdhead += size;
  367. /* block transfer of next 8 bytes to ~32k bytes */
  368. debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
  369. }
  370. if (saa->osdhead >= saa->osdtail) {
  371. saa->osdhead = saa->osdtail = 0;
  372. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  373. }
  374. }
  375. static irqreturn_t saa7146_irq(int irq, void *dev_id)
  376. {
  377. struct saa7146 *saa = dev_id;
  378. u32 stat, astat;
  379. int count;
  380. int handled = 0;
  381. count = 0;
  382. while (1) {
  383. /* get/clear interrupt status bits */
  384. stat = saaread(SAA7146_ISR);
  385. astat = stat & saaread(SAA7146_IER);
  386. if (!astat)
  387. break;
  388. handled = 1;
  389. saawrite(astat, SAA7146_ISR);
  390. if (astat & SAA7146_PSR_DEBI_S) {
  391. do_irq_send_data(saa);
  392. }
  393. if (astat & SAA7146_PSR_PIN1) {
  394. int istat;
  395. /* the following read will trigger DEBI_S */
  396. istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  397. if (istat & 1) {
  398. saawrite(0, SAA7146_IER);
  399. send_osd_data(saa);
  400. saawrite(SAA7146_PSR_DEBI_S |
  401. SAA7146_PSR_PIN1, SAA7146_IER);
  402. }
  403. if (istat & 0x20) { /* Video Start */
  404. saa->vidinfo.frame_count++;
  405. }
  406. if (istat & 0x400) { /* Picture Start */
  407. /* update temporal reference */
  408. }
  409. if (istat & 0x200) { /* Picture Resolution Change */
  410. /* read new resolution */
  411. }
  412. if (istat & 0x100) { /* New User Data found */
  413. /* read new user data */
  414. }
  415. if (istat & 0x1000) { /* new GOP/SMPTE */
  416. /* read new SMPTE */
  417. }
  418. if (istat & 0x8000) { /* Sequence Start Code */
  419. /* reset frame counter, load sizes */
  420. saa->vidinfo.frame_count = 0;
  421. saa->vidinfo.h_size = 704;
  422. saa->vidinfo.v_size = 480;
  423. #if 0
  424. if (saa->endmarkhead != saa->endmarktail) {
  425. saa->audhead =
  426. saa->endmark[saa->endmarkhead];
  427. saa->endmarkhead++;
  428. if (saa->endmarkhead >= MAX_MARKS)
  429. saa->endmarkhead = 0;
  430. }
  431. #endif
  432. }
  433. if (istat & 0x4000) { /* Sequence Error Code */
  434. if (saa->endmarkhead != saa->endmarktail) {
  435. saa->audhead =
  436. saa->endmark[saa->endmarkhead];
  437. saa->endmarkhead++;
  438. if (saa->endmarkhead >= MAX_MARKS)
  439. saa->endmarkhead = 0;
  440. }
  441. }
  442. }
  443. #ifdef IDEBUG
  444. if (astat & SAA7146_PSR_PPEF) {
  445. IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
  446. }
  447. if (astat & SAA7146_PSR_PABO) {
  448. IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
  449. }
  450. if (astat & SAA7146_PSR_PPED) {
  451. IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
  452. }
  453. if (astat & SAA7146_PSR_RPS_I1) {
  454. IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
  455. }
  456. if (astat & SAA7146_PSR_RPS_I0) {
  457. IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
  458. }
  459. if (astat & SAA7146_PSR_RPS_LATE1) {
  460. IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
  461. }
  462. if (astat & SAA7146_PSR_RPS_LATE0) {
  463. IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
  464. }
  465. if (astat & SAA7146_PSR_RPS_E1) {
  466. IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
  467. }
  468. if (astat & SAA7146_PSR_RPS_E0) {
  469. IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
  470. }
  471. if (astat & SAA7146_PSR_RPS_TO1) {
  472. IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
  473. }
  474. if (astat & SAA7146_PSR_RPS_TO0) {
  475. IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
  476. }
  477. if (astat & SAA7146_PSR_UPLD) {
  478. IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
  479. }
  480. if (astat & SAA7146_PSR_DEBI_E) {
  481. IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
  482. }
  483. if (astat & SAA7146_PSR_I2C_S) {
  484. IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
  485. }
  486. if (astat & SAA7146_PSR_I2C_E) {
  487. IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
  488. }
  489. if (astat & SAA7146_PSR_A2_IN) {
  490. IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
  491. }
  492. if (astat & SAA7146_PSR_A2_OUT) {
  493. IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
  494. }
  495. if (astat & SAA7146_PSR_A1_IN) {
  496. IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
  497. }
  498. if (astat & SAA7146_PSR_A1_OUT) {
  499. IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
  500. }
  501. if (astat & SAA7146_PSR_AFOU) {
  502. IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
  503. }
  504. if (astat & SAA7146_PSR_V_PE) {
  505. IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
  506. }
  507. if (astat & SAA7146_PSR_VFOU) {
  508. IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
  509. }
  510. if (astat & SAA7146_PSR_FIDA) {
  511. IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
  512. }
  513. if (astat & SAA7146_PSR_FIDB) {
  514. IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
  515. }
  516. if (astat & SAA7146_PSR_PIN3) {
  517. IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
  518. }
  519. if (astat & SAA7146_PSR_PIN2) {
  520. IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
  521. }
  522. if (astat & SAA7146_PSR_PIN0) {
  523. IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
  524. }
  525. if (astat & SAA7146_PSR_ECS) {
  526. IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
  527. }
  528. if (astat & SAA7146_PSR_EC3S) {
  529. IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
  530. }
  531. if (astat & SAA7146_PSR_EC0S) {
  532. IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
  533. }
  534. #endif
  535. count++;
  536. if (count > 15)
  537. printk(KERN_WARNING "stradis%d: irq loop %d\n",
  538. saa->nr, count);
  539. if (count > 20) {
  540. saawrite(0, SAA7146_IER);
  541. printk(KERN_ERR
  542. "stradis%d: IRQ loop cleared\n", saa->nr);
  543. }
  544. }
  545. return IRQ_RETVAL(handled);
  546. }
  547. static int ibm_send_command(struct saa7146 *saa,
  548. int command, int data, int chain)
  549. {
  550. int i;
  551. if (chain)
  552. debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1)| 1,2);
  553. else
  554. debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
  555. debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
  556. debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
  557. for (i = 0; i < 100 &&
  558. (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
  559. schedule();
  560. if (i == 100)
  561. return -1;
  562. return 0;
  563. }
  564. static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
  565. {
  566. I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2);
  567. I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2);
  568. }
  569. static void initialize_cs4341(struct saa7146 *saa)
  570. {
  571. int i;
  572. for (i = 0; i < 200; i++) {
  573. /* auto mute off, power on, no de-emphasis */
  574. /* I2S data up to 24-bit 64xFs internal SCLK */
  575. I2CWrite(saa, 0x22, 0x01, 0x11, 2);
  576. /* ATAPI mixer settings */
  577. I2CWrite(saa, 0x22, 0x02, 0x49, 2);
  578. /* attenuation left 3db */
  579. I2CWrite(saa, 0x22, 0x03, 0x00, 2);
  580. /* attenuation right 3db */
  581. I2CWrite(saa, 0x22, 0x04, 0x00, 2);
  582. I2CWrite(saa, 0x22, 0x01, 0x10, 2);
  583. if (I2CRead(saa, 0x22, 0x02, 1) == 0x49)
  584. break;
  585. schedule();
  586. }
  587. printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
  588. return;
  589. }
  590. static void initialize_cs8420(struct saa7146 *saa, int pro)
  591. {
  592. int i;
  593. u8 *sequence;
  594. if (pro)
  595. sequence = mode8420pro;
  596. else
  597. sequence = mode8420con;
  598. for (i = 0; i < INIT8420LEN; i++)
  599. I2CWrite(saa, 0x20, init8420[i * 2], init8420[i * 2 + 1], 2);
  600. for (i = 0; i < MODE8420LEN; i++)
  601. I2CWrite(saa, 0x20, sequence[i * 2], sequence[i * 2 + 1], 2);
  602. printk("stradis%d: CS8420 initialized\n", saa->nr);
  603. }
  604. static void initialize_saa7121(struct saa7146 *saa, int dopal)
  605. {
  606. int i, mod;
  607. u8 *sequence;
  608. if (dopal)
  609. sequence = init7121pal;
  610. else
  611. sequence = init7121ntsc;
  612. mod = saaread(SAA7146_PSR) & 0x08;
  613. /* initialize PAL/NTSC video encoder */
  614. for (i = 0; i < INIT7121LEN; i++) {
  615. if (NewCard) { /* handle new card encoder differences */
  616. if (sequence[i * 2] == 0x3a)
  617. I2CWrite(saa, 0x88, 0x3a, 0x13, 2);
  618. else if (sequence[i * 2] == 0x6b)
  619. I2CWrite(saa, 0x88, 0x6b, 0x20, 2);
  620. else if (sequence[i * 2] == 0x6c)
  621. I2CWrite(saa, 0x88, 0x6c,
  622. dopal ? 0x09 : 0xf5, 2);
  623. else if (sequence[i * 2] == 0x6d)
  624. I2CWrite(saa, 0x88, 0x6d,
  625. dopal ? 0x20 : 0x00, 2);
  626. else if (sequence[i * 2] == 0x7a)
  627. I2CWrite(saa, 0x88, 0x7a,
  628. dopal ? (PALFirstActive - 1) :
  629. (NTSCFirstActive - 4), 2);
  630. else if (sequence[i * 2] == 0x7b)
  631. I2CWrite(saa, 0x88, 0x7b,
  632. dopal ? PALLastActive :
  633. NTSCLastActive, 2);
  634. else
  635. I2CWrite(saa, 0x88, sequence[i * 2],
  636. sequence[i * 2 + 1], 2);
  637. } else {
  638. if (sequence[i * 2] == 0x6b && mod)
  639. I2CWrite(saa, 0x88, 0x6b,
  640. (sequence[i * 2 + 1] ^ 0x09), 2);
  641. else if (sequence[i * 2] == 0x7a)
  642. I2CWrite(saa, 0x88, 0x7a,
  643. dopal ? (PALFirstActive - 1) :
  644. (NTSCFirstActive - 4), 2);
  645. else if (sequence[i * 2] == 0x7b)
  646. I2CWrite(saa, 0x88, 0x7b,
  647. dopal ? PALLastActive :
  648. NTSCLastActive, 2);
  649. else
  650. I2CWrite(saa, 0x88, sequence[i * 2],
  651. sequence[i * 2 + 1], 2);
  652. }
  653. }
  654. }
  655. static void set_genlock_offset(struct saa7146 *saa, int noffset)
  656. {
  657. int nCode;
  658. int PixelsPerLine = 858;
  659. if (CurrentMode == VIDEO_MODE_PAL)
  660. PixelsPerLine = 864;
  661. if (noffset > 500)
  662. noffset = 500;
  663. else if (noffset < -500)
  664. noffset = -500;
  665. nCode = noffset + 0x100;
  666. if (nCode == 1)
  667. nCode = 0x401;
  668. else if (nCode < 1)
  669. nCode = 0x400 + PixelsPerLine + nCode;
  670. debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
  671. }
  672. static void set_out_format(struct saa7146 *saa, int mode)
  673. {
  674. initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
  675. saa->boardcfg[2] = mode;
  676. /* do not adjust analog video parameters here, use saa7121 init */
  677. /* you will affect the SDI output on the new card */
  678. if (mode == VIDEO_MODE_PAL) { /* PAL */
  679. debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
  680. mdelay(50);
  681. saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
  682. if (NewCard) {
  683. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 0xe100, 2);
  684. mdelay(50);
  685. }
  686. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  687. NewCard ? 0xe500 : 0x6500, 2);
  688. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  689. (1 << 8) |
  690. (NewCard ? PALFirstActive : PALFirstActive - 6), 2);
  691. } else { /* NTSC */
  692. debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
  693. mdelay(50);
  694. saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
  695. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  696. NewCard ? 0xe100 : 0x6100, 2);
  697. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  698. (1 << 8) |
  699. (NewCard ? NTSCFirstActive : NTSCFirstActive - 6), 2);
  700. }
  701. }
  702. /* Intialize bitmangler to map from a byte value to the mangled word that
  703. * must be output to program the Xilinx part through the DEBI port.
  704. * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
  705. * transfer FPGA code, init IBM chip, transfer IBM microcode
  706. * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
  707. */
  708. static u16 bitmangler[256];
  709. static int initialize_fpga(struct video_code *bitdata)
  710. {
  711. int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
  712. u16 *dmabuf;
  713. u8 *newdma;
  714. struct saa7146 *saa;
  715. /* verify fpga code */
  716. for (startindex = 0; startindex < bitdata->datasize; startindex++)
  717. if (bitdata->data[startindex] == 255)
  718. break;
  719. if (startindex == bitdata->datasize) {
  720. printk(KERN_INFO "stradis: bad fpga code\n");
  721. return -1;
  722. }
  723. /* initialize all detected cards */
  724. for (num = 0; num < saa_num; num++) {
  725. saa = &saa7146s[num];
  726. if (saa->boardcfg[0] > 20)
  727. continue; /* card was programmed */
  728. loadtwo = (saa->boardcfg[18] & 0x10);
  729. if (!NewCard) /* we have an old board */
  730. for (i = 0; i < 256; i++)
  731. bitmangler[i] = ((i & 0x01) << 15) |
  732. ((i & 0x02) << 6) | ((i & 0x04) << 4) |
  733. ((i & 0x08) << 9) | ((i & 0x10) << 7) |
  734. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  735. ((i & 0x80) >> 7);
  736. else /* else we have a new board */
  737. for (i = 0; i < 256; i++)
  738. bitmangler[i] = ((i & 0x01) << 7) |
  739. ((i & 0x02) << 5) | ((i & 0x04) << 3) |
  740. ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
  741. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  742. ((i & 0x80) >> 7);
  743. dmabuf = (u16 *) saa->dmadebi;
  744. newdma = (u8 *) saa->dmadebi;
  745. if (NewCard) { /* SDM2xxx */
  746. if (!strncmp(bitdata->loadwhat, "decoder2", 8))
  747. continue; /* fpga not for this card */
  748. if (!strncmp(&saa->boardcfg[42], bitdata->loadwhat, 8))
  749. loadfile = 1;
  750. else if (loadtwo && !strncmp(&saa->boardcfg[19],
  751. bitdata->loadwhat, 8))
  752. loadfile = 2;
  753. else if (!saa->boardcfg[42] && !strncmp("decxl",
  754. bitdata->loadwhat, 8))
  755. loadfile = 1; /* special */
  756. else
  757. continue; /* fpga not for this card */
  758. if (loadfile != 1 && loadfile != 2)
  759. continue; /* skip to next card */
  760. if (saa->boardcfg[0] && loadfile == 1)
  761. continue; /* skip to next card */
  762. if (saa->boardcfg[0] != 1 && loadfile == 2)
  763. continue; /* skip to next card */
  764. saa->boardcfg[0]++; /* mark fpga handled */
  765. printk("stradis%d: loading %s\n", saa->nr,
  766. bitdata->loadwhat);
  767. if (loadtwo && loadfile == 2)
  768. goto send_fpga_stuff;
  769. /* turn on the Audio interface to set PROG low */
  770. saawrite(0x00400040, SAA7146_GPIO_CTRL);
  771. saaread(SAA7146_PSR); /* ensure posted write */
  772. /* wait for everyone to reset */
  773. mdelay(10);
  774. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  775. } else { /* original card */
  776. if (strncmp(bitdata->loadwhat, "decoder2", 8))
  777. continue; /* fpga not for this card */
  778. /* Pull the Xilinx PROG signal WS3 low */
  779. saawrite(0x02000200, SAA7146_MC1);
  780. /* Turn on the Audio interface so can set PROG low */
  781. saawrite(0x000000c0, SAA7146_ACON1);
  782. /* Pull the Xilinx INIT signal (GPIO2) low */
  783. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  784. /* Make sure everybody resets */
  785. saaread(SAA7146_PSR); /* ensure posted write */
  786. mdelay(10);
  787. /* Release the Xilinx PROG signal */
  788. saawrite(0x00000000, SAA7146_ACON1);
  789. /* Turn off the Audio interface */
  790. saawrite(0x02000000, SAA7146_MC1);
  791. }
  792. /* Release Xilinx INIT signal (WS2) */
  793. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  794. /* Wait for the INIT to go High */
  795. for (i = 0;
  796. i < 10000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  797. i++)
  798. schedule();
  799. if (i == 1000) {
  800. printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
  801. return -1;
  802. }
  803. send_fpga_stuff:
  804. if (NewCard) {
  805. for (i = startindex; i < bitdata->datasize; i++)
  806. newdma[i - startindex] =
  807. bitmangler[bitdata->data[i]];
  808. debiwrite(saa, 0x01420000, 0, 0,
  809. ((bitdata->datasize - startindex) + 5));
  810. if (loadtwo && loadfile == 1) {
  811. printk("stradis%d: awaiting 2nd FPGA bitfile\n",
  812. saa->nr);
  813. continue; /* skip to next card */
  814. }
  815. } else {
  816. for (i = startindex; i < bitdata->datasize; i++)
  817. dmabuf[i - startindex] =
  818. bitmangler[bitdata->data[i]];
  819. debiwrite(saa, 0x014a0000, 0, 0,
  820. ((bitdata->datasize - startindex) + 5) * 2);
  821. }
  822. for (i = 0;
  823. i < 1000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  824. i++)
  825. schedule();
  826. if (i == 1000) {
  827. printk(KERN_INFO "stradis%d: FPGA load failed\n",
  828. saa->nr);
  829. failure++;
  830. continue;
  831. }
  832. if (!NewCard) {
  833. /* Pull the Xilinx INIT signal (GPIO2) low */
  834. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  835. saaread(SAA7146_PSR); /* ensure posted write */
  836. mdelay(2);
  837. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  838. mdelay(2);
  839. }
  840. printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
  841. saa->boardcfg[0] = 26; /* mark fpga programmed */
  842. /* set VXCO to its lowest frequency */
  843. debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
  844. if (NewCard) {
  845. /* mute CS3310 */
  846. if (HaveCS3310)
  847. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  848. 0, 2);
  849. /* set VXCO to PWM mode, release reset, blank on */
  850. debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
  851. mdelay(10);
  852. /* unmute CS3310 */
  853. if (HaveCS3310)
  854. debiwrite(saa, debNormal, XILINX_CTL0,
  855. 0x2020, 2);
  856. }
  857. /* set source Black */
  858. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  859. saa->boardcfg[4] = 22; /* set NTSC First Active Line */
  860. saa->boardcfg[5] = 23; /* set PAL First Active Line */
  861. saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
  862. saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
  863. set_out_format(saa, VIDEO_MODE_NTSC);
  864. mdelay(50);
  865. /* begin IBM chip init */
  866. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  867. saaread(SAA7146_PSR); /* wait for reset */
  868. mdelay(5);
  869. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  870. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  871. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
  872. debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
  873. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  874. if (NewCard) {
  875. mdelay(5);
  876. /* set i2s rate converter to 48KHz */
  877. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  878. /* we must init CS8420 first since rev b pulls i2s */
  879. /* master clock low and CS4341 needs i2s master to */
  880. /* run the i2c port. */
  881. if (HaveCS8420)
  882. /* 0=consumer, 1=pro */
  883. initialize_cs8420(saa, 0);
  884. mdelay(5);
  885. if (HaveCS4341)
  886. initialize_cs4341(saa);
  887. }
  888. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  889. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  890. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  891. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  892. if (NewCard)
  893. set_genlock_offset(saa, 0);
  894. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  895. #if 0
  896. /* enable genlock */
  897. debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
  898. #else
  899. /* disable genlock */
  900. debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
  901. #endif
  902. }
  903. return failure;
  904. }
  905. static int do_ibm_reset(struct saa7146 *saa)
  906. {
  907. /* failure if decoder not previously programmed */
  908. if (saa->boardcfg[0] < 37)
  909. return -EIO;
  910. /* mute CS3310 */
  911. if (HaveCS3310)
  912. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
  913. /* disable interrupts */
  914. saawrite(0, SAA7146_IER);
  915. saa->audhead = saa->audtail = 0;
  916. saa->vidhead = saa->vidtail = 0;
  917. /* tristate debi bus, disable debi transfers */
  918. saawrite(0x00880000, SAA7146_MC1);
  919. /* ensure posted write */
  920. saaread(SAA7146_MC1);
  921. mdelay(50);
  922. /* re-enable debi transfers */
  923. saawrite(0x00880088, SAA7146_MC1);
  924. /* set source Black */
  925. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  926. /* begin IBM chip init */
  927. set_out_format(saa, CurrentMode);
  928. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  929. saaread(SAA7146_PSR); /* wait for reset */
  930. mdelay(5);
  931. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  932. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  933. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  934. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  935. if (NewCard) {
  936. mdelay(5);
  937. /* set i2s rate converter to 48KHz */
  938. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  939. /* we must init CS8420 first since rev b pulls i2s */
  940. /* master clock low and CS4341 needs i2s master to */
  941. /* run the i2c port. */
  942. if (HaveCS8420)
  943. /* 0=consumer, 1=pro */
  944. initialize_cs8420(saa, 1);
  945. mdelay(5);
  946. if (HaveCS4341)
  947. initialize_cs4341(saa);
  948. }
  949. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  950. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  951. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  952. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  953. if (NewCard)
  954. set_genlock_offset(saa, 0);
  955. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  956. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  957. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  958. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  959. (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
  960. printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
  961. }
  962. if (HaveCS3310) {
  963. int i = CS3310MaxLvl;
  964. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i << 8)| i),2);
  965. }
  966. /* start video decoder */
  967. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  968. /* 256k vid, 3520 bytes aud */
  969. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
  970. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  971. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  972. /* enable buffer threshold irq */
  973. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  974. /* clear pending interrupts */
  975. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  976. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  977. return 0;
  978. }
  979. /* load the decoder microcode */
  980. static int initialize_ibmmpeg2(struct video_code *microcode)
  981. {
  982. int i, num;
  983. struct saa7146 *saa;
  984. for (num = 0; num < saa_num; num++) {
  985. saa = &saa7146s[num];
  986. /* check that FPGA is loaded */
  987. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
  988. i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2);
  989. if (i != 0xa55a) {
  990. printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
  991. saa->nr, i);
  992. #if 0
  993. return -1;
  994. #endif
  995. }
  996. if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
  997. if (saa->boardcfg[0] > 27)
  998. continue; /* skip to next card */
  999. /* load video control store */
  1000. saa->boardcfg[1] = 0x13; /* no-sync default */
  1001. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1002. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1003. for (i = 0; i < microcode->datasize / 2; i++)
  1004. debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
  1005. (microcode->data[i * 2] << 8) |
  1006. microcode->data[i * 2 + 1], 2);
  1007. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1008. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1009. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1010. ChipControl, 2);
  1011. saa->boardcfg[0] = 28;
  1012. }
  1013. if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
  1014. if (saa->boardcfg[0] > 35)
  1015. continue; /* skip to next card */
  1016. /* load audio control store */
  1017. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1018. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1019. for (i = 0; i < microcode->datasize; i++)
  1020. debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
  1021. microcode->data[i], 1);
  1022. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1023. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1024. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  1025. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  1026. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  1027. 0xe000, 1)) {
  1028. printk(KERN_ERR "stradis%d: IBM config "
  1029. "failed\n", saa->nr);
  1030. return -1;
  1031. }
  1032. /* set PWM to center value */
  1033. if (NewCard) {
  1034. debiwrite(saa, debNormal, XILINX_PWM,
  1035. saa->boardcfg[14] +
  1036. (saa->boardcfg[13] << 8), 2);
  1037. } else
  1038. debiwrite(saa, debNormal, XILINX_PWM, 0x46, 2);
  1039. if (HaveCS3310) {
  1040. i = CS3310MaxLvl;
  1041. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  1042. (i << 8) | i, 2);
  1043. }
  1044. printk(KERN_INFO "stradis%d: IBM MPEGCD%d Inited\n",
  1045. saa->nr, 18 + (debiread(saa, debNormal,
  1046. IBM_MP2_CHIP_CONTROL, 2) >> 12));
  1047. /* start video decoder */
  1048. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1049. ChipControl, 2);
  1050. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037,
  1051. 2); /* 256k vid, 3520 bytes aud */
  1052. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  1053. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1054. /* enable buffer threshold irq */
  1055. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  1056. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  1057. /* enable gpio irq */
  1058. saawrite(0x00002000, SAA7146_GPIO_CTRL);
  1059. /* enable decoder output to HPS */
  1060. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  1061. saa->boardcfg[0] = 37;
  1062. }
  1063. }
  1064. return 0;
  1065. }
  1066. static u32 palette2fmt[] = { /* some of these YUV translations are wrong */
  1067. 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
  1068. 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
  1069. 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
  1070. };
  1071. static int bpp2fmt[4] = {
  1072. VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
  1073. VIDEO_PALETTE_RGB32
  1074. };
  1075. /* I wish I could find a formula to calculate these... */
  1076. static u32 h_prescale[64] = {
  1077. 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
  1078. 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
  1079. 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
  1080. 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
  1081. 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
  1082. 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
  1083. 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
  1084. 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
  1085. 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
  1086. 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
  1087. 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
  1088. };
  1089. static u32 v_gain[64] = {
  1090. 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
  1091. 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
  1092. 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1093. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1094. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1095. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1096. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1097. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1098. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1099. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1100. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1101. };
  1102. static void saa7146_set_winsize(struct saa7146 *saa)
  1103. {
  1104. u32 format;
  1105. int offset, yacl, ysci;
  1106. saa->win.color_fmt = format =
  1107. (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
  1108. palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
  1109. offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
  1110. saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
  1111. saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
  1112. saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
  1113. saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
  1114. SAA7146_PROT_ADDR1);
  1115. saawrite(0, SAA7146_PAGE1);
  1116. saawrite(format | 0x60, SAA7146_CLIP_FORMAT_CTRL);
  1117. offset = (704 / (saa->win.width - 1)) & 0x3f;
  1118. saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
  1119. offset = (720896 / saa->win.width) / (offset + 1);
  1120. saawrite((offset << 12) | 0x0c, SAA7146_HPS_H_SCALE);
  1121. if (CurrentMode == VIDEO_MODE_NTSC) {
  1122. yacl = /*(480 / saa->win.height - 1) & 0x3f */ 0;
  1123. ysci = 1024 - (saa->win.height * 1024 / 480);
  1124. } else {
  1125. yacl = /*(576 / saa->win.height - 1) & 0x3f */ 0;
  1126. ysci = 1024 - (saa->win.height * 1024 / 576);
  1127. }
  1128. saawrite((1 << 31) | (ysci << 21) | (yacl << 15), SAA7146_HPS_V_SCALE);
  1129. saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
  1130. saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
  1131. SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
  1132. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), SAA7146_MC2);
  1133. }
  1134. /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
  1135. * bitmap is fixed width, 128 bytes (1024 pixels represented)
  1136. * arranged most-sigificant-bit-left in 32-bit words
  1137. * based on saa7146 clipping hardware, it swaps bytes if LE
  1138. * much of this makes up for egcs brain damage -- so if you
  1139. * are wondering "why did he do this?" it is because the C
  1140. * was adjusted to generate the optimal asm output without
  1141. * writing non-portable __asm__ directives.
  1142. */
  1143. static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
  1144. {
  1145. register int startword, endword;
  1146. register u32 bitsleft, bitsright;
  1147. u32 *temp;
  1148. if (x < 0) {
  1149. w += x;
  1150. x = 0;
  1151. }
  1152. if (y < 0) {
  1153. h += y;
  1154. y = 0;
  1155. }
  1156. if (w <= 0 || h <= 0 || x > 1023 || y > 639)
  1157. return; /* throw away bad clips */
  1158. if (x + w > 1024)
  1159. w = 1024 - x;
  1160. if (y + h > 640)
  1161. h = 640 - y;
  1162. startword = (x >> 5);
  1163. endword = ((x + w) >> 5);
  1164. bitsleft = (0xffffffff >> (x & 31));
  1165. bitsright = (0xffffffff << (~((x + w) - (endword << 5))));
  1166. temp = &clipmap[(y << 5) + startword];
  1167. w = endword - startword;
  1168. if (!w) {
  1169. bitsleft |= bitsright;
  1170. for (y = 0; y < h; y++) {
  1171. *temp |= bitsleft;
  1172. temp += 32;
  1173. }
  1174. } else {
  1175. for (y = 0; y < h; y++) {
  1176. *temp++ |= bitsleft;
  1177. for (x = 1; x < w; x++)
  1178. *temp++ = 0xffffffff;
  1179. *temp |= bitsright;
  1180. temp += (32 - w);
  1181. }
  1182. }
  1183. }
  1184. static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
  1185. {
  1186. int i, width, height;
  1187. u32 *clipmap;
  1188. clipmap = saa->dmavid2;
  1189. if ((width = saa->win.width) > 1023)
  1190. width = 1023; /* sanity check */
  1191. if ((height = saa->win.height) > 640)
  1192. height = 639; /* sanity check */
  1193. if (ncr > 0) { /* rectangles pased */
  1194. /* convert rectangular clips to a bitmap */
  1195. memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
  1196. for (i = 0; i < ncr; i++)
  1197. clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
  1198. cr[i].width, cr[i].height);
  1199. }
  1200. /* clip against viewing window AND screen
  1201. so we do not have to rely on the user program
  1202. */
  1203. clip_draw_rectangle(clipmap, (saa->win.x + width > saa->win.swidth) ?
  1204. (saa->win.swidth - saa->win.x) : width, 0, 1024, 768);
  1205. clip_draw_rectangle(clipmap, 0,
  1206. (saa->win.y + height > saa->win.sheight) ?
  1207. (saa->win.sheight - saa->win.y) : height, 1024, 768);
  1208. if (saa->win.x < 0)
  1209. clip_draw_rectangle(clipmap, 0, 0, -saa->win.x, 768);
  1210. if (saa->win.y < 0)
  1211. clip_draw_rectangle(clipmap, 0, 0, 1024, -saa->win.y);
  1212. }
  1213. static int saa_ioctl(struct inode *inode, struct file *file,
  1214. unsigned int cmd, unsigned long argl)
  1215. {
  1216. struct saa7146 *saa = file->private_data;
  1217. void __user *arg = (void __user *)argl;
  1218. switch (cmd) {
  1219. case VIDIOCGCAP:
  1220. {
  1221. struct video_capability b;
  1222. strcpy(b.name, saa->video_dev.name);
  1223. b.type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY |
  1224. VID_TYPE_CLIPPING | VID_TYPE_FRAMERAM |
  1225. VID_TYPE_SCALES;
  1226. b.channels = 1;
  1227. b.audios = 1;
  1228. b.maxwidth = 768;
  1229. b.maxheight = 576;
  1230. b.minwidth = 32;
  1231. b.minheight = 32;
  1232. if (copy_to_user(arg, &b, sizeof(b)))
  1233. return -EFAULT;
  1234. return 0;
  1235. }
  1236. case VIDIOCGPICT:
  1237. {
  1238. struct video_picture p = saa->picture;
  1239. if (saa->win.depth == 8)
  1240. p.palette = VIDEO_PALETTE_HI240;
  1241. if (saa->win.depth == 15)
  1242. p.palette = VIDEO_PALETTE_RGB555;
  1243. if (saa->win.depth == 16)
  1244. p.palette = VIDEO_PALETTE_RGB565;
  1245. if (saa->win.depth == 24)
  1246. p.palette = VIDEO_PALETTE_RGB24;
  1247. if (saa->win.depth == 32)
  1248. p.palette = VIDEO_PALETTE_RGB32;
  1249. if (copy_to_user(arg, &p, sizeof(p)))
  1250. return -EFAULT;
  1251. return 0;
  1252. }
  1253. case VIDIOCSPICT:
  1254. {
  1255. struct video_picture p;
  1256. u32 format;
  1257. if (copy_from_user(&p, arg, sizeof(p)))
  1258. return -EFAULT;
  1259. if (p.palette < ARRAY_SIZE(palette2fmt)) {
  1260. format = palette2fmt[p.palette];
  1261. saa->win.color_fmt = format;
  1262. saawrite(format | 0x60,
  1263. SAA7146_CLIP_FORMAT_CTRL);
  1264. }
  1265. saawrite(((p.brightness & 0xff00) << 16) |
  1266. ((p.contrast & 0xfe00) << 7) |
  1267. ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
  1268. saa->picture = p;
  1269. /* upload changed registers */
  1270. saawrite(((SAA7146_MC2_UPLD_HPS_H |
  1271. SAA7146_MC2_UPLD_HPS_V) << 16) |
  1272. SAA7146_MC2_UPLD_HPS_H |
  1273. SAA7146_MC2_UPLD_HPS_V, SAA7146_MC2);
  1274. return 0;
  1275. }
  1276. case VIDIOCSWIN:
  1277. {
  1278. struct video_window vw;
  1279. struct video_clip *vcp = NULL;
  1280. if (copy_from_user(&vw, arg, sizeof(vw)))
  1281. return -EFAULT;
  1282. /* stop capture */
  1283. if (vw.flags || vw.width < 16 || vw.height < 16) {
  1284. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1285. SAA7146_MC1);
  1286. return -EINVAL;
  1287. }
  1288. /* 32-bit align start and adjust width */
  1289. if (saa->win.bpp < 4) {
  1290. int i = vw.x;
  1291. vw.x = (vw.x + 3) & ~3;
  1292. i = vw.x - i;
  1293. vw.width -= i;
  1294. }
  1295. saa->win.x = vw.x;
  1296. saa->win.y = vw.y;
  1297. saa->win.width = vw.width;
  1298. if (saa->win.width > 768)
  1299. saa->win.width = 768;
  1300. saa->win.height = vw.height;
  1301. if (CurrentMode == VIDEO_MODE_NTSC) {
  1302. if (saa->win.height > 480)
  1303. saa->win.height = 480;
  1304. } else {
  1305. if (saa->win.height > 576)
  1306. saa->win.height = 576;
  1307. }
  1308. /* stop capture */
  1309. saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
  1310. saa7146_set_winsize(saa);
  1311. /*
  1312. * Do any clips.
  1313. */
  1314. if (vw.clipcount < 0) {
  1315. if (copy_from_user(saa->dmavid2, vw.clips,
  1316. VIDEO_CLIPMAP_SIZE))
  1317. return -EFAULT;
  1318. } else if (vw.clipcount > 16384) {
  1319. return -EINVAL;
  1320. } else if (vw.clipcount > 0) {
  1321. vcp = vmalloc(sizeof(struct video_clip) *
  1322. vw.clipcount);
  1323. if (vcp == NULL)
  1324. return -ENOMEM;
  1325. if (copy_from_user(vcp, vw.clips,
  1326. sizeof(struct video_clip) *
  1327. vw.clipcount)) {
  1328. vfree(vcp);
  1329. return -EFAULT;
  1330. }
  1331. } else /* nothing clipped */
  1332. memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
  1333. make_clip_tab(saa, vcp, vw.clipcount);
  1334. if (vw.clipcount > 0)
  1335. vfree(vcp);
  1336. /* start capture & clip dma if we have an address */
  1337. if ((saa->cap & 3) && saa->win.vidadr != 0)
  1338. saawrite(((SAA7146_MC1_TR_E_1 |
  1339. SAA7146_MC1_TR_E_2) << 16) | 0xffff,
  1340. SAA7146_MC1);
  1341. return 0;
  1342. }
  1343. case VIDIOCGWIN:
  1344. {
  1345. struct video_window vw;
  1346. vw.x = saa->win.x;
  1347. vw.y = saa->win.y;
  1348. vw.width = saa->win.width;
  1349. vw.height = saa->win.height;
  1350. vw.chromakey = 0;
  1351. vw.flags = 0;
  1352. if (copy_to_user(arg, &vw, sizeof(vw)))
  1353. return -EFAULT;
  1354. return 0;
  1355. }
  1356. case VIDIOCCAPTURE:
  1357. {
  1358. int v;
  1359. if (copy_from_user(&v, arg, sizeof(v)))
  1360. return -EFAULT;
  1361. if (v == 0) {
  1362. saa->cap &= ~1;
  1363. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1364. SAA7146_MC1);
  1365. } else {
  1366. if (saa->win.vidadr == 0 || saa->win.width == 0
  1367. || saa->win.height == 0)
  1368. return -EINVAL;
  1369. saa->cap |= 1;
  1370. saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
  1371. SAA7146_MC1);
  1372. }
  1373. return 0;
  1374. }
  1375. case VIDIOCGFBUF:
  1376. {
  1377. struct video_buffer v;
  1378. v.base = (void *)saa->win.vidadr;
  1379. v.height = saa->win.sheight;
  1380. v.width = saa->win.swidth;
  1381. v.depth = saa->win.depth;
  1382. v.bytesperline = saa->win.bpl;
  1383. if (copy_to_user(arg, &v, sizeof(v)))
  1384. return -EFAULT;
  1385. return 0;
  1386. }
  1387. case VIDIOCSFBUF:
  1388. {
  1389. struct video_buffer v;
  1390. if (!capable(CAP_SYS_ADMIN))
  1391. return -EPERM;
  1392. if (copy_from_user(&v, arg, sizeof(v)))
  1393. return -EFAULT;
  1394. if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
  1395. v.depth != 24 && v.depth != 32 && v.width > 16 &&
  1396. v.height > 16 && v.bytesperline > 16)
  1397. return -EINVAL;
  1398. if (v.base)
  1399. saa->win.vidadr = (unsigned long)v.base;
  1400. saa->win.sheight = v.height;
  1401. saa->win.swidth = v.width;
  1402. saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
  1403. saa->win.depth = v.depth;
  1404. saa->win.bpl = v.bytesperline;
  1405. DEBUG(printk("Display at %p is %d by %d, bytedepth %d, "
  1406. "bpl %d\n", v.base, v.width, v.height,
  1407. saa->win.bpp, saa->win.bpl));
  1408. saa7146_set_winsize(saa);
  1409. return 0;
  1410. }
  1411. case VIDIOCKEY:
  1412. {
  1413. /* Will be handled higher up .. */
  1414. return 0;
  1415. }
  1416. case VIDIOCGAUDIO:
  1417. {
  1418. struct video_audio v;
  1419. v = saa->audio_dev;
  1420. v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
  1421. v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
  1422. strcpy(v.name, "MPEG");
  1423. v.mode = VIDEO_SOUND_STEREO;
  1424. if (copy_to_user(arg, &v, sizeof(v)))
  1425. return -EFAULT;
  1426. return 0;
  1427. }
  1428. case VIDIOCSAUDIO:
  1429. {
  1430. struct video_audio v;
  1431. int i;
  1432. if (copy_from_user(&v, arg, sizeof(v)))
  1433. return -EFAULT;
  1434. i = (~(v.volume >> 8)) & 0xff;
  1435. if (!HaveCS4341) {
  1436. if (v.flags & VIDEO_AUDIO_MUTE)
  1437. debiwrite(saa, debNormal,
  1438. IBM_MP2_FRNT_ATTEN, 0xffff, 2);
  1439. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1440. debiwrite(saa, debNormal,
  1441. IBM_MP2_FRNT_ATTEN, 0x0000, 2);
  1442. if (v.flags & VIDEO_AUDIO_VOLUME)
  1443. debiwrite(saa, debNormal,
  1444. IBM_MP2_FRNT_ATTEN,
  1445. (i << 8) | i, 2);
  1446. } else {
  1447. if (v.flags & VIDEO_AUDIO_MUTE)
  1448. cs4341_setlevel(saa, 0xff, 0xff);
  1449. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1450. cs4341_setlevel(saa, 0, 0);
  1451. if (v.flags & VIDEO_AUDIO_VOLUME)
  1452. cs4341_setlevel(saa, i, i);
  1453. }
  1454. saa->audio_dev = v;
  1455. return 0;
  1456. }
  1457. case VIDIOCGUNIT:
  1458. {
  1459. struct video_unit vu;
  1460. vu.video = saa->video_dev.minor;
  1461. vu.vbi = VIDEO_NO_UNIT;
  1462. vu.radio = VIDEO_NO_UNIT;
  1463. vu.audio = VIDEO_NO_UNIT;
  1464. vu.teletext = VIDEO_NO_UNIT;
  1465. if (copy_to_user(arg, &vu, sizeof(vu)))
  1466. return -EFAULT;
  1467. return 0;
  1468. }
  1469. case VIDIOCSPLAYMODE:
  1470. {
  1471. struct video_play_mode pmode;
  1472. if (copy_from_user((void *)&pmode, arg,
  1473. sizeof(struct video_play_mode)))
  1474. return -EFAULT;
  1475. switch (pmode.mode) {
  1476. case VID_PLAY_VID_OUT_MODE:
  1477. if (pmode.p1 != VIDEO_MODE_NTSC &&
  1478. pmode.p1 != VIDEO_MODE_PAL)
  1479. return -EINVAL;
  1480. set_out_format(saa, pmode.p1);
  1481. return 0;
  1482. case VID_PLAY_GENLOCK:
  1483. debiwrite(saa, debNormal, XILINX_CTL0,
  1484. pmode.p1 ? 0x8000 : 0x8080, 2);
  1485. if (NewCard)
  1486. set_genlock_offset(saa, pmode.p2);
  1487. return 0;
  1488. case VID_PLAY_NORMAL:
  1489. debiwrite(saa, debNormal,
  1490. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1491. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1492. saa->playmode = pmode.mode;
  1493. return 0;
  1494. case VID_PLAY_PAUSE:
  1495. /* IBM removed the PAUSE command */
  1496. /* they say use SINGLE_FRAME now */
  1497. case VID_PLAY_SINGLE_FRAME:
  1498. ibm_send_command(saa, IBM_MP2_SINGLE_FRAME,0,0);
  1499. if (saa->playmode == pmode.mode) {
  1500. debiwrite(saa, debNormal,
  1501. IBM_MP2_CHIP_CONTROL,
  1502. ChipControl, 2);
  1503. }
  1504. saa->playmode = pmode.mode;
  1505. return 0;
  1506. case VID_PLAY_FAST_FORWARD:
  1507. ibm_send_command(saa, IBM_MP2_FAST_FORWARD,0,0);
  1508. saa->playmode = pmode.mode;
  1509. return 0;
  1510. case VID_PLAY_SLOW_MOTION:
  1511. ibm_send_command(saa, IBM_MP2_SLOW_MOTION,
  1512. pmode.p1, 0);
  1513. saa->playmode = pmode.mode;
  1514. return 0;
  1515. case VID_PLAY_IMMEDIATE_NORMAL:
  1516. /* ensure transfers resume */
  1517. debiwrite(saa, debNormal,
  1518. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1519. ibm_send_command(saa, IBM_MP2_IMED_NORM_PLAY,
  1520. 0, 0);
  1521. saa->playmode = VID_PLAY_NORMAL;
  1522. return 0;
  1523. case VID_PLAY_SWITCH_CHANNELS:
  1524. saa->audhead = saa->audtail = 0;
  1525. saa->vidhead = saa->vidtail = 0;
  1526. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,1);
  1527. ibm_send_command(saa, IBM_MP2_RESET_AUD_RATE,
  1528. 0, 1);
  1529. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1530. 0, 2);
  1531. ibm_send_command(saa, IBM_MP2_CHANNEL_SWITCH,
  1532. 0, 1);
  1533. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1534. ChipControl, 2);
  1535. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1536. saa->playmode = VID_PLAY_NORMAL;
  1537. return 0;
  1538. case VID_PLAY_FREEZE_FRAME:
  1539. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,0);
  1540. saa->playmode = pmode.mode;
  1541. return 0;
  1542. case VID_PLAY_STILL_MODE:
  1543. ibm_send_command(saa, IBM_MP2_SET_STILL_MODE,
  1544. 0, 0);
  1545. saa->playmode = pmode.mode;
  1546. return 0;
  1547. case VID_PLAY_MASTER_MODE:
  1548. if (pmode.p1 == VID_PLAY_MASTER_NONE)
  1549. saa->boardcfg[1] = 0x13;
  1550. else if (pmode.p1 == VID_PLAY_MASTER_VIDEO)
  1551. saa->boardcfg[1] = 0x23;
  1552. else if (pmode.p1 == VID_PLAY_MASTER_AUDIO)
  1553. saa->boardcfg[1] = 0x43;
  1554. else
  1555. return -EINVAL;
  1556. debiwrite(saa, debNormal,
  1557. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1558. return 0;
  1559. case VID_PLAY_ACTIVE_SCANLINES:
  1560. if (CurrentMode == VIDEO_MODE_PAL) {
  1561. if (pmode.p1 < 1 || pmode.p2 > 625)
  1562. return -EINVAL;
  1563. saa->boardcfg[5] = pmode.p1;
  1564. saa->boardcfg[55] = (pmode.p1 +
  1565. (pmode.p2 / 2) - 1) & 0xff;
  1566. } else {
  1567. if (pmode.p1 < 4 || pmode.p2 > 525)
  1568. return -EINVAL;
  1569. saa->boardcfg[4] = pmode.p1;
  1570. saa->boardcfg[54] = (pmode.p1 +
  1571. (pmode.p2 / 2) - 4) & 0xff;
  1572. }
  1573. set_out_format(saa, CurrentMode);
  1574. case VID_PLAY_RESET:
  1575. return do_ibm_reset(saa);
  1576. case VID_PLAY_END_MARK:
  1577. if (saa->endmarktail < saa->endmarkhead) {
  1578. if (saa->endmarkhead -
  1579. saa->endmarktail < 2)
  1580. return -ENOSPC;
  1581. } else if (saa->endmarkhead <=saa->endmarktail){
  1582. if (saa->endmarktail - saa->endmarkhead
  1583. > (MAX_MARKS - 2))
  1584. return -ENOSPC;
  1585. } else
  1586. return -ENOSPC;
  1587. saa->endmark[saa->endmarktail] = saa->audtail;
  1588. saa->endmarktail++;
  1589. if (saa->endmarktail >= MAX_MARKS)
  1590. saa->endmarktail = 0;
  1591. }
  1592. return -EINVAL;
  1593. }
  1594. case VIDIOCSWRITEMODE:
  1595. {
  1596. int mode;
  1597. if (copy_from_user((void *)&mode, arg, sizeof(int)))
  1598. return -EFAULT;
  1599. if (mode == VID_WRITE_MPEG_AUD ||
  1600. mode == VID_WRITE_MPEG_VID ||
  1601. mode == VID_WRITE_CC ||
  1602. mode == VID_WRITE_TTX ||
  1603. mode == VID_WRITE_OSD) {
  1604. saa->writemode = mode;
  1605. return 0;
  1606. }
  1607. return -EINVAL;
  1608. }
  1609. case VIDIOCSMICROCODE:
  1610. {
  1611. struct video_code ucode;
  1612. __u8 *udata;
  1613. int i;
  1614. if (copy_from_user(&ucode, arg, sizeof(ucode)))
  1615. return -EFAULT;
  1616. if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
  1617. strncmp(ucode.loadwhat, "dec", 3))
  1618. return -EINVAL;
  1619. if ((udata = vmalloc(ucode.datasize)) == NULL)
  1620. return -ENOMEM;
  1621. if (copy_from_user(udata, ucode.data, ucode.datasize)) {
  1622. vfree(udata);
  1623. return -EFAULT;
  1624. }
  1625. ucode.data = udata;
  1626. if (!strncmp(ucode.loadwhat, "decoder.aud", 11) ||
  1627. !strncmp(ucode.loadwhat, "decoder.vid", 11))
  1628. i = initialize_ibmmpeg2(&ucode);
  1629. else
  1630. i = initialize_fpga(&ucode);
  1631. vfree(udata);
  1632. if (i)
  1633. return -EINVAL;
  1634. return 0;
  1635. }
  1636. case VIDIOCGCHAN: /* this makes xawtv happy */
  1637. {
  1638. struct video_channel v;
  1639. if (copy_from_user(&v, arg, sizeof(v)))
  1640. return -EFAULT;
  1641. v.flags = VIDEO_VC_AUDIO;
  1642. v.tuners = 0;
  1643. v.type = VID_TYPE_MPEG_DECODER;
  1644. v.norm = CurrentMode;
  1645. strcpy(v.name, "MPEG2");
  1646. if (copy_to_user(arg, &v, sizeof(v)))
  1647. return -EFAULT;
  1648. return 0;
  1649. }
  1650. case VIDIOCSCHAN: /* this makes xawtv happy */
  1651. {
  1652. struct video_channel v;
  1653. if (copy_from_user(&v, arg, sizeof(v)))
  1654. return -EFAULT;
  1655. /* do nothing */
  1656. return 0;
  1657. }
  1658. default:
  1659. return -ENOIOCTLCMD;
  1660. }
  1661. return 0;
  1662. }
  1663. static int saa_mmap(struct file *file, struct vm_area_struct *vma)
  1664. {
  1665. struct saa7146 *saa = file->private_data;
  1666. printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
  1667. return -EINVAL;
  1668. }
  1669. static ssize_t saa_read(struct file *file, char __user * buf,
  1670. size_t count, loff_t * ppos)
  1671. {
  1672. return -EINVAL;
  1673. }
  1674. static ssize_t saa_write(struct file *file, const char __user * buf,
  1675. size_t count, loff_t * ppos)
  1676. {
  1677. struct saa7146 *saa = file->private_data;
  1678. unsigned long todo = count;
  1679. int blocksize, split;
  1680. unsigned long flags;
  1681. while (todo > 0) {
  1682. if (saa->writemode == VID_WRITE_MPEG_AUD) {
  1683. spin_lock_irqsave(&saa->lock, flags);
  1684. if (saa->audhead <= saa->audtail)
  1685. blocksize = 65536 -
  1686. (saa->audtail - saa->audhead);
  1687. else
  1688. blocksize = saa->audhead - saa->audtail;
  1689. spin_unlock_irqrestore(&saa->lock, flags);
  1690. if (blocksize < 16384) {
  1691. saawrite(SAA7146_PSR_DEBI_S |
  1692. SAA7146_PSR_PIN1, SAA7146_IER);
  1693. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1694. /* wait for buffer space to open */
  1695. interruptible_sleep_on(&saa->audq);
  1696. }
  1697. spin_lock_irqsave(&saa->lock, flags);
  1698. if (saa->audhead <= saa->audtail) {
  1699. blocksize = 65536 -
  1700. (saa->audtail - saa->audhead);
  1701. split = 65536 - saa->audtail;
  1702. } else {
  1703. blocksize = saa->audhead - saa->audtail;
  1704. split = 65536;
  1705. }
  1706. spin_unlock_irqrestore(&saa->lock, flags);
  1707. blocksize--;
  1708. if (blocksize > todo)
  1709. blocksize = todo;
  1710. /* double check that we really have space */
  1711. if (!blocksize)
  1712. return -ENOSPC;
  1713. if (split < blocksize) {
  1714. if (copy_from_user(saa->audbuf +
  1715. saa->audtail, buf, split))
  1716. return -EFAULT;
  1717. buf += split;
  1718. todo -= split;
  1719. blocksize -= split;
  1720. saa->audtail = 0;
  1721. }
  1722. if (copy_from_user(saa->audbuf + saa->audtail, buf,
  1723. blocksize))
  1724. return -EFAULT;
  1725. saa->audtail += blocksize;
  1726. todo -= blocksize;
  1727. buf += blocksize;
  1728. saa->audtail &= 0xffff;
  1729. } else if (saa->writemode == VID_WRITE_MPEG_VID) {
  1730. spin_lock_irqsave(&saa->lock, flags);
  1731. if (saa->vidhead <= saa->vidtail)
  1732. blocksize = 524288 -
  1733. (saa->vidtail - saa->vidhead);
  1734. else
  1735. blocksize = saa->vidhead - saa->vidtail;
  1736. spin_unlock_irqrestore(&saa->lock, flags);
  1737. if (blocksize < 65536) {
  1738. saawrite(SAA7146_PSR_DEBI_S |
  1739. SAA7146_PSR_PIN1, SAA7146_IER);
  1740. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1741. /* wait for buffer space to open */
  1742. interruptible_sleep_on(&saa->vidq);
  1743. }
  1744. spin_lock_irqsave(&saa->lock, flags);
  1745. if (saa->vidhead <= saa->vidtail) {
  1746. blocksize = 524288 -
  1747. (saa->vidtail - saa->vidhead);
  1748. split = 524288 - saa->vidtail;
  1749. } else {
  1750. blocksize = saa->vidhead - saa->vidtail;
  1751. split = 524288;
  1752. }
  1753. spin_unlock_irqrestore(&saa->lock, flags);
  1754. blocksize--;
  1755. if (blocksize > todo)
  1756. blocksize = todo;
  1757. /* double check that we really have space */
  1758. if (!blocksize)
  1759. return -ENOSPC;
  1760. if (split < blocksize) {
  1761. if (copy_from_user(saa->vidbuf +
  1762. saa->vidtail, buf, split))
  1763. return -EFAULT;
  1764. buf += split;
  1765. todo -= split;
  1766. blocksize -= split;
  1767. saa->vidtail = 0;
  1768. }
  1769. if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
  1770. blocksize))
  1771. return -EFAULT;
  1772. saa->vidtail += blocksize;
  1773. todo -= blocksize;
  1774. buf += blocksize;
  1775. saa->vidtail &= 0x7ffff;
  1776. } else if (saa->writemode == VID_WRITE_OSD) {
  1777. if (count > 131072)
  1778. return -ENOSPC;
  1779. if (copy_from_user(saa->osdbuf, buf, count))
  1780. return -EFAULT;
  1781. buf += count;
  1782. saa->osdhead = 0;
  1783. saa->osdtail = count;
  1784. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
  1785. debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
  1786. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
  1787. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  1788. debiread(saa, debNormal,
  1789. IBM_MP2_DISP_MODE, 2) | 1, 2);
  1790. /* trigger osd data transfer */
  1791. saawrite(SAA7146_PSR_DEBI_S |
  1792. SAA7146_PSR_PIN1, SAA7146_IER);
  1793. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1794. }
  1795. }
  1796. return count;
  1797. }
  1798. static int saa_open(struct inode *inode, struct file *file)
  1799. {
  1800. struct video_device *vdev = video_devdata(file);
  1801. struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev);
  1802. file->private_data = saa;
  1803. saa->user++;
  1804. if (saa->user > 1)
  1805. return 0; /* device open already, don't reset */
  1806. saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
  1807. return 0;
  1808. }
  1809. static int saa_release(struct inode *inode, struct file *file)
  1810. {
  1811. struct saa7146 *saa = file->private_data;
  1812. saa->user--;
  1813. if (saa->user > 0) /* still someone using device */
  1814. return 0;
  1815. saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
  1816. return 0;
  1817. }
  1818. static const struct file_operations saa_fops = {
  1819. .owner = THIS_MODULE,
  1820. .open = saa_open,
  1821. .release = saa_release,
  1822. .ioctl = saa_ioctl,
  1823. .compat_ioctl = v4l_compat_ioctl32,
  1824. .read = saa_read,
  1825. .llseek = no_llseek,
  1826. .write = saa_write,
  1827. .mmap = saa_mmap,
  1828. };
  1829. /* template for video_device-structure */
  1830. static struct video_device saa_template = {
  1831. .name = "SAA7146A",
  1832. .type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
  1833. .hardware = VID_HARDWARE_SAA7146,
  1834. .fops = &saa_fops,
  1835. .minor = -1,
  1836. };
  1837. static int __devinit configure_saa7146(struct pci_dev *pdev, int num)
  1838. {
  1839. int retval;
  1840. struct saa7146 *saa = pci_get_drvdata(pdev);
  1841. saa->endmarkhead = saa->endmarktail = 0;
  1842. saa->win.x = saa->win.y = 0;
  1843. saa->win.width = saa->win.cropwidth = 720;
  1844. saa->win.height = saa->win.cropheight = 480;
  1845. saa->win.cropx = saa->win.cropy = 0;
  1846. saa->win.bpp = 2;
  1847. saa->win.depth = 16;
  1848. saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
  1849. saa->win.bpl = 1024 * saa->win.bpp;
  1850. saa->win.swidth = 1024;
  1851. saa->win.sheight = 768;
  1852. saa->picture.brightness = 32768;
  1853. saa->picture.contrast = 38768;
  1854. saa->picture.colour = 32768;
  1855. saa->cap = 0;
  1856. saa->nr = num;
  1857. saa->playmode = VID_PLAY_NORMAL;
  1858. memset(saa->boardcfg, 0, 64); /* clear board config area */
  1859. saa->saa7146_mem = NULL;
  1860. saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
  1861. saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
  1862. saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
  1863. saa->pagea1out = saa->pagea2in = saa->pagea2out =
  1864. saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
  1865. saa->pageRPS2 = NULL;
  1866. saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
  1867. saa->audhead = saa->vidtail = 0;
  1868. init_waitqueue_head(&saa->i2cq);
  1869. init_waitqueue_head(&saa->audq);
  1870. init_waitqueue_head(&saa->debiq);
  1871. init_waitqueue_head(&saa->vidq);
  1872. spin_lock_init(&saa->lock);
  1873. retval = pci_enable_device(pdev);
  1874. if (retval) {
  1875. dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num);
  1876. goto err;
  1877. }
  1878. saa->id = pdev->device;
  1879. saa->irq = pdev->irq;
  1880. saa->video_dev.minor = -1;
  1881. saa->saa7146_adr = pci_resource_start(pdev, 0);
  1882. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision);
  1883. saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
  1884. if (saa->saa7146_mem == NULL) {
  1885. dev_err(&pdev->dev, "%d: ioremap failed!\n", num);
  1886. retval = -EIO;
  1887. goto err;
  1888. }
  1889. memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
  1890. saawrite(0, SAA7146_IER); /* turn off all interrupts */
  1891. retval = request_irq(saa->irq, saa7146_irq, IRQF_SHARED | IRQF_DISABLED,
  1892. "stradis", saa);
  1893. if (retval == -EINVAL)
  1894. dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num);
  1895. else if (retval == -EBUSY)
  1896. dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config "
  1897. "in BIOS\n", num, saa->irq);
  1898. if (retval < 0)
  1899. goto errio;
  1900. pci_set_master(pdev);
  1901. retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER,
  1902. video_nr);
  1903. if (retval < 0) {
  1904. dev_err(&pdev->dev, "%d: error in registering video device!\n",
  1905. num);
  1906. goto errio;
  1907. }
  1908. return 0;
  1909. errio:
  1910. iounmap(saa->saa7146_mem);
  1911. err:
  1912. return retval;
  1913. }
  1914. static int __devinit init_saa7146(struct pci_dev *pdev)
  1915. {
  1916. struct saa7146 *saa = pci_get_drvdata(pdev);
  1917. saa->user = 0;
  1918. /* reset the saa7146 */
  1919. saawrite(0xffff0000, SAA7146_MC1);
  1920. mdelay(5);
  1921. /* enable debi and i2c transfers and pins */
  1922. saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
  1923. SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
  1924. /* ensure proper state of chip */
  1925. saawrite(0x00000000, SAA7146_PAGE1);
  1926. saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
  1927. saawrite(0x00000000, SAA7146_PAGE2);
  1928. saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
  1929. saawrite(0x00000000, SAA7146_DD1_INIT);
  1930. saawrite(0x00000000, SAA7146_DD1_STREAM_B);
  1931. saawrite(0x00000000, SAA7146_DD1_STREAM_A);
  1932. saawrite(0x00000000, SAA7146_BRS_CTRL);
  1933. saawrite(0x80400040, SAA7146_BCS_CTRL);
  1934. saawrite(0x0000e000 /*| (1<<29) */ , SAA7146_HPS_CTRL);
  1935. saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
  1936. saawrite(0x00000000, SAA7146_ACON1);
  1937. saawrite(0x00000000, SAA7146_ACON2);
  1938. saawrite(0x00000600, SAA7146_I2C_STATUS);
  1939. saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
  1940. SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
  1941. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
  1942. SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
  1943. SAA7146_MC2);
  1944. /* setup arbitration control registers */
  1945. saawrite(0x1412121a, SAA7146_PCI_BT_V1);
  1946. /* allocate 32k dma buffer + 4k for page table */
  1947. if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
  1948. dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr);
  1949. goto err;
  1950. }
  1951. #if 0
  1952. saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
  1953. saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
  1954. for (i = 0; i < 12; i++) /* setup mmu page table */
  1955. saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
  1956. #endif
  1957. saa->audhead = saa->vidhead = saa->osdhead = 0;
  1958. saa->audtail = saa->vidtail = saa->osdtail = 0;
  1959. if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) {
  1960. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1961. goto err;
  1962. }
  1963. if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) {
  1964. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1965. goto errfree;
  1966. }
  1967. if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) {
  1968. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1969. goto errfree;
  1970. }
  1971. /* allocate 81920 byte buffer for clipping */
  1972. if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
  1973. dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr);
  1974. goto errfree;
  1975. }
  1976. /* setup clipping registers */
  1977. saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
  1978. saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
  1979. saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
  1980. SAA7146_PROT_ADDR2);
  1981. saawrite(256, SAA7146_PITCH2);
  1982. saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
  1983. saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
  1984. SAA7146_MC2);
  1985. I2CBusScan(saa);
  1986. return 0;
  1987. errfree:
  1988. vfree(saa->osdbuf);
  1989. vfree(saa->audbuf);
  1990. vfree(saa->vidbuf);
  1991. saa->audbuf = saa->osdbuf = saa->vidbuf = NULL;
  1992. err:
  1993. return -ENOMEM;
  1994. }
  1995. static void stradis_release_saa(struct pci_dev *pdev)
  1996. {
  1997. u8 command;
  1998. struct saa7146 *saa = pci_get_drvdata(pdev);
  1999. /* turn off all capturing, DMA and IRQs */
  2000. saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
  2001. saawrite(0, SAA7146_MC2);
  2002. saawrite(0, SAA7146_IER);
  2003. saawrite(0xffffffffUL, SAA7146_ISR);
  2004. /* disable PCI bus-mastering */
  2005. pci_read_config_byte(pdev, PCI_COMMAND, &command);
  2006. command &= ~PCI_COMMAND_MASTER;
  2007. pci_write_config_byte(pdev, PCI_COMMAND, command);
  2008. /* unmap and free memory */
  2009. saa->audhead = saa->audtail = saa->osdhead = 0;
  2010. saa->vidhead = saa->vidtail = saa->osdtail = 0;
  2011. vfree(saa->vidbuf);
  2012. vfree(saa->audbuf);
  2013. vfree(saa->osdbuf);
  2014. kfree(saa->dmavid2);
  2015. saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
  2016. saa->dmavid2 = NULL;
  2017. kfree(saa->dmadebi);
  2018. kfree(saa->dmavid1);
  2019. kfree(saa->dmavid3);
  2020. kfree(saa->dmaa1in);
  2021. kfree(saa->dmaa1out);
  2022. kfree(saa->dmaa2in);
  2023. kfree(saa->dmaa2out);
  2024. kfree(saa->dmaRPS1);
  2025. kfree(saa->dmaRPS2);
  2026. free_irq(saa->irq, saa);
  2027. if (saa->saa7146_mem)
  2028. iounmap(saa->saa7146_mem);
  2029. if (saa->video_dev.minor != -1)
  2030. video_unregister_device(&saa->video_dev);
  2031. }
  2032. static int __devinit stradis_probe(struct pci_dev *pdev,
  2033. const struct pci_device_id *ent)
  2034. {
  2035. int retval = -EINVAL;
  2036. if (saa_num >= SAA7146_MAX)
  2037. goto err;
  2038. if (!pdev->subsystem_vendor)
  2039. dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num);
  2040. else
  2041. dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num);
  2042. pci_set_drvdata(pdev, &saa7146s[saa_num]);
  2043. retval = configure_saa7146(pdev, saa_num);
  2044. if (retval) {
  2045. dev_err(&pdev->dev, "%d: error in configuring\n", saa_num);
  2046. goto err;
  2047. }
  2048. if (init_saa7146(pdev) < 0) {
  2049. dev_err(&pdev->dev, "%d: error in initialization\n", saa_num);
  2050. retval = -EIO;
  2051. goto errrel;
  2052. }
  2053. saa_num++;
  2054. return 0;
  2055. errrel:
  2056. stradis_release_saa(pdev);
  2057. err:
  2058. return retval;
  2059. }
  2060. static void __devexit stradis_remove(struct pci_dev *pdev)
  2061. {
  2062. stradis_release_saa(pdev);
  2063. }
  2064. static struct pci_device_id stradis_pci_tbl[] = {
  2065. { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) },
  2066. { 0 }
  2067. };
  2068. static struct pci_driver stradis_driver = {
  2069. .name = "stradis",
  2070. .id_table = stradis_pci_tbl,
  2071. .probe = stradis_probe,
  2072. .remove = __devexit_p(stradis_remove)
  2073. };
  2074. static int __init stradis_init(void)
  2075. {
  2076. int retval;
  2077. saa_num = 0;
  2078. retval = pci_register_driver(&stradis_driver);
  2079. if (retval)
  2080. printk(KERN_ERR "stradis: Unable to register pci driver.\n");
  2081. return retval;
  2082. }
  2083. static void __exit stradis_exit(void)
  2084. {
  2085. pci_unregister_driver(&stradis_driver);
  2086. printk(KERN_INFO "stradis: module cleanup complete\n");
  2087. }
  2088. module_init(stradis_init);
  2089. module_exit(stradis_exit);