bt878.c 16 KB

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  1. /*
  2. * bt878.c: part of the driver for the Pinnacle PCTV Sat DVB PCI card
  3. *
  4. * Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
  5. *
  6. * large parts based on the bttv driver
  7. * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@metzlerbros.de)
  8. * & Marcus Metzler (mocm@metzlerbros.de)
  9. * (c) 1999,2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  24. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/pci.h>
  30. #include <asm/io.h>
  31. #include <linux/ioport.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/page.h>
  34. #include <linux/types.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/kmod.h>
  37. #include <linux/vmalloc.h>
  38. #include <linux/init.h>
  39. #include "dmxdev.h"
  40. #include "dvbdev.h"
  41. #include "bt878.h"
  42. #include "dst_priv.h"
  43. /**************************************/
  44. /* Miscellaneous utility definitions */
  45. /**************************************/
  46. static unsigned int bt878_verbose = 1;
  47. static unsigned int bt878_debug;
  48. module_param_named(verbose, bt878_verbose, int, 0444);
  49. MODULE_PARM_DESC(verbose,
  50. "verbose startup messages, default is 1 (yes)");
  51. module_param_named(debug, bt878_debug, int, 0644);
  52. MODULE_PARM_DESC(debug, "Turn on/off debugging, default is 0 (off).");
  53. int bt878_num;
  54. struct bt878 bt878[BT878_MAX];
  55. EXPORT_SYMBOL(bt878_num);
  56. EXPORT_SYMBOL(bt878);
  57. #define btwrite(dat,adr) bmtwrite((dat), (bt->bt878_mem+(adr)))
  58. #define btread(adr) bmtread(bt->bt878_mem+(adr))
  59. #define btand(dat,adr) btwrite((dat) & btread(adr), adr)
  60. #define btor(dat,adr) btwrite((dat) | btread(adr), adr)
  61. #define btaor(dat,mask,adr) btwrite((dat) | ((mask) & btread(adr)), adr)
  62. #if defined(dprintk)
  63. #undef dprintk
  64. #endif
  65. #define dprintk if(bt878_debug) printk
  66. static void bt878_mem_free(struct bt878 *bt)
  67. {
  68. if (bt->buf_cpu) {
  69. pci_free_consistent(bt->dev, bt->buf_size, bt->buf_cpu,
  70. bt->buf_dma);
  71. bt->buf_cpu = NULL;
  72. }
  73. if (bt->risc_cpu) {
  74. pci_free_consistent(bt->dev, bt->risc_size, bt->risc_cpu,
  75. bt->risc_dma);
  76. bt->risc_cpu = NULL;
  77. }
  78. }
  79. static int bt878_mem_alloc(struct bt878 *bt)
  80. {
  81. if (!bt->buf_cpu) {
  82. bt->buf_size = 128 * 1024;
  83. bt->buf_cpu =
  84. pci_alloc_consistent(bt->dev, bt->buf_size,
  85. &bt->buf_dma);
  86. if (!bt->buf_cpu)
  87. return -ENOMEM;
  88. memset(bt->buf_cpu, 0, bt->buf_size);
  89. }
  90. if (!bt->risc_cpu) {
  91. bt->risc_size = PAGE_SIZE;
  92. bt->risc_cpu =
  93. pci_alloc_consistent(bt->dev, bt->risc_size,
  94. &bt->risc_dma);
  95. if (!bt->risc_cpu) {
  96. bt878_mem_free(bt);
  97. return -ENOMEM;
  98. }
  99. memset(bt->risc_cpu, 0, bt->risc_size);
  100. }
  101. return 0;
  102. }
  103. /* RISC instructions */
  104. #define RISC_WRITE (0x01 << 28)
  105. #define RISC_JUMP (0x07 << 28)
  106. #define RISC_SYNC (0x08 << 28)
  107. /* RISC bits */
  108. #define RISC_WR_SOL (1 << 27)
  109. #define RISC_WR_EOL (1 << 26)
  110. #define RISC_IRQ (1 << 24)
  111. #define RISC_STATUS(status) ((((~status) & 0x0F) << 20) | ((status & 0x0F) << 16))
  112. #define RISC_SYNC_RESYNC (1 << 15)
  113. #define RISC_SYNC_FM1 0x06
  114. #define RISC_SYNC_VRO 0x0C
  115. #define RISC_FLUSH() bt->risc_pos = 0
  116. #define RISC_INSTR(instr) bt->risc_cpu[bt->risc_pos++] = cpu_to_le32(instr)
  117. static int bt878_make_risc(struct bt878 *bt)
  118. {
  119. bt->block_bytes = bt->buf_size >> 4;
  120. bt->block_count = 1 << 4;
  121. bt->line_bytes = bt->block_bytes;
  122. bt->line_count = bt->block_count;
  123. while (bt->line_bytes > 4095) {
  124. bt->line_bytes >>= 1;
  125. bt->line_count <<= 1;
  126. }
  127. if (bt->line_count > 255) {
  128. printk("bt878: buffer size error!\n");
  129. return -EINVAL;
  130. }
  131. return 0;
  132. }
  133. static void bt878_risc_program(struct bt878 *bt, u32 op_sync_orin)
  134. {
  135. u32 buf_pos = 0;
  136. u32 line;
  137. RISC_FLUSH();
  138. RISC_INSTR(RISC_SYNC | RISC_SYNC_FM1 | op_sync_orin);
  139. RISC_INSTR(0);
  140. dprintk("bt878: risc len lines %u, bytes per line %u\n",
  141. bt->line_count, bt->line_bytes);
  142. for (line = 0; line < bt->line_count; line++) {
  143. // At the beginning of every block we issue an IRQ with previous (finished) block number set
  144. if (!(buf_pos % bt->block_bytes))
  145. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  146. RISC_IRQ |
  147. RISC_STATUS(((buf_pos /
  148. bt->block_bytes) +
  149. (bt->block_count -
  150. 1)) %
  151. bt->block_count) | bt->
  152. line_bytes);
  153. else
  154. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  155. bt->line_bytes);
  156. RISC_INSTR(bt->buf_dma + buf_pos);
  157. buf_pos += bt->line_bytes;
  158. }
  159. RISC_INSTR(RISC_SYNC | op_sync_orin | RISC_SYNC_VRO);
  160. RISC_INSTR(0);
  161. RISC_INSTR(RISC_JUMP);
  162. RISC_INSTR(bt->risc_dma);
  163. btwrite((bt->line_count << 16) | bt->line_bytes, BT878_APACK_LEN);
  164. }
  165. /*****************************/
  166. /* Start/Stop grabbing funcs */
  167. /*****************************/
  168. void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
  169. u32 irq_err_ignore)
  170. {
  171. u32 int_mask;
  172. dprintk("bt878 debug: bt878_start (ctl=%8.8x)\n", controlreg);
  173. /* complete the writing of the risc dma program now we have
  174. * the card specifics
  175. */
  176. bt878_risc_program(bt, op_sync_orin);
  177. controlreg &= ~0x1f;
  178. controlreg |= 0x1b;
  179. btwrite(bt->risc_dma, BT878_ARISC_START);
  180. /* original int mask had :
  181. * 6 2 8 4 0
  182. * 1111 1111 1000 0000 0000
  183. * SCERR|OCERR|PABORT|RIPERR|FDSR|FTRGT|FBUS|RISCI
  184. * Hacked for DST to:
  185. * SCERR | OCERR | FDSR | FTRGT | FBUS | RISCI
  186. */
  187. int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT |
  188. BT878_ARIPERR | BT878_APPERR | BT878_AFDSR | BT878_AFTRGT |
  189. BT878_AFBUS | BT878_ARISCI;
  190. /* ignore pesky bits */
  191. int_mask &= ~irq_err_ignore;
  192. btwrite(int_mask, BT878_AINT_MASK);
  193. btwrite(controlreg, BT878_AGPIO_DMA_CTL);
  194. }
  195. void bt878_stop(struct bt878 *bt)
  196. {
  197. u32 stat;
  198. int i = 0;
  199. dprintk("bt878 debug: bt878_stop\n");
  200. btwrite(0, BT878_AINT_MASK);
  201. btand(~0x13, BT878_AGPIO_DMA_CTL);
  202. do {
  203. stat = btread(BT878_AINT_STAT);
  204. if (!(stat & BT878_ARISC_EN))
  205. break;
  206. i++;
  207. } while (i < 500);
  208. dprintk("bt878(%d) debug: bt878_stop, i=%d, stat=0x%8.8x\n",
  209. bt->nr, i, stat);
  210. }
  211. EXPORT_SYMBOL(bt878_start);
  212. EXPORT_SYMBOL(bt878_stop);
  213. /*****************************/
  214. /* Interrupt service routine */
  215. /*****************************/
  216. static irqreturn_t bt878_irq(int irq, void *dev_id)
  217. {
  218. u32 stat, astat, mask;
  219. int count;
  220. struct bt878 *bt;
  221. bt = (struct bt878 *) dev_id;
  222. count = 0;
  223. while (1) {
  224. stat = btread(BT878_AINT_STAT);
  225. mask = btread(BT878_AINT_MASK);
  226. if (!(astat = (stat & mask)))
  227. return IRQ_NONE; /* this interrupt is not for me */
  228. /* dprintk("bt878(%d) debug: irq count %d, stat 0x%8.8x, mask 0x%8.8x\n",bt->nr,count,stat,mask); */
  229. btwrite(astat, BT878_AINT_STAT); /* try to clear interrupt condition */
  230. if (astat & (BT878_ASCERR | BT878_AOCERR)) {
  231. if (bt878_verbose) {
  232. printk("bt878(%d): irq%s%s risc_pc=%08x\n",
  233. bt->nr,
  234. (astat & BT878_ASCERR) ? " SCERR" :
  235. "",
  236. (astat & BT878_AOCERR) ? " OCERR" :
  237. "", btread(BT878_ARISC_PC));
  238. }
  239. }
  240. if (astat & (BT878_APABORT | BT878_ARIPERR | BT878_APPERR)) {
  241. if (bt878_verbose) {
  242. printk
  243. ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
  244. bt->nr,
  245. (astat & BT878_APABORT) ? " PABORT" :
  246. "",
  247. (astat & BT878_ARIPERR) ? " RIPERR" :
  248. "",
  249. (astat & BT878_APPERR) ? " PPERR" :
  250. "", btread(BT878_ARISC_PC));
  251. }
  252. }
  253. if (astat & (BT878_AFDSR | BT878_AFTRGT | BT878_AFBUS)) {
  254. if (bt878_verbose) {
  255. printk
  256. ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
  257. bt->nr,
  258. (astat & BT878_AFDSR) ? " FDSR" : "",
  259. (astat & BT878_AFTRGT) ? " FTRGT" :
  260. "",
  261. (astat & BT878_AFBUS) ? " FBUS" : "",
  262. btread(BT878_ARISC_PC));
  263. }
  264. }
  265. if (astat & BT878_ARISCI) {
  266. bt->finished_block = (stat & BT878_ARISCS) >> 28;
  267. tasklet_schedule(&bt->tasklet);
  268. break;
  269. }
  270. count++;
  271. if (count > 20) {
  272. btwrite(0, BT878_AINT_MASK);
  273. printk(KERN_ERR
  274. "bt878(%d): IRQ lockup, cleared int mask\n",
  275. bt->nr);
  276. break;
  277. }
  278. }
  279. return IRQ_HANDLED;
  280. }
  281. int
  282. bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp)
  283. {
  284. int retval;
  285. retval = 0;
  286. if (mutex_lock_interruptible(&bt->gpio_lock))
  287. return -ERESTARTSYS;
  288. /* special gpio signal */
  289. switch (cmd) {
  290. case DST_IG_ENABLE:
  291. // dprintk("dvb_bt8xx: dst enable mask 0x%02x enb 0x%02x \n", mp->dstg.enb.mask, mp->dstg.enb.enable);
  292. retval = bttv_gpio_enable(bt->bttv_nr,
  293. mp->enb.mask,
  294. mp->enb.enable);
  295. break;
  296. case DST_IG_WRITE:
  297. // dprintk("dvb_bt8xx: dst write gpio mask 0x%02x out 0x%02x\n", mp->dstg.outp.mask, mp->dstg.outp.highvals);
  298. retval = bttv_write_gpio(bt->bttv_nr,
  299. mp->outp.mask,
  300. mp->outp.highvals);
  301. break;
  302. case DST_IG_READ:
  303. /* read */
  304. retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value);
  305. // dprintk("dvb_bt8xx: dst read gpio 0x%02x\n", (unsigned)mp->dstg.rd.value);
  306. break;
  307. case DST_IG_TS:
  308. /* Set packet size */
  309. bt->TS_Size = mp->psize;
  310. break;
  311. default:
  312. retval = -EINVAL;
  313. break;
  314. }
  315. mutex_unlock(&bt->gpio_lock);
  316. return retval;
  317. }
  318. EXPORT_SYMBOL(bt878_device_control);
  319. static struct cards card_list[] __devinitdata = {
  320. { 0x01010071, BTTV_BOARD_NEBULA_DIGITV, "Nebula Electronics DigiTV" },
  321. { 0x07611461, BTTV_BOARD_AVDVBT_761, "AverMedia AverTV DVB-T 761" },
  322. { 0x001c11bd, BTTV_BOARD_PINNACLESAT, "Pinnacle PCTV Sat" },
  323. { 0x002611bd, BTTV_BOARD_TWINHAN_DST, "Pinnacle PCTV SAT CI" },
  324. { 0x00011822, BTTV_BOARD_TWINHAN_DST, "Twinhan VisionPlus DVB" },
  325. { 0xfc00270f, BTTV_BOARD_TWINHAN_DST, "ChainTech digitop DST-1000 DVB-S" },
  326. { 0x07711461, BTTV_BOARD_AVDVBT_771, "AVermedia AverTV DVB-T 771" },
  327. { 0xdb1018ac, BTTV_BOARD_DVICO_DVBT_LITE, "DViCO FusionHDTV DVB-T Lite" },
  328. { 0xdb1118ac, BTTV_BOARD_DVICO_DVBT_LITE, "Ultraview DVB-T Lite" },
  329. { 0xd50018ac, BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE, "DViCO FusionHDTV 5 Lite" },
  330. { 0x20007063, BTTV_BOARD_PC_HDTV, "pcHDTV HD-2000 TV" },
  331. { 0x00261822, BTTV_BOARD_TWINHAN_DST, "DNTV Live! Mini" }
  332. };
  333. /***********************/
  334. /* PCI device handling */
  335. /***********************/
  336. static int __devinit bt878_probe(struct pci_dev *dev,
  337. const struct pci_device_id *pci_id)
  338. {
  339. int result = 0, has_dvb = 0, i;
  340. unsigned char lat;
  341. struct bt878 *bt;
  342. #if defined(__powerpc__)
  343. unsigned int cmd;
  344. #endif
  345. unsigned int cardid;
  346. unsigned short id;
  347. struct cards *dvb_cards;
  348. printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
  349. bt878_num);
  350. if (bt878_num >= BT878_MAX) {
  351. printk(KERN_ERR "bt878: Too many devices inserted\n");
  352. result = -ENOMEM;
  353. goto fail0;
  354. }
  355. if (pci_enable_device(dev))
  356. return -EIO;
  357. pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &id);
  358. cardid = id << 16;
  359. pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &id);
  360. cardid |= id;
  361. for (i = 0, dvb_cards = card_list; i < ARRAY_SIZE(card_list); i++, dvb_cards++) {
  362. if (cardid == dvb_cards->pci_id) {
  363. printk("%s: card id=[0x%x],[ %s ] has DVB functions.\n",
  364. __func__, cardid, dvb_cards->name);
  365. has_dvb = 1;
  366. }
  367. }
  368. if (!has_dvb) {
  369. printk("%s: card id=[0x%x], Unknown card.\nExiting..\n", __func__, cardid);
  370. result = -EINVAL;
  371. goto fail0;
  372. }
  373. bt = &bt878[bt878_num];
  374. bt->dev = dev;
  375. bt->nr = bt878_num;
  376. bt->shutdown = 0;
  377. bt->id = dev->device;
  378. bt->irq = dev->irq;
  379. bt->bt878_adr = pci_resource_start(dev, 0);
  380. if (!request_mem_region(pci_resource_start(dev, 0),
  381. pci_resource_len(dev, 0), "bt878")) {
  382. result = -EBUSY;
  383. goto fail0;
  384. }
  385. pci_read_config_byte(dev, PCI_CLASS_REVISION, &bt->revision);
  386. pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
  387. printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ",
  388. bt878_num, bt->id, bt->revision, dev->bus->number,
  389. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  390. printk("irq: %d, latency: %d, memory: 0x%lx\n",
  391. bt->irq, lat, bt->bt878_adr);
  392. #if defined(__powerpc__)
  393. /* on OpenFirmware machines (PowerMac at least), PCI memory cycle */
  394. /* response on cards with no firmware is not enabled by OF */
  395. pci_read_config_dword(dev, PCI_COMMAND, &cmd);
  396. cmd = (cmd | PCI_COMMAND_MEMORY);
  397. pci_write_config_dword(dev, PCI_COMMAND, cmd);
  398. #endif
  399. #ifdef __sparc__
  400. bt->bt878_mem = (unsigned char *) bt->bt878_adr;
  401. #else
  402. bt->bt878_mem = ioremap(bt->bt878_adr, 0x1000);
  403. #endif
  404. /* clear interrupt mask */
  405. btwrite(0, BT848_INT_MASK);
  406. result = request_irq(bt->irq, bt878_irq,
  407. IRQF_SHARED | IRQF_DISABLED, "bt878",
  408. (void *) bt);
  409. if (result == -EINVAL) {
  410. printk(KERN_ERR "bt878(%d): Bad irq number or handler\n",
  411. bt878_num);
  412. goto fail1;
  413. }
  414. if (result == -EBUSY) {
  415. printk(KERN_ERR
  416. "bt878(%d): IRQ %d busy, change your PnP config in BIOS\n",
  417. bt878_num, bt->irq);
  418. goto fail1;
  419. }
  420. if (result < 0)
  421. goto fail1;
  422. pci_set_master(dev);
  423. pci_set_drvdata(dev, bt);
  424. /* if(init_bt878(btv) < 0) {
  425. bt878_remove(dev);
  426. return -EIO;
  427. }
  428. */
  429. if ((result = bt878_mem_alloc(bt))) {
  430. printk("bt878: failed to allocate memory!\n");
  431. goto fail2;
  432. }
  433. bt878_make_risc(bt);
  434. btwrite(0, BT878_AINT_MASK);
  435. bt878_num++;
  436. return 0;
  437. fail2:
  438. free_irq(bt->irq, bt);
  439. fail1:
  440. release_mem_region(pci_resource_start(bt->dev, 0),
  441. pci_resource_len(bt->dev, 0));
  442. fail0:
  443. pci_disable_device(dev);
  444. return result;
  445. }
  446. static void __devexit bt878_remove(struct pci_dev *pci_dev)
  447. {
  448. u8 command;
  449. struct bt878 *bt = pci_get_drvdata(pci_dev);
  450. if (bt878_verbose)
  451. printk("bt878(%d): unloading\n", bt->nr);
  452. /* turn off all capturing, DMA and IRQs */
  453. btand(~0x13, BT878_AGPIO_DMA_CTL);
  454. /* first disable interrupts before unmapping the memory! */
  455. btwrite(0, BT878_AINT_MASK);
  456. btwrite(~0U, BT878_AINT_STAT);
  457. /* disable PCI bus-mastering */
  458. pci_read_config_byte(bt->dev, PCI_COMMAND, &command);
  459. /* Should this be &=~ ?? */
  460. command &= ~PCI_COMMAND_MASTER;
  461. pci_write_config_byte(bt->dev, PCI_COMMAND, command);
  462. free_irq(bt->irq, bt);
  463. printk(KERN_DEBUG "bt878_mem: 0x%p.\n", bt->bt878_mem);
  464. if (bt->bt878_mem)
  465. iounmap(bt->bt878_mem);
  466. release_mem_region(pci_resource_start(bt->dev, 0),
  467. pci_resource_len(bt->dev, 0));
  468. /* wake up any waiting processes
  469. because shutdown flag is set, no new processes (in this queue)
  470. are expected
  471. */
  472. bt->shutdown = 1;
  473. bt878_mem_free(bt);
  474. pci_set_drvdata(pci_dev, NULL);
  475. pci_disable_device(pci_dev);
  476. return;
  477. }
  478. static struct pci_device_id bt878_pci_tbl[] __devinitdata = {
  479. {PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BROOKTREE_878,
  480. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  481. {0,}
  482. };
  483. MODULE_DEVICE_TABLE(pci, bt878_pci_tbl);
  484. static struct pci_driver bt878_pci_driver = {
  485. .name = "bt878",
  486. .id_table = bt878_pci_tbl,
  487. .probe = bt878_probe,
  488. .remove = bt878_remove,
  489. };
  490. static int bt878_pci_driver_registered;
  491. /*******************************/
  492. /* Module management functions */
  493. /*******************************/
  494. static int bt878_init_module(void)
  495. {
  496. bt878_num = 0;
  497. bt878_pci_driver_registered = 0;
  498. printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
  499. (BT878_VERSION_CODE >> 16) & 0xff,
  500. (BT878_VERSION_CODE >> 8) & 0xff,
  501. BT878_VERSION_CODE & 0xff);
  502. /*
  503. bt878_check_chipset();
  504. */
  505. /* later we register inside of bt878_find_audio_dma()
  506. * because we may want to ignore certain cards */
  507. bt878_pci_driver_registered = 1;
  508. return pci_register_driver(&bt878_pci_driver);
  509. }
  510. static void bt878_cleanup_module(void)
  511. {
  512. if (bt878_pci_driver_registered) {
  513. bt878_pci_driver_registered = 0;
  514. pci_unregister_driver(&bt878_pci_driver);
  515. }
  516. return;
  517. }
  518. module_init(bt878_init_module);
  519. module_exit(bt878_cleanup_module);
  520. //MODULE_AUTHOR("XXX");
  521. MODULE_LICENSE("GPL");
  522. /*
  523. * Local variables:
  524. * c-basic-offset: 8
  525. * End:
  526. */