smu.c 30 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrutps off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/device.h>
  23. #include <linux/dmapool.h>
  24. #include <linux/bootmem.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/highmem.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/rtc.h>
  30. #include <linux/completion.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/delay.h>
  33. #include <linux/sysdev.h>
  34. #include <linux/poll.h>
  35. #include <linux/mutex.h>
  36. #include <asm/byteorder.h>
  37. #include <asm/io.h>
  38. #include <asm/prom.h>
  39. #include <asm/machdep.h>
  40. #include <asm/pmac_feature.h>
  41. #include <asm/smu.h>
  42. #include <asm/sections.h>
  43. #include <asm/abs_addr.h>
  44. #include <asm/uaccess.h>
  45. #include <asm/of_device.h>
  46. #include <asm/of_platform.h>
  47. #define VERSION "0.7"
  48. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  49. #undef DEBUG_SMU
  50. #ifdef DEBUG_SMU
  51. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  52. #else
  53. #define DPRINTK(fmt, args...) do { } while (0)
  54. #endif
  55. /*
  56. * This is the command buffer passed to the SMU hardware
  57. */
  58. #define SMU_MAX_DATA 254
  59. struct smu_cmd_buf {
  60. u8 cmd;
  61. u8 length;
  62. u8 data[SMU_MAX_DATA];
  63. };
  64. struct smu_device {
  65. spinlock_t lock;
  66. struct device_node *of_node;
  67. struct of_device *of_dev;
  68. int doorbell; /* doorbell gpio */
  69. u32 __iomem *db_buf; /* doorbell buffer */
  70. struct device_node *db_node;
  71. unsigned int db_irq;
  72. int msg;
  73. struct device_node *msg_node;
  74. unsigned int msg_irq;
  75. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  76. u32 cmd_buf_abs; /* command buffer absolute */
  77. struct list_head cmd_list;
  78. struct smu_cmd *cmd_cur; /* pending command */
  79. struct list_head cmd_i2c_list;
  80. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  81. struct timer_list i2c_timer;
  82. };
  83. /*
  84. * I don't think there will ever be more than one SMU, so
  85. * for now, just hard code that
  86. */
  87. static struct smu_device *smu;
  88. static DEFINE_MUTEX(smu_part_access);
  89. static int smu_irq_inited;
  90. static void smu_i2c_retry(unsigned long data);
  91. /*
  92. * SMU driver low level stuff
  93. */
  94. static void smu_start_cmd(void)
  95. {
  96. unsigned long faddr, fend;
  97. struct smu_cmd *cmd;
  98. if (list_empty(&smu->cmd_list))
  99. return;
  100. /* Fetch first command in queue */
  101. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  102. smu->cmd_cur = cmd;
  103. list_del(&cmd->link);
  104. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  105. cmd->data_len);
  106. DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n",
  107. ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
  108. ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3],
  109. ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5],
  110. ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]);
  111. /* Fill the SMU command buffer */
  112. smu->cmd_buf->cmd = cmd->cmd;
  113. smu->cmd_buf->length = cmd->data_len;
  114. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  115. /* Flush command and data to RAM */
  116. faddr = (unsigned long)smu->cmd_buf;
  117. fend = faddr + smu->cmd_buf->length + 2;
  118. flush_inval_dcache_range(faddr, fend);
  119. /* This isn't exactly a DMA mapping here, I suspect
  120. * the SMU is actually communicating with us via i2c to the
  121. * northbridge or the CPU to access RAM.
  122. */
  123. writel(smu->cmd_buf_abs, smu->db_buf);
  124. /* Ring the SMU doorbell */
  125. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  126. }
  127. static irqreturn_t smu_db_intr(int irq, void *arg)
  128. {
  129. unsigned long flags;
  130. struct smu_cmd *cmd;
  131. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  132. void *misc = NULL;
  133. u8 gpio;
  134. int rc = 0;
  135. /* SMU completed the command, well, we hope, let's make sure
  136. * of it
  137. */
  138. spin_lock_irqsave(&smu->lock, flags);
  139. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  140. if ((gpio & 7) != 7) {
  141. spin_unlock_irqrestore(&smu->lock, flags);
  142. return IRQ_HANDLED;
  143. }
  144. cmd = smu->cmd_cur;
  145. smu->cmd_cur = NULL;
  146. if (cmd == NULL)
  147. goto bail;
  148. if (rc == 0) {
  149. unsigned long faddr;
  150. int reply_len;
  151. u8 ack;
  152. /* CPU might have brought back the cache line, so we need
  153. * to flush again before peeking at the SMU response. We
  154. * flush the entire buffer for now as we haven't read the
  155. * reply lenght (it's only 2 cache lines anyway)
  156. */
  157. faddr = (unsigned long)smu->cmd_buf;
  158. flush_inval_dcache_range(faddr, faddr + 256);
  159. /* Now check ack */
  160. ack = (~cmd->cmd) & 0xff;
  161. if (ack != smu->cmd_buf->cmd) {
  162. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  163. ack, smu->cmd_buf->cmd);
  164. rc = -EIO;
  165. }
  166. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  167. DPRINTK("SMU: reply len: %d\n", reply_len);
  168. if (reply_len > cmd->reply_len) {
  169. printk(KERN_WARNING "SMU: reply buffer too small,"
  170. "got %d bytes for a %d bytes buffer\n",
  171. reply_len, cmd->reply_len);
  172. reply_len = cmd->reply_len;
  173. }
  174. cmd->reply_len = reply_len;
  175. if (cmd->reply_buf && reply_len)
  176. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  177. }
  178. /* Now complete the command. Write status last in order as we lost
  179. * ownership of the command structure as soon as it's no longer -1
  180. */
  181. done = cmd->done;
  182. misc = cmd->misc;
  183. mb();
  184. cmd->status = rc;
  185. bail:
  186. /* Start next command if any */
  187. smu_start_cmd();
  188. spin_unlock_irqrestore(&smu->lock, flags);
  189. /* Call command completion handler if any */
  190. if (done)
  191. done(cmd, misc);
  192. /* It's an edge interrupt, nothing to do */
  193. return IRQ_HANDLED;
  194. }
  195. static irqreturn_t smu_msg_intr(int irq, void *arg)
  196. {
  197. /* I don't quite know what to do with this one, we seem to never
  198. * receive it, so I suspect we have to arm it someway in the SMU
  199. * to start getting events that way.
  200. */
  201. printk(KERN_INFO "SMU: message interrupt !\n");
  202. /* It's an edge interrupt, nothing to do */
  203. return IRQ_HANDLED;
  204. }
  205. /*
  206. * Queued command management.
  207. *
  208. */
  209. int smu_queue_cmd(struct smu_cmd *cmd)
  210. {
  211. unsigned long flags;
  212. if (smu == NULL)
  213. return -ENODEV;
  214. if (cmd->data_len > SMU_MAX_DATA ||
  215. cmd->reply_len > SMU_MAX_DATA)
  216. return -EINVAL;
  217. cmd->status = 1;
  218. spin_lock_irqsave(&smu->lock, flags);
  219. list_add_tail(&cmd->link, &smu->cmd_list);
  220. if (smu->cmd_cur == NULL)
  221. smu_start_cmd();
  222. spin_unlock_irqrestore(&smu->lock, flags);
  223. /* Workaround for early calls when irq isn't available */
  224. if (!smu_irq_inited || smu->db_irq == NO_IRQ)
  225. smu_spinwait_cmd(cmd);
  226. return 0;
  227. }
  228. EXPORT_SYMBOL(smu_queue_cmd);
  229. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  230. unsigned int data_len,
  231. void (*done)(struct smu_cmd *cmd, void *misc),
  232. void *misc, ...)
  233. {
  234. struct smu_cmd *cmd = &scmd->cmd;
  235. va_list list;
  236. int i;
  237. if (data_len > sizeof(scmd->buffer))
  238. return -EINVAL;
  239. memset(scmd, 0, sizeof(*scmd));
  240. cmd->cmd = command;
  241. cmd->data_len = data_len;
  242. cmd->data_buf = scmd->buffer;
  243. cmd->reply_len = sizeof(scmd->buffer);
  244. cmd->reply_buf = scmd->buffer;
  245. cmd->done = done;
  246. cmd->misc = misc;
  247. va_start(list, misc);
  248. for (i = 0; i < data_len; ++i)
  249. scmd->buffer[i] = (u8)va_arg(list, int);
  250. va_end(list);
  251. return smu_queue_cmd(cmd);
  252. }
  253. EXPORT_SYMBOL(smu_queue_simple);
  254. void smu_poll(void)
  255. {
  256. u8 gpio;
  257. if (smu == NULL)
  258. return;
  259. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  260. if ((gpio & 7) == 7)
  261. smu_db_intr(smu->db_irq, smu);
  262. }
  263. EXPORT_SYMBOL(smu_poll);
  264. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  265. {
  266. struct completion *comp = misc;
  267. complete(comp);
  268. }
  269. EXPORT_SYMBOL(smu_done_complete);
  270. void smu_spinwait_cmd(struct smu_cmd *cmd)
  271. {
  272. while(cmd->status == 1)
  273. smu_poll();
  274. }
  275. EXPORT_SYMBOL(smu_spinwait_cmd);
  276. /* RTC low level commands */
  277. static inline int bcd2hex (int n)
  278. {
  279. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  280. }
  281. static inline int hex2bcd (int n)
  282. {
  283. return ((n / 10) << 4) + (n % 10);
  284. }
  285. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  286. struct rtc_time *time)
  287. {
  288. cmd_buf->cmd = 0x8e;
  289. cmd_buf->length = 8;
  290. cmd_buf->data[0] = 0x80;
  291. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  292. cmd_buf->data[2] = hex2bcd(time->tm_min);
  293. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  294. cmd_buf->data[4] = time->tm_wday;
  295. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  296. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  297. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  298. }
  299. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  300. {
  301. struct smu_simple_cmd cmd;
  302. int rc;
  303. if (smu == NULL)
  304. return -ENODEV;
  305. memset(time, 0, sizeof(struct rtc_time));
  306. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  307. SMU_CMD_RTC_GET_DATETIME);
  308. if (rc)
  309. return rc;
  310. smu_spinwait_simple(&cmd);
  311. time->tm_sec = bcd2hex(cmd.buffer[0]);
  312. time->tm_min = bcd2hex(cmd.buffer[1]);
  313. time->tm_hour = bcd2hex(cmd.buffer[2]);
  314. time->tm_wday = bcd2hex(cmd.buffer[3]);
  315. time->tm_mday = bcd2hex(cmd.buffer[4]);
  316. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  317. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  318. return 0;
  319. }
  320. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  321. {
  322. struct smu_simple_cmd cmd;
  323. int rc;
  324. if (smu == NULL)
  325. return -ENODEV;
  326. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  327. SMU_CMD_RTC_SET_DATETIME,
  328. hex2bcd(time->tm_sec),
  329. hex2bcd(time->tm_min),
  330. hex2bcd(time->tm_hour),
  331. time->tm_wday,
  332. hex2bcd(time->tm_mday),
  333. hex2bcd(time->tm_mon) + 1,
  334. hex2bcd(time->tm_year - 100));
  335. if (rc)
  336. return rc;
  337. smu_spinwait_simple(&cmd);
  338. return 0;
  339. }
  340. void smu_shutdown(void)
  341. {
  342. struct smu_simple_cmd cmd;
  343. if (smu == NULL)
  344. return;
  345. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  346. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  347. return;
  348. smu_spinwait_simple(&cmd);
  349. for (;;)
  350. ;
  351. }
  352. void smu_restart(void)
  353. {
  354. struct smu_simple_cmd cmd;
  355. if (smu == NULL)
  356. return;
  357. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  358. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  359. return;
  360. smu_spinwait_simple(&cmd);
  361. for (;;)
  362. ;
  363. }
  364. int smu_present(void)
  365. {
  366. return smu != NULL;
  367. }
  368. EXPORT_SYMBOL(smu_present);
  369. int __init smu_init (void)
  370. {
  371. struct device_node *np;
  372. const u32 *data;
  373. np = of_find_node_by_type(NULL, "smu");
  374. if (np == NULL)
  375. return -ENODEV;
  376. printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR);
  377. if (smu_cmdbuf_abs == 0) {
  378. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  379. return -EINVAL;
  380. }
  381. smu = alloc_bootmem(sizeof(struct smu_device));
  382. if (smu == NULL)
  383. return -ENOMEM;
  384. memset(smu, 0, sizeof(*smu));
  385. spin_lock_init(&smu->lock);
  386. INIT_LIST_HEAD(&smu->cmd_list);
  387. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  388. smu->of_node = np;
  389. smu->db_irq = NO_IRQ;
  390. smu->msg_irq = NO_IRQ;
  391. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  392. * 32 bits value safely
  393. */
  394. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  395. smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
  396. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  397. if (smu->db_node == NULL) {
  398. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  399. goto fail;
  400. }
  401. data = of_get_property(smu->db_node, "reg", NULL);
  402. if (data == NULL) {
  403. of_node_put(smu->db_node);
  404. smu->db_node = NULL;
  405. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  406. goto fail;
  407. }
  408. /* Current setup has one doorbell GPIO that does both doorbell
  409. * and ack. GPIOs are at 0x50, best would be to find that out
  410. * in the device-tree though.
  411. */
  412. smu->doorbell = *data;
  413. if (smu->doorbell < 0x50)
  414. smu->doorbell += 0x50;
  415. /* Now look for the smu-interrupt GPIO */
  416. do {
  417. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  418. if (smu->msg_node == NULL)
  419. break;
  420. data = of_get_property(smu->msg_node, "reg", NULL);
  421. if (data == NULL) {
  422. of_node_put(smu->msg_node);
  423. smu->msg_node = NULL;
  424. break;
  425. }
  426. smu->msg = *data;
  427. if (smu->msg < 0x50)
  428. smu->msg += 0x50;
  429. } while(0);
  430. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  431. * device-tree entry giving the address. Best would probably to use
  432. * an offset for K2 base though, but let's do it that way for now.
  433. */
  434. smu->db_buf = ioremap(0x8000860c, 0x1000);
  435. if (smu->db_buf == NULL) {
  436. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  437. goto fail;
  438. }
  439. sys_ctrler = SYS_CTRLER_SMU;
  440. return 0;
  441. fail:
  442. smu = NULL;
  443. return -ENXIO;
  444. }
  445. static int smu_late_init(void)
  446. {
  447. if (!smu)
  448. return 0;
  449. init_timer(&smu->i2c_timer);
  450. smu->i2c_timer.function = smu_i2c_retry;
  451. smu->i2c_timer.data = (unsigned long)smu;
  452. if (smu->db_node) {
  453. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  454. if (smu->db_irq == NO_IRQ)
  455. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  456. smu->db_node->full_name);
  457. }
  458. if (smu->msg_node) {
  459. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  460. if (smu->msg_irq == NO_IRQ)
  461. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  462. smu->msg_node->full_name);
  463. }
  464. /*
  465. * Try to request the interrupts
  466. */
  467. if (smu->db_irq != NO_IRQ) {
  468. if (request_irq(smu->db_irq, smu_db_intr,
  469. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  470. printk(KERN_WARNING "SMU: can't "
  471. "request interrupt %d\n",
  472. smu->db_irq);
  473. smu->db_irq = NO_IRQ;
  474. }
  475. }
  476. if (smu->msg_irq != NO_IRQ) {
  477. if (request_irq(smu->msg_irq, smu_msg_intr,
  478. IRQF_SHARED, "SMU message", smu) < 0) {
  479. printk(KERN_WARNING "SMU: can't "
  480. "request interrupt %d\n",
  481. smu->msg_irq);
  482. smu->msg_irq = NO_IRQ;
  483. }
  484. }
  485. smu_irq_inited = 1;
  486. return 0;
  487. }
  488. /* This has to be before arch_initcall as the low i2c stuff relies on the
  489. * above having been done before we reach arch_initcalls
  490. */
  491. core_initcall(smu_late_init);
  492. /*
  493. * sysfs visibility
  494. */
  495. static void smu_expose_childs(struct work_struct *unused)
  496. {
  497. struct device_node *np;
  498. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  499. if (of_device_is_compatible(np, "smu-sensors"))
  500. of_platform_device_create(np, "smu-sensors",
  501. &smu->of_dev->dev);
  502. }
  503. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  504. static int smu_platform_probe(struct of_device* dev,
  505. const struct of_device_id *match)
  506. {
  507. if (!smu)
  508. return -ENODEV;
  509. smu->of_dev = dev;
  510. /*
  511. * Ok, we are matched, now expose all i2c busses. We have to defer
  512. * that unfortunately or it would deadlock inside the device model
  513. */
  514. schedule_work(&smu_expose_childs_work);
  515. return 0;
  516. }
  517. static struct of_device_id smu_platform_match[] =
  518. {
  519. {
  520. .type = "smu",
  521. },
  522. {},
  523. };
  524. static struct of_platform_driver smu_of_platform_driver =
  525. {
  526. .name = "smu",
  527. .match_table = smu_platform_match,
  528. .probe = smu_platform_probe,
  529. };
  530. static int __init smu_init_sysfs(void)
  531. {
  532. /*
  533. * Due to sysfs bogosity, a sysdev is not a real device, so
  534. * we should in fact create both if we want sysdev semantics
  535. * for power management.
  536. * For now, we don't power manage machines with an SMU chip,
  537. * I'm a bit too far from figuring out how that works with those
  538. * new chipsets, but that will come back and bite us
  539. */
  540. of_register_platform_driver(&smu_of_platform_driver);
  541. return 0;
  542. }
  543. device_initcall(smu_init_sysfs);
  544. struct of_device *smu_get_ofdev(void)
  545. {
  546. if (!smu)
  547. return NULL;
  548. return smu->of_dev;
  549. }
  550. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  551. /*
  552. * i2c interface
  553. */
  554. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  555. {
  556. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  557. void *misc = cmd->misc;
  558. unsigned long flags;
  559. /* Check for read case */
  560. if (!fail && cmd->read) {
  561. if (cmd->pdata[0] < 1)
  562. fail = 1;
  563. else
  564. memcpy(cmd->info.data, &cmd->pdata[1],
  565. cmd->info.datalen);
  566. }
  567. DPRINTK("SMU: completing, success: %d\n", !fail);
  568. /* Update status and mark no pending i2c command with lock
  569. * held so nobody comes in while we dequeue an eventual
  570. * pending next i2c command
  571. */
  572. spin_lock_irqsave(&smu->lock, flags);
  573. smu->cmd_i2c_cur = NULL;
  574. wmb();
  575. cmd->status = fail ? -EIO : 0;
  576. /* Is there another i2c command waiting ? */
  577. if (!list_empty(&smu->cmd_i2c_list)) {
  578. struct smu_i2c_cmd *newcmd;
  579. /* Fetch it, new current, remove from list */
  580. newcmd = list_entry(smu->cmd_i2c_list.next,
  581. struct smu_i2c_cmd, link);
  582. smu->cmd_i2c_cur = newcmd;
  583. list_del(&cmd->link);
  584. /* Queue with low level smu */
  585. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  586. if (smu->cmd_cur == NULL)
  587. smu_start_cmd();
  588. }
  589. spin_unlock_irqrestore(&smu->lock, flags);
  590. /* Call command completion handler if any */
  591. if (done)
  592. done(cmd, misc);
  593. }
  594. static void smu_i2c_retry(unsigned long data)
  595. {
  596. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  597. DPRINTK("SMU: i2c failure, requeuing...\n");
  598. /* requeue command simply by resetting reply_len */
  599. cmd->pdata[0] = 0xff;
  600. cmd->scmd.reply_len = sizeof(cmd->pdata);
  601. smu_queue_cmd(&cmd->scmd);
  602. }
  603. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  604. {
  605. struct smu_i2c_cmd *cmd = misc;
  606. int fail = 0;
  607. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  608. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  609. /* Check for possible status */
  610. if (scmd->status < 0)
  611. fail = 1;
  612. else if (cmd->read) {
  613. if (cmd->stage == 0)
  614. fail = cmd->pdata[0] != 0;
  615. else
  616. fail = cmd->pdata[0] >= 0x80;
  617. } else {
  618. fail = cmd->pdata[0] != 0;
  619. }
  620. /* Handle failures by requeuing command, after 5ms interval
  621. */
  622. if (fail && --cmd->retries > 0) {
  623. DPRINTK("SMU: i2c failure, starting timer...\n");
  624. BUG_ON(cmd != smu->cmd_i2c_cur);
  625. if (!smu_irq_inited) {
  626. mdelay(5);
  627. smu_i2c_retry(0);
  628. return;
  629. }
  630. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  631. return;
  632. }
  633. /* If failure or stage 1, command is complete */
  634. if (fail || cmd->stage != 0) {
  635. smu_i2c_complete_command(cmd, fail);
  636. return;
  637. }
  638. DPRINTK("SMU: going to stage 1\n");
  639. /* Ok, initial command complete, now poll status */
  640. scmd->reply_buf = cmd->pdata;
  641. scmd->reply_len = sizeof(cmd->pdata);
  642. scmd->data_buf = cmd->pdata;
  643. scmd->data_len = 1;
  644. cmd->pdata[0] = 0;
  645. cmd->stage = 1;
  646. cmd->retries = 20;
  647. smu_queue_cmd(scmd);
  648. }
  649. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  650. {
  651. unsigned long flags;
  652. if (smu == NULL)
  653. return -ENODEV;
  654. /* Fill most fields of scmd */
  655. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  656. cmd->scmd.done = smu_i2c_low_completion;
  657. cmd->scmd.misc = cmd;
  658. cmd->scmd.reply_buf = cmd->pdata;
  659. cmd->scmd.reply_len = sizeof(cmd->pdata);
  660. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  661. cmd->scmd.status = 1;
  662. cmd->stage = 0;
  663. cmd->pdata[0] = 0xff;
  664. cmd->retries = 20;
  665. cmd->status = 1;
  666. /* Check transfer type, sanitize some "info" fields
  667. * based on transfer type and do more checking
  668. */
  669. cmd->info.caddr = cmd->info.devaddr;
  670. cmd->read = cmd->info.devaddr & 0x01;
  671. switch(cmd->info.type) {
  672. case SMU_I2C_TRANSFER_SIMPLE:
  673. memset(&cmd->info.sublen, 0, 4);
  674. break;
  675. case SMU_I2C_TRANSFER_COMBINED:
  676. cmd->info.devaddr &= 0xfe;
  677. case SMU_I2C_TRANSFER_STDSUB:
  678. if (cmd->info.sublen > 3)
  679. return -EINVAL;
  680. break;
  681. default:
  682. return -EINVAL;
  683. }
  684. /* Finish setting up command based on transfer direction
  685. */
  686. if (cmd->read) {
  687. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  688. return -EINVAL;
  689. memset(cmd->info.data, 0xff, cmd->info.datalen);
  690. cmd->scmd.data_len = 9;
  691. } else {
  692. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  693. return -EINVAL;
  694. cmd->scmd.data_len = 9 + cmd->info.datalen;
  695. }
  696. DPRINTK("SMU: i2c enqueuing command\n");
  697. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  698. cmd->read ? "read" : "write", cmd->info.datalen,
  699. cmd->info.bus, cmd->info.caddr,
  700. cmd->info.subaddr[0], cmd->info.type);
  701. /* Enqueue command in i2c list, and if empty, enqueue also in
  702. * main command list
  703. */
  704. spin_lock_irqsave(&smu->lock, flags);
  705. if (smu->cmd_i2c_cur == NULL) {
  706. smu->cmd_i2c_cur = cmd;
  707. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  708. if (smu->cmd_cur == NULL)
  709. smu_start_cmd();
  710. } else
  711. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  712. spin_unlock_irqrestore(&smu->lock, flags);
  713. return 0;
  714. }
  715. /*
  716. * Handling of "partitions"
  717. */
  718. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  719. {
  720. DECLARE_COMPLETION_ONSTACK(comp);
  721. unsigned int chunk;
  722. struct smu_cmd cmd;
  723. int rc;
  724. u8 params[8];
  725. /* We currently use a chunk size of 0xe. We could check the
  726. * SMU firmware version and use bigger sizes though
  727. */
  728. chunk = 0xe;
  729. while (len) {
  730. unsigned int clen = min(len, chunk);
  731. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  732. cmd.data_len = 7;
  733. cmd.data_buf = params;
  734. cmd.reply_len = chunk;
  735. cmd.reply_buf = dest;
  736. cmd.done = smu_done_complete;
  737. cmd.misc = &comp;
  738. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  739. params[1] = 0x4;
  740. *((u32 *)&params[2]) = addr;
  741. params[6] = clen;
  742. rc = smu_queue_cmd(&cmd);
  743. if (rc)
  744. return rc;
  745. wait_for_completion(&comp);
  746. if (cmd.status != 0)
  747. return rc;
  748. if (cmd.reply_len != clen) {
  749. printk(KERN_DEBUG "SMU: short read in "
  750. "smu_read_datablock, got: %d, want: %d\n",
  751. cmd.reply_len, clen);
  752. return -EIO;
  753. }
  754. len -= clen;
  755. addr += clen;
  756. dest += clen;
  757. }
  758. return 0;
  759. }
  760. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  761. {
  762. DECLARE_COMPLETION_ONSTACK(comp);
  763. struct smu_simple_cmd cmd;
  764. unsigned int addr, len, tlen;
  765. struct smu_sdbp_header *hdr;
  766. struct property *prop;
  767. /* First query the partition info */
  768. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  769. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  770. smu_done_complete, &comp,
  771. SMU_CMD_PARTITION_LATEST, id);
  772. wait_for_completion(&comp);
  773. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  774. cmd.cmd.status, cmd.cmd.reply_len);
  775. /* Partition doesn't exist (or other error) */
  776. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  777. return NULL;
  778. /* Fetch address and length from reply */
  779. addr = *((u16 *)cmd.buffer);
  780. len = cmd.buffer[3] << 2;
  781. /* Calucluate total length to allocate, including the 17 bytes
  782. * for "sdb-partition-XX" that we append at the end of the buffer
  783. */
  784. tlen = sizeof(struct property) + len + 18;
  785. prop = kzalloc(tlen, GFP_KERNEL);
  786. if (prop == NULL)
  787. return NULL;
  788. hdr = (struct smu_sdbp_header *)(prop + 1);
  789. prop->name = ((char *)prop) + tlen - 18;
  790. sprintf(prop->name, "sdb-partition-%02x", id);
  791. prop->length = len;
  792. prop->value = hdr;
  793. prop->next = NULL;
  794. /* Read the datablock */
  795. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  796. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  797. "partition %02x !\n", id);
  798. goto failure;
  799. }
  800. /* Got it, check a few things and create the property */
  801. if (hdr->id != id) {
  802. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  803. "%02x !\n", id, hdr->id);
  804. goto failure;
  805. }
  806. if (prom_add_property(smu->of_node, prop)) {
  807. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  808. "property !\n", id);
  809. goto failure;
  810. }
  811. return hdr;
  812. failure:
  813. kfree(prop);
  814. return NULL;
  815. }
  816. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  817. * when interruptible is 1
  818. */
  819. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  820. unsigned int *size, int interruptible)
  821. {
  822. char pname[32];
  823. const struct smu_sdbp_header *part;
  824. if (!smu)
  825. return NULL;
  826. sprintf(pname, "sdb-partition-%02x", id);
  827. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  828. if (interruptible) {
  829. int rc;
  830. rc = mutex_lock_interruptible(&smu_part_access);
  831. if (rc)
  832. return ERR_PTR(rc);
  833. } else
  834. mutex_lock(&smu_part_access);
  835. part = of_get_property(smu->of_node, pname, size);
  836. if (part == NULL) {
  837. DPRINTK("trying to extract from SMU ...\n");
  838. part = smu_create_sdb_partition(id);
  839. if (part != NULL && size)
  840. *size = part->len << 2;
  841. }
  842. mutex_unlock(&smu_part_access);
  843. return part;
  844. }
  845. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  846. {
  847. return __smu_get_sdb_partition(id, size, 0);
  848. }
  849. EXPORT_SYMBOL(smu_get_sdb_partition);
  850. /*
  851. * Userland driver interface
  852. */
  853. static LIST_HEAD(smu_clist);
  854. static DEFINE_SPINLOCK(smu_clist_lock);
  855. enum smu_file_mode {
  856. smu_file_commands,
  857. smu_file_events,
  858. smu_file_closing
  859. };
  860. struct smu_private
  861. {
  862. struct list_head list;
  863. enum smu_file_mode mode;
  864. int busy;
  865. struct smu_cmd cmd;
  866. spinlock_t lock;
  867. wait_queue_head_t wait;
  868. u8 buffer[SMU_MAX_DATA];
  869. };
  870. static int smu_open(struct inode *inode, struct file *file)
  871. {
  872. struct smu_private *pp;
  873. unsigned long flags;
  874. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  875. if (pp == 0)
  876. return -ENOMEM;
  877. spin_lock_init(&pp->lock);
  878. pp->mode = smu_file_commands;
  879. init_waitqueue_head(&pp->wait);
  880. spin_lock_irqsave(&smu_clist_lock, flags);
  881. list_add(&pp->list, &smu_clist);
  882. spin_unlock_irqrestore(&smu_clist_lock, flags);
  883. file->private_data = pp;
  884. return 0;
  885. }
  886. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  887. {
  888. struct smu_private *pp = misc;
  889. wake_up_all(&pp->wait);
  890. }
  891. static ssize_t smu_write(struct file *file, const char __user *buf,
  892. size_t count, loff_t *ppos)
  893. {
  894. struct smu_private *pp = file->private_data;
  895. unsigned long flags;
  896. struct smu_user_cmd_hdr hdr;
  897. int rc = 0;
  898. if (pp->busy)
  899. return -EBUSY;
  900. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  901. return -EFAULT;
  902. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  903. pp->mode = smu_file_events;
  904. return 0;
  905. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  906. const struct smu_sdbp_header *part;
  907. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  908. if (part == NULL)
  909. return -EINVAL;
  910. else if (IS_ERR(part))
  911. return PTR_ERR(part);
  912. return 0;
  913. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  914. return -EINVAL;
  915. else if (pp->mode != smu_file_commands)
  916. return -EBADFD;
  917. else if (hdr.data_len > SMU_MAX_DATA)
  918. return -EINVAL;
  919. spin_lock_irqsave(&pp->lock, flags);
  920. if (pp->busy) {
  921. spin_unlock_irqrestore(&pp->lock, flags);
  922. return -EBUSY;
  923. }
  924. pp->busy = 1;
  925. pp->cmd.status = 1;
  926. spin_unlock_irqrestore(&pp->lock, flags);
  927. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  928. pp->busy = 0;
  929. return -EFAULT;
  930. }
  931. pp->cmd.cmd = hdr.cmd;
  932. pp->cmd.data_len = hdr.data_len;
  933. pp->cmd.reply_len = SMU_MAX_DATA;
  934. pp->cmd.data_buf = pp->buffer;
  935. pp->cmd.reply_buf = pp->buffer;
  936. pp->cmd.done = smu_user_cmd_done;
  937. pp->cmd.misc = pp;
  938. rc = smu_queue_cmd(&pp->cmd);
  939. if (rc < 0)
  940. return rc;
  941. return count;
  942. }
  943. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  944. char __user *buf, size_t count)
  945. {
  946. DECLARE_WAITQUEUE(wait, current);
  947. struct smu_user_reply_hdr hdr;
  948. unsigned long flags;
  949. int size, rc = 0;
  950. if (!pp->busy)
  951. return 0;
  952. if (count < sizeof(struct smu_user_reply_hdr))
  953. return -EOVERFLOW;
  954. spin_lock_irqsave(&pp->lock, flags);
  955. if (pp->cmd.status == 1) {
  956. if (file->f_flags & O_NONBLOCK)
  957. return -EAGAIN;
  958. add_wait_queue(&pp->wait, &wait);
  959. for (;;) {
  960. set_current_state(TASK_INTERRUPTIBLE);
  961. rc = 0;
  962. if (pp->cmd.status != 1)
  963. break;
  964. rc = -ERESTARTSYS;
  965. if (signal_pending(current))
  966. break;
  967. spin_unlock_irqrestore(&pp->lock, flags);
  968. schedule();
  969. spin_lock_irqsave(&pp->lock, flags);
  970. }
  971. set_current_state(TASK_RUNNING);
  972. remove_wait_queue(&pp->wait, &wait);
  973. }
  974. spin_unlock_irqrestore(&pp->lock, flags);
  975. if (rc)
  976. return rc;
  977. if (pp->cmd.status != 0)
  978. pp->cmd.reply_len = 0;
  979. size = sizeof(hdr) + pp->cmd.reply_len;
  980. if (count < size)
  981. size = count;
  982. rc = size;
  983. hdr.status = pp->cmd.status;
  984. hdr.reply_len = pp->cmd.reply_len;
  985. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  986. return -EFAULT;
  987. size -= sizeof(hdr);
  988. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  989. return -EFAULT;
  990. pp->busy = 0;
  991. return rc;
  992. }
  993. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  994. char __user *buf, size_t count)
  995. {
  996. /* Not implemented */
  997. msleep_interruptible(1000);
  998. return 0;
  999. }
  1000. static ssize_t smu_read(struct file *file, char __user *buf,
  1001. size_t count, loff_t *ppos)
  1002. {
  1003. struct smu_private *pp = file->private_data;
  1004. if (pp->mode == smu_file_commands)
  1005. return smu_read_command(file, pp, buf, count);
  1006. if (pp->mode == smu_file_events)
  1007. return smu_read_events(file, pp, buf, count);
  1008. return -EBADFD;
  1009. }
  1010. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  1011. {
  1012. struct smu_private *pp = file->private_data;
  1013. unsigned int mask = 0;
  1014. unsigned long flags;
  1015. if (pp == 0)
  1016. return 0;
  1017. if (pp->mode == smu_file_commands) {
  1018. poll_wait(file, &pp->wait, wait);
  1019. spin_lock_irqsave(&pp->lock, flags);
  1020. if (pp->busy && pp->cmd.status != 1)
  1021. mask |= POLLIN;
  1022. spin_unlock_irqrestore(&pp->lock, flags);
  1023. } if (pp->mode == smu_file_events) {
  1024. /* Not yet implemented */
  1025. }
  1026. return mask;
  1027. }
  1028. static int smu_release(struct inode *inode, struct file *file)
  1029. {
  1030. struct smu_private *pp = file->private_data;
  1031. unsigned long flags;
  1032. unsigned int busy;
  1033. if (pp == 0)
  1034. return 0;
  1035. file->private_data = NULL;
  1036. /* Mark file as closing to avoid races with new request */
  1037. spin_lock_irqsave(&pp->lock, flags);
  1038. pp->mode = smu_file_closing;
  1039. busy = pp->busy;
  1040. /* Wait for any pending request to complete */
  1041. if (busy && pp->cmd.status == 1) {
  1042. DECLARE_WAITQUEUE(wait, current);
  1043. add_wait_queue(&pp->wait, &wait);
  1044. for (;;) {
  1045. set_current_state(TASK_UNINTERRUPTIBLE);
  1046. if (pp->cmd.status != 1)
  1047. break;
  1048. spin_unlock_irqrestore(&pp->lock, flags);
  1049. schedule();
  1050. spin_lock_irqsave(&pp->lock, flags);
  1051. }
  1052. set_current_state(TASK_RUNNING);
  1053. remove_wait_queue(&pp->wait, &wait);
  1054. }
  1055. spin_unlock_irqrestore(&pp->lock, flags);
  1056. spin_lock_irqsave(&smu_clist_lock, flags);
  1057. list_del(&pp->list);
  1058. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1059. kfree(pp);
  1060. return 0;
  1061. }
  1062. static const struct file_operations smu_device_fops = {
  1063. .llseek = no_llseek,
  1064. .read = smu_read,
  1065. .write = smu_write,
  1066. .poll = smu_fpoll,
  1067. .open = smu_open,
  1068. .release = smu_release,
  1069. };
  1070. static struct miscdevice pmu_device = {
  1071. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1072. };
  1073. static int smu_device_init(void)
  1074. {
  1075. if (!smu)
  1076. return -ENODEV;
  1077. if (misc_register(&pmu_device) < 0)
  1078. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1079. return 0;
  1080. }
  1081. device_initcall(smu_device_init);