mmu.c 35 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <asm/page.h>
  27. #include <asm/cmpxchg.h>
  28. #undef MMU_DEBUG
  29. #undef AUDIT
  30. #ifdef AUDIT
  31. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  32. #else
  33. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  34. #endif
  35. #ifdef MMU_DEBUG
  36. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  37. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  38. #else
  39. #define pgprintk(x...) do { } while (0)
  40. #define rmap_printk(x...) do { } while (0)
  41. #endif
  42. #if defined(MMU_DEBUG) || defined(AUDIT)
  43. static int dbg = 1;
  44. #endif
  45. #ifndef MMU_DEBUG
  46. #define ASSERT(x) do { } while (0)
  47. #else
  48. #define ASSERT(x) \
  49. if (!(x)) { \
  50. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  51. __FILE__, __LINE__, #x); \
  52. }
  53. #endif
  54. #define PT64_PT_BITS 9
  55. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  56. #define PT32_PT_BITS 10
  57. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  58. #define PT_WRITABLE_SHIFT 1
  59. #define PT_PRESENT_MASK (1ULL << 0)
  60. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  61. #define PT_USER_MASK (1ULL << 2)
  62. #define PT_PWT_MASK (1ULL << 3)
  63. #define PT_PCD_MASK (1ULL << 4)
  64. #define PT_ACCESSED_MASK (1ULL << 5)
  65. #define PT_DIRTY_MASK (1ULL << 6)
  66. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  67. #define PT_PAT_MASK (1ULL << 7)
  68. #define PT_GLOBAL_MASK (1ULL << 8)
  69. #define PT64_NX_MASK (1ULL << 63)
  70. #define PT_PAT_SHIFT 7
  71. #define PT_DIR_PAT_SHIFT 12
  72. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  73. #define PT32_DIR_PSE36_SIZE 4
  74. #define PT32_DIR_PSE36_SHIFT 13
  75. #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  76. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  77. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  78. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  79. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  80. #define PT64_LEVEL_BITS 9
  81. #define PT64_LEVEL_SHIFT(level) \
  82. ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
  83. #define PT64_LEVEL_MASK(level) \
  84. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  85. #define PT64_INDEX(address, level)\
  86. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  87. #define PT32_LEVEL_BITS 10
  88. #define PT32_LEVEL_SHIFT(level) \
  89. ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
  90. #define PT32_LEVEL_MASK(level) \
  91. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  92. #define PT32_INDEX(address, level)\
  93. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  94. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  95. #define PT64_DIR_BASE_ADDR_MASK \
  96. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  97. #define PT32_BASE_ADDR_MASK PAGE_MASK
  98. #define PT32_DIR_BASE_ADDR_MASK \
  99. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  100. #define PFERR_PRESENT_MASK (1U << 0)
  101. #define PFERR_WRITE_MASK (1U << 1)
  102. #define PFERR_USER_MASK (1U << 2)
  103. #define PFERR_FETCH_MASK (1U << 4)
  104. #define PT64_ROOT_LEVEL 4
  105. #define PT32_ROOT_LEVEL 2
  106. #define PT32E_ROOT_LEVEL 3
  107. #define PT_DIRECTORY_LEVEL 2
  108. #define PT_PAGE_TABLE_LEVEL 1
  109. #define RMAP_EXT 4
  110. struct kvm_rmap_desc {
  111. u64 *shadow_ptes[RMAP_EXT];
  112. struct kvm_rmap_desc *more;
  113. };
  114. static struct kmem_cache *pte_chain_cache;
  115. static struct kmem_cache *rmap_desc_cache;
  116. static struct kmem_cache *mmu_page_header_cache;
  117. static int is_write_protection(struct kvm_vcpu *vcpu)
  118. {
  119. return vcpu->cr0 & X86_CR0_WP;
  120. }
  121. static int is_cpuid_PSE36(void)
  122. {
  123. return 1;
  124. }
  125. static int is_nx(struct kvm_vcpu *vcpu)
  126. {
  127. return vcpu->shadow_efer & EFER_NX;
  128. }
  129. static int is_present_pte(unsigned long pte)
  130. {
  131. return pte & PT_PRESENT_MASK;
  132. }
  133. static int is_writeble_pte(unsigned long pte)
  134. {
  135. return pte & PT_WRITABLE_MASK;
  136. }
  137. static int is_io_pte(unsigned long pte)
  138. {
  139. return pte & PT_SHADOW_IO_MARK;
  140. }
  141. static int is_rmap_pte(u64 pte)
  142. {
  143. return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
  144. == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
  145. }
  146. static void set_shadow_pte(u64 *sptep, u64 spte)
  147. {
  148. #ifdef CONFIG_X86_64
  149. set_64bit((unsigned long *)sptep, spte);
  150. #else
  151. set_64bit((unsigned long long *)sptep, spte);
  152. #endif
  153. }
  154. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  155. struct kmem_cache *base_cache, int min)
  156. {
  157. void *obj;
  158. if (cache->nobjs >= min)
  159. return 0;
  160. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  161. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  162. if (!obj)
  163. return -ENOMEM;
  164. cache->objects[cache->nobjs++] = obj;
  165. }
  166. return 0;
  167. }
  168. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  169. {
  170. while (mc->nobjs)
  171. kfree(mc->objects[--mc->nobjs]);
  172. }
  173. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  174. int min)
  175. {
  176. struct page *page;
  177. if (cache->nobjs >= min)
  178. return 0;
  179. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  180. page = alloc_page(GFP_KERNEL);
  181. if (!page)
  182. return -ENOMEM;
  183. set_page_private(page, 0);
  184. cache->objects[cache->nobjs++] = page_address(page);
  185. }
  186. return 0;
  187. }
  188. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  189. {
  190. while (mc->nobjs)
  191. free_page((unsigned long)mc->objects[--mc->nobjs]);
  192. }
  193. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  194. {
  195. int r;
  196. kvm_mmu_free_some_pages(vcpu);
  197. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  198. pte_chain_cache, 4);
  199. if (r)
  200. goto out;
  201. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  202. rmap_desc_cache, 1);
  203. if (r)
  204. goto out;
  205. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 4);
  206. if (r)
  207. goto out;
  208. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  209. mmu_page_header_cache, 4);
  210. out:
  211. return r;
  212. }
  213. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  214. {
  215. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  216. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  217. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  218. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  219. }
  220. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  221. size_t size)
  222. {
  223. void *p;
  224. BUG_ON(!mc->nobjs);
  225. p = mc->objects[--mc->nobjs];
  226. memset(p, 0, size);
  227. return p;
  228. }
  229. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  230. {
  231. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  232. sizeof(struct kvm_pte_chain));
  233. }
  234. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  235. {
  236. kfree(pc);
  237. }
  238. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  239. {
  240. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  241. sizeof(struct kvm_rmap_desc));
  242. }
  243. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  244. {
  245. kfree(rd);
  246. }
  247. /*
  248. * Reverse mapping data structures:
  249. *
  250. * If page->private bit zero is zero, then page->private points to the
  251. * shadow page table entry that points to page_address(page).
  252. *
  253. * If page->private bit zero is one, (then page->private & ~1) points
  254. * to a struct kvm_rmap_desc containing more mappings.
  255. */
  256. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
  257. {
  258. struct page *page;
  259. struct kvm_rmap_desc *desc;
  260. int i;
  261. if (!is_rmap_pte(*spte))
  262. return;
  263. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  264. if (!page_private(page)) {
  265. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  266. set_page_private(page,(unsigned long)spte);
  267. } else if (!(page_private(page) & 1)) {
  268. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  269. desc = mmu_alloc_rmap_desc(vcpu);
  270. desc->shadow_ptes[0] = (u64 *)page_private(page);
  271. desc->shadow_ptes[1] = spte;
  272. set_page_private(page,(unsigned long)desc | 1);
  273. } else {
  274. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  275. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  276. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  277. desc = desc->more;
  278. if (desc->shadow_ptes[RMAP_EXT-1]) {
  279. desc->more = mmu_alloc_rmap_desc(vcpu);
  280. desc = desc->more;
  281. }
  282. for (i = 0; desc->shadow_ptes[i]; ++i)
  283. ;
  284. desc->shadow_ptes[i] = spte;
  285. }
  286. }
  287. static void rmap_desc_remove_entry(struct page *page,
  288. struct kvm_rmap_desc *desc,
  289. int i,
  290. struct kvm_rmap_desc *prev_desc)
  291. {
  292. int j;
  293. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  294. ;
  295. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  296. desc->shadow_ptes[j] = NULL;
  297. if (j != 0)
  298. return;
  299. if (!prev_desc && !desc->more)
  300. set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
  301. else
  302. if (prev_desc)
  303. prev_desc->more = desc->more;
  304. else
  305. set_page_private(page,(unsigned long)desc->more | 1);
  306. mmu_free_rmap_desc(desc);
  307. }
  308. static void rmap_remove(u64 *spte)
  309. {
  310. struct page *page;
  311. struct kvm_rmap_desc *desc;
  312. struct kvm_rmap_desc *prev_desc;
  313. int i;
  314. if (!is_rmap_pte(*spte))
  315. return;
  316. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  317. if (!page_private(page)) {
  318. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  319. BUG();
  320. } else if (!(page_private(page) & 1)) {
  321. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  322. if ((u64 *)page_private(page) != spte) {
  323. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  324. spte, *spte);
  325. BUG();
  326. }
  327. set_page_private(page,0);
  328. } else {
  329. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  330. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  331. prev_desc = NULL;
  332. while (desc) {
  333. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  334. if (desc->shadow_ptes[i] == spte) {
  335. rmap_desc_remove_entry(page,
  336. desc, i,
  337. prev_desc);
  338. return;
  339. }
  340. prev_desc = desc;
  341. desc = desc->more;
  342. }
  343. BUG();
  344. }
  345. }
  346. static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
  347. {
  348. struct kvm *kvm = vcpu->kvm;
  349. struct page *page;
  350. struct kvm_rmap_desc *desc;
  351. u64 *spte;
  352. page = gfn_to_page(kvm, gfn);
  353. BUG_ON(!page);
  354. while (page_private(page)) {
  355. if (!(page_private(page) & 1))
  356. spte = (u64 *)page_private(page);
  357. else {
  358. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  359. spte = desc->shadow_ptes[0];
  360. }
  361. BUG_ON(!spte);
  362. BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
  363. != page_to_pfn(page));
  364. BUG_ON(!(*spte & PT_PRESENT_MASK));
  365. BUG_ON(!(*spte & PT_WRITABLE_MASK));
  366. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  367. rmap_remove(spte);
  368. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  369. kvm_flush_remote_tlbs(vcpu->kvm);
  370. }
  371. }
  372. #ifdef MMU_DEBUG
  373. static int is_empty_shadow_page(u64 *spt)
  374. {
  375. u64 *pos;
  376. u64 *end;
  377. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  378. if (*pos != 0) {
  379. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  380. pos, *pos);
  381. return 0;
  382. }
  383. return 1;
  384. }
  385. #endif
  386. static void kvm_mmu_free_page(struct kvm *kvm,
  387. struct kvm_mmu_page *page_head)
  388. {
  389. ASSERT(is_empty_shadow_page(page_head->spt));
  390. list_del(&page_head->link);
  391. __free_page(virt_to_page(page_head->spt));
  392. kfree(page_head);
  393. ++kvm->n_free_mmu_pages;
  394. }
  395. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  396. {
  397. return gfn;
  398. }
  399. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  400. u64 *parent_pte)
  401. {
  402. struct kvm_mmu_page *page;
  403. if (!vcpu->kvm->n_free_mmu_pages)
  404. return NULL;
  405. page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
  406. sizeof *page);
  407. page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  408. set_page_private(virt_to_page(page->spt), (unsigned long)page);
  409. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  410. ASSERT(is_empty_shadow_page(page->spt));
  411. page->slot_bitmap = 0;
  412. page->multimapped = 0;
  413. page->parent_pte = parent_pte;
  414. --vcpu->kvm->n_free_mmu_pages;
  415. return page;
  416. }
  417. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  418. struct kvm_mmu_page *page, u64 *parent_pte)
  419. {
  420. struct kvm_pte_chain *pte_chain;
  421. struct hlist_node *node;
  422. int i;
  423. if (!parent_pte)
  424. return;
  425. if (!page->multimapped) {
  426. u64 *old = page->parent_pte;
  427. if (!old) {
  428. page->parent_pte = parent_pte;
  429. return;
  430. }
  431. page->multimapped = 1;
  432. pte_chain = mmu_alloc_pte_chain(vcpu);
  433. INIT_HLIST_HEAD(&page->parent_ptes);
  434. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  435. pte_chain->parent_ptes[0] = old;
  436. }
  437. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  438. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  439. continue;
  440. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  441. if (!pte_chain->parent_ptes[i]) {
  442. pte_chain->parent_ptes[i] = parent_pte;
  443. return;
  444. }
  445. }
  446. pte_chain = mmu_alloc_pte_chain(vcpu);
  447. BUG_ON(!pte_chain);
  448. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  449. pte_chain->parent_ptes[0] = parent_pte;
  450. }
  451. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
  452. u64 *parent_pte)
  453. {
  454. struct kvm_pte_chain *pte_chain;
  455. struct hlist_node *node;
  456. int i;
  457. if (!page->multimapped) {
  458. BUG_ON(page->parent_pte != parent_pte);
  459. page->parent_pte = NULL;
  460. return;
  461. }
  462. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  463. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  464. if (!pte_chain->parent_ptes[i])
  465. break;
  466. if (pte_chain->parent_ptes[i] != parent_pte)
  467. continue;
  468. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  469. && pte_chain->parent_ptes[i + 1]) {
  470. pte_chain->parent_ptes[i]
  471. = pte_chain->parent_ptes[i + 1];
  472. ++i;
  473. }
  474. pte_chain->parent_ptes[i] = NULL;
  475. if (i == 0) {
  476. hlist_del(&pte_chain->link);
  477. mmu_free_pte_chain(pte_chain);
  478. if (hlist_empty(&page->parent_ptes)) {
  479. page->multimapped = 0;
  480. page->parent_pte = NULL;
  481. }
  482. }
  483. return;
  484. }
  485. BUG();
  486. }
  487. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
  488. gfn_t gfn)
  489. {
  490. unsigned index;
  491. struct hlist_head *bucket;
  492. struct kvm_mmu_page *page;
  493. struct hlist_node *node;
  494. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  495. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  496. bucket = &vcpu->kvm->mmu_page_hash[index];
  497. hlist_for_each_entry(page, node, bucket, hash_link)
  498. if (page->gfn == gfn && !page->role.metaphysical) {
  499. pgprintk("%s: found role %x\n",
  500. __FUNCTION__, page->role.word);
  501. return page;
  502. }
  503. return NULL;
  504. }
  505. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  506. gfn_t gfn,
  507. gva_t gaddr,
  508. unsigned level,
  509. int metaphysical,
  510. unsigned hugepage_access,
  511. u64 *parent_pte)
  512. {
  513. union kvm_mmu_page_role role;
  514. unsigned index;
  515. unsigned quadrant;
  516. struct hlist_head *bucket;
  517. struct kvm_mmu_page *page;
  518. struct hlist_node *node;
  519. role.word = 0;
  520. role.glevels = vcpu->mmu.root_level;
  521. role.level = level;
  522. role.metaphysical = metaphysical;
  523. role.hugepage_access = hugepage_access;
  524. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  525. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  526. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  527. role.quadrant = quadrant;
  528. }
  529. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  530. gfn, role.word);
  531. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  532. bucket = &vcpu->kvm->mmu_page_hash[index];
  533. hlist_for_each_entry(page, node, bucket, hash_link)
  534. if (page->gfn == gfn && page->role.word == role.word) {
  535. mmu_page_add_parent_pte(vcpu, page, parent_pte);
  536. pgprintk("%s: found\n", __FUNCTION__);
  537. return page;
  538. }
  539. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  540. if (!page)
  541. return page;
  542. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  543. page->gfn = gfn;
  544. page->role = role;
  545. hlist_add_head(&page->hash_link, bucket);
  546. if (!metaphysical)
  547. rmap_write_protect(vcpu, gfn);
  548. return page;
  549. }
  550. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  551. struct kvm_mmu_page *page)
  552. {
  553. unsigned i;
  554. u64 *pt;
  555. u64 ent;
  556. pt = page->spt;
  557. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  558. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  559. if (pt[i] & PT_PRESENT_MASK)
  560. rmap_remove(&pt[i]);
  561. pt[i] = 0;
  562. }
  563. kvm_flush_remote_tlbs(kvm);
  564. return;
  565. }
  566. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  567. ent = pt[i];
  568. pt[i] = 0;
  569. if (!(ent & PT_PRESENT_MASK))
  570. continue;
  571. ent &= PT64_BASE_ADDR_MASK;
  572. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  573. }
  574. kvm_flush_remote_tlbs(kvm);
  575. }
  576. static void kvm_mmu_put_page(struct kvm_mmu_page *page,
  577. u64 *parent_pte)
  578. {
  579. mmu_page_remove_parent_pte(page, parent_pte);
  580. }
  581. static void kvm_mmu_zap_page(struct kvm *kvm,
  582. struct kvm_mmu_page *page)
  583. {
  584. u64 *parent_pte;
  585. while (page->multimapped || page->parent_pte) {
  586. if (!page->multimapped)
  587. parent_pte = page->parent_pte;
  588. else {
  589. struct kvm_pte_chain *chain;
  590. chain = container_of(page->parent_ptes.first,
  591. struct kvm_pte_chain, link);
  592. parent_pte = chain->parent_ptes[0];
  593. }
  594. BUG_ON(!parent_pte);
  595. kvm_mmu_put_page(page, parent_pte);
  596. set_shadow_pte(parent_pte, 0);
  597. }
  598. kvm_mmu_page_unlink_children(kvm, page);
  599. if (!page->root_count) {
  600. hlist_del(&page->hash_link);
  601. kvm_mmu_free_page(kvm, page);
  602. } else
  603. list_move(&page->link, &kvm->active_mmu_pages);
  604. }
  605. static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  606. {
  607. unsigned index;
  608. struct hlist_head *bucket;
  609. struct kvm_mmu_page *page;
  610. struct hlist_node *node, *n;
  611. int r;
  612. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  613. r = 0;
  614. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  615. bucket = &vcpu->kvm->mmu_page_hash[index];
  616. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  617. if (page->gfn == gfn && !page->role.metaphysical) {
  618. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  619. page->role.word);
  620. kvm_mmu_zap_page(vcpu->kvm, page);
  621. r = 1;
  622. }
  623. return r;
  624. }
  625. static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
  626. {
  627. struct kvm_mmu_page *page;
  628. while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
  629. pgprintk("%s: zap %lx %x\n",
  630. __FUNCTION__, gfn, page->role.word);
  631. kvm_mmu_zap_page(vcpu->kvm, page);
  632. }
  633. }
  634. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  635. {
  636. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  637. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  638. __set_bit(slot, &page_head->slot_bitmap);
  639. }
  640. hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  641. {
  642. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  643. return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
  644. }
  645. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  646. {
  647. struct page *page;
  648. ASSERT((gpa & HPA_ERR_MASK) == 0);
  649. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  650. if (!page)
  651. return gpa | HPA_ERR_MASK;
  652. return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
  653. | (gpa & (PAGE_SIZE-1));
  654. }
  655. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  656. {
  657. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  658. if (gpa == UNMAPPED_GVA)
  659. return UNMAPPED_GVA;
  660. return gpa_to_hpa(vcpu, gpa);
  661. }
  662. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  663. {
  664. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  665. if (gpa == UNMAPPED_GVA)
  666. return NULL;
  667. return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
  668. }
  669. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  670. {
  671. }
  672. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  673. {
  674. int level = PT32E_ROOT_LEVEL;
  675. hpa_t table_addr = vcpu->mmu.root_hpa;
  676. for (; ; level--) {
  677. u32 index = PT64_INDEX(v, level);
  678. u64 *table;
  679. u64 pte;
  680. ASSERT(VALID_PAGE(table_addr));
  681. table = __va(table_addr);
  682. if (level == 1) {
  683. pte = table[index];
  684. if (is_present_pte(pte) && is_writeble_pte(pte))
  685. return 0;
  686. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  687. page_header_update_slot(vcpu->kvm, table, v);
  688. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  689. PT_USER_MASK;
  690. rmap_add(vcpu, &table[index]);
  691. return 0;
  692. }
  693. if (table[index] == 0) {
  694. struct kvm_mmu_page *new_table;
  695. gfn_t pseudo_gfn;
  696. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  697. >> PAGE_SHIFT;
  698. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  699. v, level - 1,
  700. 1, 0, &table[index]);
  701. if (!new_table) {
  702. pgprintk("nonpaging_map: ENOMEM\n");
  703. return -ENOMEM;
  704. }
  705. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  706. | PT_WRITABLE_MASK | PT_USER_MASK;
  707. }
  708. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  709. }
  710. }
  711. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  712. {
  713. int i;
  714. struct kvm_mmu_page *page;
  715. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  716. return;
  717. #ifdef CONFIG_X86_64
  718. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  719. hpa_t root = vcpu->mmu.root_hpa;
  720. page = page_header(root);
  721. --page->root_count;
  722. vcpu->mmu.root_hpa = INVALID_PAGE;
  723. return;
  724. }
  725. #endif
  726. for (i = 0; i < 4; ++i) {
  727. hpa_t root = vcpu->mmu.pae_root[i];
  728. if (root) {
  729. root &= PT64_BASE_ADDR_MASK;
  730. page = page_header(root);
  731. --page->root_count;
  732. }
  733. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  734. }
  735. vcpu->mmu.root_hpa = INVALID_PAGE;
  736. }
  737. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  738. {
  739. int i;
  740. gfn_t root_gfn;
  741. struct kvm_mmu_page *page;
  742. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  743. #ifdef CONFIG_X86_64
  744. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  745. hpa_t root = vcpu->mmu.root_hpa;
  746. ASSERT(!VALID_PAGE(root));
  747. page = kvm_mmu_get_page(vcpu, root_gfn, 0,
  748. PT64_ROOT_LEVEL, 0, 0, NULL);
  749. root = __pa(page->spt);
  750. ++page->root_count;
  751. vcpu->mmu.root_hpa = root;
  752. return;
  753. }
  754. #endif
  755. for (i = 0; i < 4; ++i) {
  756. hpa_t root = vcpu->mmu.pae_root[i];
  757. ASSERT(!VALID_PAGE(root));
  758. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  759. if (!is_present_pte(vcpu->pdptrs[i])) {
  760. vcpu->mmu.pae_root[i] = 0;
  761. continue;
  762. }
  763. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  764. } else if (vcpu->mmu.root_level == 0)
  765. root_gfn = 0;
  766. page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  767. PT32_ROOT_LEVEL, !is_paging(vcpu),
  768. 0, NULL);
  769. root = __pa(page->spt);
  770. ++page->root_count;
  771. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  772. }
  773. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  774. }
  775. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  776. {
  777. return vaddr;
  778. }
  779. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  780. u32 error_code)
  781. {
  782. gpa_t addr = gva;
  783. hpa_t paddr;
  784. int r;
  785. r = mmu_topup_memory_caches(vcpu);
  786. if (r)
  787. return r;
  788. ASSERT(vcpu);
  789. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  790. paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
  791. if (is_error_hpa(paddr))
  792. return 1;
  793. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  794. }
  795. static void nonpaging_free(struct kvm_vcpu *vcpu)
  796. {
  797. mmu_free_roots(vcpu);
  798. }
  799. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  800. {
  801. struct kvm_mmu *context = &vcpu->mmu;
  802. context->new_cr3 = nonpaging_new_cr3;
  803. context->page_fault = nonpaging_page_fault;
  804. context->gva_to_gpa = nonpaging_gva_to_gpa;
  805. context->free = nonpaging_free;
  806. context->root_level = 0;
  807. context->shadow_root_level = PT32E_ROOT_LEVEL;
  808. context->root_hpa = INVALID_PAGE;
  809. return 0;
  810. }
  811. static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  812. {
  813. ++vcpu->stat.tlb_flush;
  814. kvm_x86_ops->tlb_flush(vcpu);
  815. }
  816. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  817. {
  818. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  819. mmu_free_roots(vcpu);
  820. }
  821. static void inject_page_fault(struct kvm_vcpu *vcpu,
  822. u64 addr,
  823. u32 err_code)
  824. {
  825. kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
  826. }
  827. static void paging_free(struct kvm_vcpu *vcpu)
  828. {
  829. nonpaging_free(vcpu);
  830. }
  831. #define PTTYPE 64
  832. #include "paging_tmpl.h"
  833. #undef PTTYPE
  834. #define PTTYPE 32
  835. #include "paging_tmpl.h"
  836. #undef PTTYPE
  837. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  838. {
  839. struct kvm_mmu *context = &vcpu->mmu;
  840. ASSERT(is_pae(vcpu));
  841. context->new_cr3 = paging_new_cr3;
  842. context->page_fault = paging64_page_fault;
  843. context->gva_to_gpa = paging64_gva_to_gpa;
  844. context->free = paging_free;
  845. context->root_level = level;
  846. context->shadow_root_level = level;
  847. context->root_hpa = INVALID_PAGE;
  848. return 0;
  849. }
  850. static int paging64_init_context(struct kvm_vcpu *vcpu)
  851. {
  852. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  853. }
  854. static int paging32_init_context(struct kvm_vcpu *vcpu)
  855. {
  856. struct kvm_mmu *context = &vcpu->mmu;
  857. context->new_cr3 = paging_new_cr3;
  858. context->page_fault = paging32_page_fault;
  859. context->gva_to_gpa = paging32_gva_to_gpa;
  860. context->free = paging_free;
  861. context->root_level = PT32_ROOT_LEVEL;
  862. context->shadow_root_level = PT32E_ROOT_LEVEL;
  863. context->root_hpa = INVALID_PAGE;
  864. return 0;
  865. }
  866. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  867. {
  868. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  869. }
  870. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  871. {
  872. ASSERT(vcpu);
  873. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  874. if (!is_paging(vcpu))
  875. return nonpaging_init_context(vcpu);
  876. else if (is_long_mode(vcpu))
  877. return paging64_init_context(vcpu);
  878. else if (is_pae(vcpu))
  879. return paging32E_init_context(vcpu);
  880. else
  881. return paging32_init_context(vcpu);
  882. }
  883. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  884. {
  885. ASSERT(vcpu);
  886. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  887. vcpu->mmu.free(vcpu);
  888. vcpu->mmu.root_hpa = INVALID_PAGE;
  889. }
  890. }
  891. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  892. {
  893. destroy_kvm_mmu(vcpu);
  894. return init_kvm_mmu(vcpu);
  895. }
  896. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  897. {
  898. int r;
  899. mutex_lock(&vcpu->kvm->lock);
  900. r = mmu_topup_memory_caches(vcpu);
  901. if (r)
  902. goto out;
  903. mmu_alloc_roots(vcpu);
  904. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  905. kvm_mmu_flush_tlb(vcpu);
  906. out:
  907. mutex_unlock(&vcpu->kvm->lock);
  908. return r;
  909. }
  910. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  911. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  912. {
  913. mmu_free_roots(vcpu);
  914. }
  915. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  916. struct kvm_mmu_page *page,
  917. u64 *spte)
  918. {
  919. u64 pte;
  920. struct kvm_mmu_page *child;
  921. pte = *spte;
  922. if (is_present_pte(pte)) {
  923. if (page->role.level == PT_PAGE_TABLE_LEVEL)
  924. rmap_remove(spte);
  925. else {
  926. child = page_header(pte & PT64_BASE_ADDR_MASK);
  927. mmu_page_remove_parent_pte(child, spte);
  928. }
  929. }
  930. *spte = 0;
  931. kvm_flush_remote_tlbs(vcpu->kvm);
  932. }
  933. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  934. struct kvm_mmu_page *page,
  935. u64 *spte,
  936. const void *new, int bytes)
  937. {
  938. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  939. return;
  940. if (page->role.glevels == PT32_ROOT_LEVEL)
  941. paging32_update_pte(vcpu, page, spte, new, bytes);
  942. else
  943. paging64_update_pte(vcpu, page, spte, new, bytes);
  944. }
  945. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  946. const u8 *new, int bytes)
  947. {
  948. gfn_t gfn = gpa >> PAGE_SHIFT;
  949. struct kvm_mmu_page *page;
  950. struct hlist_node *node, *n;
  951. struct hlist_head *bucket;
  952. unsigned index;
  953. u64 *spte;
  954. unsigned offset = offset_in_page(gpa);
  955. unsigned pte_size;
  956. unsigned page_offset;
  957. unsigned misaligned;
  958. unsigned quadrant;
  959. int level;
  960. int flooded = 0;
  961. int npte;
  962. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  963. if (gfn == vcpu->last_pt_write_gfn) {
  964. ++vcpu->last_pt_write_count;
  965. if (vcpu->last_pt_write_count >= 3)
  966. flooded = 1;
  967. } else {
  968. vcpu->last_pt_write_gfn = gfn;
  969. vcpu->last_pt_write_count = 1;
  970. }
  971. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  972. bucket = &vcpu->kvm->mmu_page_hash[index];
  973. hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
  974. if (page->gfn != gfn || page->role.metaphysical)
  975. continue;
  976. pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  977. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  978. misaligned |= bytes < 4;
  979. if (misaligned || flooded) {
  980. /*
  981. * Misaligned accesses are too much trouble to fix
  982. * up; also, they usually indicate a page is not used
  983. * as a page table.
  984. *
  985. * If we're seeing too many writes to a page,
  986. * it may no longer be a page table, or we may be
  987. * forking, in which case it is better to unmap the
  988. * page.
  989. */
  990. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  991. gpa, bytes, page->role.word);
  992. kvm_mmu_zap_page(vcpu->kvm, page);
  993. continue;
  994. }
  995. page_offset = offset;
  996. level = page->role.level;
  997. npte = 1;
  998. if (page->role.glevels == PT32_ROOT_LEVEL) {
  999. page_offset <<= 1; /* 32->64 */
  1000. /*
  1001. * A 32-bit pde maps 4MB while the shadow pdes map
  1002. * only 2MB. So we need to double the offset again
  1003. * and zap two pdes instead of one.
  1004. */
  1005. if (level == PT32_ROOT_LEVEL) {
  1006. page_offset &= ~7; /* kill rounding error */
  1007. page_offset <<= 1;
  1008. npte = 2;
  1009. }
  1010. quadrant = page_offset >> PAGE_SHIFT;
  1011. page_offset &= ~PAGE_MASK;
  1012. if (quadrant != page->role.quadrant)
  1013. continue;
  1014. }
  1015. spte = &page->spt[page_offset / sizeof(*spte)];
  1016. while (npte--) {
  1017. mmu_pte_write_zap_pte(vcpu, page, spte);
  1018. mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
  1019. ++spte;
  1020. }
  1021. }
  1022. }
  1023. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1024. {
  1025. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1026. return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
  1027. }
  1028. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1029. {
  1030. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1031. struct kvm_mmu_page *page;
  1032. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  1033. struct kvm_mmu_page, link);
  1034. kvm_mmu_zap_page(vcpu->kvm, page);
  1035. }
  1036. }
  1037. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1038. {
  1039. struct kvm_mmu_page *page;
  1040. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1041. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1042. struct kvm_mmu_page, link);
  1043. kvm_mmu_zap_page(vcpu->kvm, page);
  1044. }
  1045. free_page((unsigned long)vcpu->mmu.pae_root);
  1046. }
  1047. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1048. {
  1049. struct page *page;
  1050. int i;
  1051. ASSERT(vcpu);
  1052. vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
  1053. /*
  1054. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1055. * Therefore we need to allocate shadow page tables in the first
  1056. * 4GB of memory, which happens to fit the DMA32 zone.
  1057. */
  1058. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1059. if (!page)
  1060. goto error_1;
  1061. vcpu->mmu.pae_root = page_address(page);
  1062. for (i = 0; i < 4; ++i)
  1063. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1064. return 0;
  1065. error_1:
  1066. free_mmu_pages(vcpu);
  1067. return -ENOMEM;
  1068. }
  1069. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1070. {
  1071. ASSERT(vcpu);
  1072. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1073. return alloc_mmu_pages(vcpu);
  1074. }
  1075. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1076. {
  1077. ASSERT(vcpu);
  1078. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1079. return init_kvm_mmu(vcpu);
  1080. }
  1081. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1082. {
  1083. ASSERT(vcpu);
  1084. destroy_kvm_mmu(vcpu);
  1085. free_mmu_pages(vcpu);
  1086. mmu_free_memory_caches(vcpu);
  1087. }
  1088. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1089. {
  1090. struct kvm_mmu_page *page;
  1091. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  1092. int i;
  1093. u64 *pt;
  1094. if (!test_bit(slot, &page->slot_bitmap))
  1095. continue;
  1096. pt = page->spt;
  1097. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1098. /* avoid RMW */
  1099. if (pt[i] & PT_WRITABLE_MASK) {
  1100. rmap_remove(&pt[i]);
  1101. pt[i] &= ~PT_WRITABLE_MASK;
  1102. }
  1103. }
  1104. }
  1105. void kvm_mmu_zap_all(struct kvm *kvm)
  1106. {
  1107. struct kvm_mmu_page *page, *node;
  1108. list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
  1109. kvm_mmu_zap_page(kvm, page);
  1110. kvm_flush_remote_tlbs(kvm);
  1111. }
  1112. void kvm_mmu_module_exit(void)
  1113. {
  1114. if (pte_chain_cache)
  1115. kmem_cache_destroy(pte_chain_cache);
  1116. if (rmap_desc_cache)
  1117. kmem_cache_destroy(rmap_desc_cache);
  1118. if (mmu_page_header_cache)
  1119. kmem_cache_destroy(mmu_page_header_cache);
  1120. }
  1121. int kvm_mmu_module_init(void)
  1122. {
  1123. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1124. sizeof(struct kvm_pte_chain),
  1125. 0, 0, NULL);
  1126. if (!pte_chain_cache)
  1127. goto nomem;
  1128. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1129. sizeof(struct kvm_rmap_desc),
  1130. 0, 0, NULL);
  1131. if (!rmap_desc_cache)
  1132. goto nomem;
  1133. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1134. sizeof(struct kvm_mmu_page),
  1135. 0, 0, NULL);
  1136. if (!mmu_page_header_cache)
  1137. goto nomem;
  1138. return 0;
  1139. nomem:
  1140. kvm_mmu_module_exit();
  1141. return -ENOMEM;
  1142. }
  1143. #ifdef AUDIT
  1144. static const char *audit_msg;
  1145. static gva_t canonicalize(gva_t gva)
  1146. {
  1147. #ifdef CONFIG_X86_64
  1148. gva = (long long)(gva << 16) >> 16;
  1149. #endif
  1150. return gva;
  1151. }
  1152. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1153. gva_t va, int level)
  1154. {
  1155. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1156. int i;
  1157. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1158. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1159. u64 ent = pt[i];
  1160. if (!(ent & PT_PRESENT_MASK))
  1161. continue;
  1162. va = canonicalize(va);
  1163. if (level > 1)
  1164. audit_mappings_page(vcpu, ent, va, level - 1);
  1165. else {
  1166. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1167. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  1168. if ((ent & PT_PRESENT_MASK)
  1169. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1170. printk(KERN_ERR "audit error: (%s) levels %d"
  1171. " gva %lx gpa %llx hpa %llx ent %llx\n",
  1172. audit_msg, vcpu->mmu.root_level,
  1173. va, gpa, hpa, ent);
  1174. }
  1175. }
  1176. }
  1177. static void audit_mappings(struct kvm_vcpu *vcpu)
  1178. {
  1179. unsigned i;
  1180. if (vcpu->mmu.root_level == 4)
  1181. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1182. else
  1183. for (i = 0; i < 4; ++i)
  1184. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1185. audit_mappings_page(vcpu,
  1186. vcpu->mmu.pae_root[i],
  1187. i << 30,
  1188. 2);
  1189. }
  1190. static int count_rmaps(struct kvm_vcpu *vcpu)
  1191. {
  1192. int nmaps = 0;
  1193. int i, j, k;
  1194. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1195. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1196. struct kvm_rmap_desc *d;
  1197. for (j = 0; j < m->npages; ++j) {
  1198. struct page *page = m->phys_mem[j];
  1199. if (!page->private)
  1200. continue;
  1201. if (!(page->private & 1)) {
  1202. ++nmaps;
  1203. continue;
  1204. }
  1205. d = (struct kvm_rmap_desc *)(page->private & ~1ul);
  1206. while (d) {
  1207. for (k = 0; k < RMAP_EXT; ++k)
  1208. if (d->shadow_ptes[k])
  1209. ++nmaps;
  1210. else
  1211. break;
  1212. d = d->more;
  1213. }
  1214. }
  1215. }
  1216. return nmaps;
  1217. }
  1218. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1219. {
  1220. int nmaps = 0;
  1221. struct kvm_mmu_page *page;
  1222. int i;
  1223. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1224. u64 *pt = page->spt;
  1225. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1226. continue;
  1227. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1228. u64 ent = pt[i];
  1229. if (!(ent & PT_PRESENT_MASK))
  1230. continue;
  1231. if (!(ent & PT_WRITABLE_MASK))
  1232. continue;
  1233. ++nmaps;
  1234. }
  1235. }
  1236. return nmaps;
  1237. }
  1238. static void audit_rmap(struct kvm_vcpu *vcpu)
  1239. {
  1240. int n_rmap = count_rmaps(vcpu);
  1241. int n_actual = count_writable_mappings(vcpu);
  1242. if (n_rmap != n_actual)
  1243. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1244. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1245. }
  1246. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1247. {
  1248. struct kvm_mmu_page *page;
  1249. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1250. hfn_t hfn;
  1251. struct page *pg;
  1252. if (page->role.metaphysical)
  1253. continue;
  1254. hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
  1255. >> PAGE_SHIFT;
  1256. pg = pfn_to_page(hfn);
  1257. if (pg->private)
  1258. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1259. " mappings: gfn %lx role %x\n",
  1260. __FUNCTION__, audit_msg, page->gfn,
  1261. page->role.word);
  1262. }
  1263. }
  1264. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1265. {
  1266. int olddbg = dbg;
  1267. dbg = 0;
  1268. audit_msg = msg;
  1269. audit_rmap(vcpu);
  1270. audit_write_protection(vcpu);
  1271. audit_mappings(vcpu);
  1272. dbg = olddbg;
  1273. }
  1274. #endif