ehca_irq.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888
  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * Functions for EQs, NEQs and interrupts
  5. *
  6. * Authors: Heiko J Schick <schickhj@de.ibm.com>
  7. * Khadija Souissi <souissi@de.ibm.com>
  8. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  9. * Joachim Fenkes <fenkes@de.ibm.com>
  10. *
  11. * Copyright (c) 2005 IBM Corporation
  12. *
  13. * All rights reserved.
  14. *
  15. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  16. * BSD.
  17. *
  18. * OpenIB BSD License
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions are met:
  22. *
  23. * Redistributions of source code must retain the above copyright notice, this
  24. * list of conditions and the following disclaimer.
  25. *
  26. * Redistributions in binary form must reproduce the above copyright notice,
  27. * this list of conditions and the following disclaimer in the documentation
  28. * and/or other materials
  29. * provided with the distribution.
  30. *
  31. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  32. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  33. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  34. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  35. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  36. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  37. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  38. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  39. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  40. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  41. * POSSIBILITY OF SUCH DAMAGE.
  42. */
  43. #include "ehca_classes.h"
  44. #include "ehca_irq.h"
  45. #include "ehca_iverbs.h"
  46. #include "ehca_tools.h"
  47. #include "hcp_if.h"
  48. #include "hipz_fns.h"
  49. #include "ipz_pt_fn.h"
  50. #define EQE_COMPLETION_EVENT EHCA_BMASK_IBM( 1, 1)
  51. #define EQE_CQ_QP_NUMBER EHCA_BMASK_IBM( 8, 31)
  52. #define EQE_EE_IDENTIFIER EHCA_BMASK_IBM( 2, 7)
  53. #define EQE_CQ_NUMBER EHCA_BMASK_IBM( 8, 31)
  54. #define EQE_QP_NUMBER EHCA_BMASK_IBM( 8, 31)
  55. #define EQE_QP_TOKEN EHCA_BMASK_IBM(32, 63)
  56. #define EQE_CQ_TOKEN EHCA_BMASK_IBM(32, 63)
  57. #define NEQE_COMPLETION_EVENT EHCA_BMASK_IBM( 1, 1)
  58. #define NEQE_EVENT_CODE EHCA_BMASK_IBM( 2, 7)
  59. #define NEQE_PORT_NUMBER EHCA_BMASK_IBM( 8, 15)
  60. #define NEQE_PORT_AVAILABILITY EHCA_BMASK_IBM(16, 16)
  61. #define NEQE_DISRUPTIVE EHCA_BMASK_IBM(16, 16)
  62. #define ERROR_DATA_LENGTH EHCA_BMASK_IBM(52, 63)
  63. #define ERROR_DATA_TYPE EHCA_BMASK_IBM( 0, 7)
  64. static void queue_comp_task(struct ehca_cq *__cq);
  65. static struct ehca_comp_pool *pool;
  66. static inline void comp_event_callback(struct ehca_cq *cq)
  67. {
  68. if (!cq->ib_cq.comp_handler)
  69. return;
  70. spin_lock(&cq->cb_lock);
  71. cq->ib_cq.comp_handler(&cq->ib_cq, cq->ib_cq.cq_context);
  72. spin_unlock(&cq->cb_lock);
  73. return;
  74. }
  75. static void print_error_data(struct ehca_shca *shca, void *data,
  76. u64 *rblock, int length)
  77. {
  78. u64 type = EHCA_BMASK_GET(ERROR_DATA_TYPE, rblock[2]);
  79. u64 resource = rblock[1];
  80. switch (type) {
  81. case 0x1: /* Queue Pair */
  82. {
  83. struct ehca_qp *qp = (struct ehca_qp *)data;
  84. /* only print error data if AER is set */
  85. if (rblock[6] == 0)
  86. return;
  87. ehca_err(&shca->ib_device,
  88. "QP 0x%x (resource=%lx) has errors.",
  89. qp->ib_qp.qp_num, resource);
  90. break;
  91. }
  92. case 0x4: /* Completion Queue */
  93. {
  94. struct ehca_cq *cq = (struct ehca_cq *)data;
  95. ehca_err(&shca->ib_device,
  96. "CQ 0x%x (resource=%lx) has errors.",
  97. cq->cq_number, resource);
  98. break;
  99. }
  100. default:
  101. ehca_err(&shca->ib_device,
  102. "Unknown error type: %lx on %s.",
  103. type, shca->ib_device.name);
  104. break;
  105. }
  106. ehca_err(&shca->ib_device, "Error data is available: %lx.", resource);
  107. ehca_err(&shca->ib_device, "EHCA ----- error data begin "
  108. "---------------------------------------------------");
  109. ehca_dmp(rblock, length, "resource=%lx", resource);
  110. ehca_err(&shca->ib_device, "EHCA ----- error data end "
  111. "----------------------------------------------------");
  112. return;
  113. }
  114. int ehca_error_data(struct ehca_shca *shca, void *data,
  115. u64 resource)
  116. {
  117. unsigned long ret;
  118. u64 *rblock;
  119. unsigned long block_count;
  120. rblock = ehca_alloc_fw_ctrlblock(GFP_ATOMIC);
  121. if (!rblock) {
  122. ehca_err(&shca->ib_device, "Cannot allocate rblock memory.");
  123. ret = -ENOMEM;
  124. goto error_data1;
  125. }
  126. /* rblock must be 4K aligned and should be 4K large */
  127. ret = hipz_h_error_data(shca->ipz_hca_handle,
  128. resource,
  129. rblock,
  130. &block_count);
  131. if (ret == H_R_STATE)
  132. ehca_err(&shca->ib_device,
  133. "No error data is available: %lx.", resource);
  134. else if (ret == H_SUCCESS) {
  135. int length;
  136. length = EHCA_BMASK_GET(ERROR_DATA_LENGTH, rblock[0]);
  137. if (length > EHCA_PAGESIZE)
  138. length = EHCA_PAGESIZE;
  139. print_error_data(shca, data, rblock, length);
  140. } else
  141. ehca_err(&shca->ib_device,
  142. "Error data could not be fetched: %lx", resource);
  143. ehca_free_fw_ctrlblock(rblock);
  144. error_data1:
  145. return ret;
  146. }
  147. static void dispatch_qp_event(struct ehca_shca *shca, struct ehca_qp *qp,
  148. enum ib_event_type event_type)
  149. {
  150. struct ib_event event;
  151. event.device = &shca->ib_device;
  152. event.event = event_type;
  153. if (qp->ext_type == EQPT_SRQ) {
  154. if (!qp->ib_srq.event_handler)
  155. return;
  156. event.element.srq = &qp->ib_srq;
  157. qp->ib_srq.event_handler(&event, qp->ib_srq.srq_context);
  158. } else {
  159. if (!qp->ib_qp.event_handler)
  160. return;
  161. event.element.qp = &qp->ib_qp;
  162. qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context);
  163. }
  164. }
  165. static void qp_event_callback(struct ehca_shca *shca, u64 eqe,
  166. enum ib_event_type event_type, int fatal)
  167. {
  168. struct ehca_qp *qp;
  169. u32 token = EHCA_BMASK_GET(EQE_QP_TOKEN, eqe);
  170. read_lock(&ehca_qp_idr_lock);
  171. qp = idr_find(&ehca_qp_idr, token);
  172. read_unlock(&ehca_qp_idr_lock);
  173. if (!qp)
  174. return;
  175. if (fatal)
  176. ehca_error_data(shca, qp, qp->ipz_qp_handle.handle);
  177. dispatch_qp_event(shca, qp, fatal && qp->ext_type == EQPT_SRQ ?
  178. IB_EVENT_SRQ_ERR : event_type);
  179. /*
  180. * eHCA only processes one WQE at a time for SRQ base QPs,
  181. * so the last WQE has been processed as soon as the QP enters
  182. * error state.
  183. */
  184. if (fatal && qp->ext_type == EQPT_SRQBASE)
  185. dispatch_qp_event(shca, qp, IB_EVENT_QP_LAST_WQE_REACHED);
  186. return;
  187. }
  188. static void cq_event_callback(struct ehca_shca *shca,
  189. u64 eqe)
  190. {
  191. struct ehca_cq *cq;
  192. u32 token = EHCA_BMASK_GET(EQE_CQ_TOKEN, eqe);
  193. read_lock(&ehca_cq_idr_lock);
  194. cq = idr_find(&ehca_cq_idr, token);
  195. if (cq)
  196. atomic_inc(&cq->nr_events);
  197. read_unlock(&ehca_cq_idr_lock);
  198. if (!cq)
  199. return;
  200. ehca_error_data(shca, cq, cq->ipz_cq_handle.handle);
  201. if (atomic_dec_and_test(&cq->nr_events))
  202. wake_up(&cq->wait_completion);
  203. return;
  204. }
  205. static void parse_identifier(struct ehca_shca *shca, u64 eqe)
  206. {
  207. u8 identifier = EHCA_BMASK_GET(EQE_EE_IDENTIFIER, eqe);
  208. switch (identifier) {
  209. case 0x02: /* path migrated */
  210. qp_event_callback(shca, eqe, IB_EVENT_PATH_MIG, 0);
  211. break;
  212. case 0x03: /* communication established */
  213. qp_event_callback(shca, eqe, IB_EVENT_COMM_EST, 0);
  214. break;
  215. case 0x04: /* send queue drained */
  216. qp_event_callback(shca, eqe, IB_EVENT_SQ_DRAINED, 0);
  217. break;
  218. case 0x05: /* QP error */
  219. case 0x06: /* QP error */
  220. qp_event_callback(shca, eqe, IB_EVENT_QP_FATAL, 1);
  221. break;
  222. case 0x07: /* CQ error */
  223. case 0x08: /* CQ error */
  224. cq_event_callback(shca, eqe);
  225. break;
  226. case 0x09: /* MRMWPTE error */
  227. ehca_err(&shca->ib_device, "MRMWPTE error.");
  228. break;
  229. case 0x0A: /* port event */
  230. ehca_err(&shca->ib_device, "Port event.");
  231. break;
  232. case 0x0B: /* MR access error */
  233. ehca_err(&shca->ib_device, "MR access error.");
  234. break;
  235. case 0x0C: /* EQ error */
  236. ehca_err(&shca->ib_device, "EQ error.");
  237. break;
  238. case 0x0D: /* P/Q_Key mismatch */
  239. ehca_err(&shca->ib_device, "P/Q_Key mismatch.");
  240. break;
  241. case 0x10: /* sampling complete */
  242. ehca_err(&shca->ib_device, "Sampling complete.");
  243. break;
  244. case 0x11: /* unaffiliated access error */
  245. ehca_err(&shca->ib_device, "Unaffiliated access error.");
  246. break;
  247. case 0x12: /* path migrating */
  248. ehca_err(&shca->ib_device, "Path migrating.");
  249. break;
  250. case 0x13: /* interface trace stopped */
  251. ehca_err(&shca->ib_device, "Interface trace stopped.");
  252. break;
  253. case 0x14: /* first error capture info available */
  254. ehca_info(&shca->ib_device, "First error capture available");
  255. break;
  256. case 0x15: /* SRQ limit reached */
  257. qp_event_callback(shca, eqe, IB_EVENT_SRQ_LIMIT_REACHED, 0);
  258. break;
  259. default:
  260. ehca_err(&shca->ib_device, "Unknown identifier: %x on %s.",
  261. identifier, shca->ib_device.name);
  262. break;
  263. }
  264. return;
  265. }
  266. static void dispatch_port_event(struct ehca_shca *shca, int port_num,
  267. enum ib_event_type type, const char *msg)
  268. {
  269. struct ib_event event;
  270. ehca_info(&shca->ib_device, "port %d %s.", port_num, msg);
  271. event.device = &shca->ib_device;
  272. event.event = type;
  273. event.element.port_num = port_num;
  274. ib_dispatch_event(&event);
  275. }
  276. static void notify_port_conf_change(struct ehca_shca *shca, int port_num)
  277. {
  278. struct ehca_sma_attr new_attr;
  279. struct ehca_sma_attr *old_attr = &shca->sport[port_num - 1].saved_attr;
  280. ehca_query_sma_attr(shca, port_num, &new_attr);
  281. if (new_attr.sm_sl != old_attr->sm_sl ||
  282. new_attr.sm_lid != old_attr->sm_lid)
  283. dispatch_port_event(shca, port_num, IB_EVENT_SM_CHANGE,
  284. "SM changed");
  285. if (new_attr.lid != old_attr->lid ||
  286. new_attr.lmc != old_attr->lmc)
  287. dispatch_port_event(shca, port_num, IB_EVENT_LID_CHANGE,
  288. "LID changed");
  289. if (new_attr.pkey_tbl_len != old_attr->pkey_tbl_len ||
  290. memcmp(new_attr.pkeys, old_attr->pkeys,
  291. sizeof(u16) * new_attr.pkey_tbl_len))
  292. dispatch_port_event(shca, port_num, IB_EVENT_PKEY_CHANGE,
  293. "P_Key changed");
  294. *old_attr = new_attr;
  295. }
  296. static void parse_ec(struct ehca_shca *shca, u64 eqe)
  297. {
  298. u8 ec = EHCA_BMASK_GET(NEQE_EVENT_CODE, eqe);
  299. u8 port = EHCA_BMASK_GET(NEQE_PORT_NUMBER, eqe);
  300. switch (ec) {
  301. case 0x30: /* port availability change */
  302. if (EHCA_BMASK_GET(NEQE_PORT_AVAILABILITY, eqe)) {
  303. shca->sport[port - 1].port_state = IB_PORT_ACTIVE;
  304. dispatch_port_event(shca, port, IB_EVENT_PORT_ACTIVE,
  305. "is active");
  306. ehca_query_sma_attr(shca, port,
  307. &shca->sport[port - 1].saved_attr);
  308. } else {
  309. shca->sport[port - 1].port_state = IB_PORT_DOWN;
  310. dispatch_port_event(shca, port, IB_EVENT_PORT_ERR,
  311. "is inactive");
  312. }
  313. break;
  314. case 0x31:
  315. /* port configuration change
  316. * disruptive change is caused by
  317. * LID, PKEY or SM change
  318. */
  319. if (EHCA_BMASK_GET(NEQE_DISRUPTIVE, eqe)) {
  320. ehca_warn(&shca->ib_device, "disruptive port "
  321. "%d configuration change", port);
  322. shca->sport[port - 1].port_state = IB_PORT_DOWN;
  323. dispatch_port_event(shca, port, IB_EVENT_PORT_ERR,
  324. "is inactive");
  325. shca->sport[port - 1].port_state = IB_PORT_ACTIVE;
  326. dispatch_port_event(shca, port, IB_EVENT_PORT_ACTIVE,
  327. "is active");
  328. } else
  329. notify_port_conf_change(shca, port);
  330. break;
  331. case 0x32: /* adapter malfunction */
  332. ehca_err(&shca->ib_device, "Adapter malfunction.");
  333. break;
  334. case 0x33: /* trace stopped */
  335. ehca_err(&shca->ib_device, "Traced stopped.");
  336. break;
  337. default:
  338. ehca_err(&shca->ib_device, "Unknown event code: %x on %s.",
  339. ec, shca->ib_device.name);
  340. break;
  341. }
  342. return;
  343. }
  344. static inline void reset_eq_pending(struct ehca_cq *cq)
  345. {
  346. u64 CQx_EP;
  347. struct h_galpa gal = cq->galpas.kernel;
  348. hipz_galpa_store_cq(gal, cqx_ep, 0x0);
  349. CQx_EP = hipz_galpa_load(gal, CQTEMM_OFFSET(cqx_ep));
  350. return;
  351. }
  352. irqreturn_t ehca_interrupt_neq(int irq, void *dev_id)
  353. {
  354. struct ehca_shca *shca = (struct ehca_shca*)dev_id;
  355. tasklet_hi_schedule(&shca->neq.interrupt_task);
  356. return IRQ_HANDLED;
  357. }
  358. void ehca_tasklet_neq(unsigned long data)
  359. {
  360. struct ehca_shca *shca = (struct ehca_shca*)data;
  361. struct ehca_eqe *eqe;
  362. u64 ret;
  363. eqe = (struct ehca_eqe *)ehca_poll_eq(shca, &shca->neq);
  364. while (eqe) {
  365. if (!EHCA_BMASK_GET(NEQE_COMPLETION_EVENT, eqe->entry))
  366. parse_ec(shca, eqe->entry);
  367. eqe = (struct ehca_eqe *)ehca_poll_eq(shca, &shca->neq);
  368. }
  369. ret = hipz_h_reset_event(shca->ipz_hca_handle,
  370. shca->neq.ipz_eq_handle, 0xFFFFFFFFFFFFFFFFL);
  371. if (ret != H_SUCCESS)
  372. ehca_err(&shca->ib_device, "Can't clear notification events.");
  373. return;
  374. }
  375. irqreturn_t ehca_interrupt_eq(int irq, void *dev_id)
  376. {
  377. struct ehca_shca *shca = (struct ehca_shca*)dev_id;
  378. tasklet_hi_schedule(&shca->eq.interrupt_task);
  379. return IRQ_HANDLED;
  380. }
  381. static inline void process_eqe(struct ehca_shca *shca, struct ehca_eqe *eqe)
  382. {
  383. u64 eqe_value;
  384. u32 token;
  385. struct ehca_cq *cq;
  386. eqe_value = eqe->entry;
  387. ehca_dbg(&shca->ib_device, "eqe_value=%lx", eqe_value);
  388. if (EHCA_BMASK_GET(EQE_COMPLETION_EVENT, eqe_value)) {
  389. ehca_dbg(&shca->ib_device, "Got completion event");
  390. token = EHCA_BMASK_GET(EQE_CQ_TOKEN, eqe_value);
  391. read_lock(&ehca_cq_idr_lock);
  392. cq = idr_find(&ehca_cq_idr, token);
  393. if (cq)
  394. atomic_inc(&cq->nr_events);
  395. read_unlock(&ehca_cq_idr_lock);
  396. if (cq == NULL) {
  397. ehca_err(&shca->ib_device,
  398. "Invalid eqe for non-existing cq token=%x",
  399. token);
  400. return;
  401. }
  402. reset_eq_pending(cq);
  403. if (ehca_scaling_code)
  404. queue_comp_task(cq);
  405. else {
  406. comp_event_callback(cq);
  407. if (atomic_dec_and_test(&cq->nr_events))
  408. wake_up(&cq->wait_completion);
  409. }
  410. } else {
  411. ehca_dbg(&shca->ib_device, "Got non completion event");
  412. parse_identifier(shca, eqe_value);
  413. }
  414. }
  415. void ehca_process_eq(struct ehca_shca *shca, int is_irq)
  416. {
  417. struct ehca_eq *eq = &shca->eq;
  418. struct ehca_eqe_cache_entry *eqe_cache = eq->eqe_cache;
  419. u64 eqe_value;
  420. unsigned long flags;
  421. int eqe_cnt, i;
  422. int eq_empty = 0;
  423. spin_lock_irqsave(&eq->irq_spinlock, flags);
  424. if (is_irq) {
  425. const int max_query_cnt = 100;
  426. int query_cnt = 0;
  427. int int_state = 1;
  428. do {
  429. int_state = hipz_h_query_int_state(
  430. shca->ipz_hca_handle, eq->ist);
  431. query_cnt++;
  432. iosync();
  433. } while (int_state && query_cnt < max_query_cnt);
  434. if (unlikely((query_cnt == max_query_cnt)))
  435. ehca_dbg(&shca->ib_device, "int_state=%x query_cnt=%x",
  436. int_state, query_cnt);
  437. }
  438. /* read out all eqes */
  439. eqe_cnt = 0;
  440. do {
  441. u32 token;
  442. eqe_cache[eqe_cnt].eqe =
  443. (struct ehca_eqe *)ehca_poll_eq(shca, eq);
  444. if (!eqe_cache[eqe_cnt].eqe)
  445. break;
  446. eqe_value = eqe_cache[eqe_cnt].eqe->entry;
  447. if (EHCA_BMASK_GET(EQE_COMPLETION_EVENT, eqe_value)) {
  448. token = EHCA_BMASK_GET(EQE_CQ_TOKEN, eqe_value);
  449. read_lock(&ehca_cq_idr_lock);
  450. eqe_cache[eqe_cnt].cq = idr_find(&ehca_cq_idr, token);
  451. if (eqe_cache[eqe_cnt].cq)
  452. atomic_inc(&eqe_cache[eqe_cnt].cq->nr_events);
  453. read_unlock(&ehca_cq_idr_lock);
  454. if (!eqe_cache[eqe_cnt].cq) {
  455. ehca_err(&shca->ib_device,
  456. "Invalid eqe for non-existing cq "
  457. "token=%x", token);
  458. continue;
  459. }
  460. } else
  461. eqe_cache[eqe_cnt].cq = NULL;
  462. eqe_cnt++;
  463. } while (eqe_cnt < EHCA_EQE_CACHE_SIZE);
  464. if (!eqe_cnt) {
  465. if (is_irq)
  466. ehca_dbg(&shca->ib_device,
  467. "No eqe found for irq event");
  468. goto unlock_irq_spinlock;
  469. } else if (!is_irq)
  470. ehca_dbg(&shca->ib_device, "deadman found %x eqe", eqe_cnt);
  471. if (unlikely(eqe_cnt == EHCA_EQE_CACHE_SIZE))
  472. ehca_dbg(&shca->ib_device, "too many eqes for one irq event");
  473. /* enable irq for new packets */
  474. for (i = 0; i < eqe_cnt; i++) {
  475. if (eq->eqe_cache[i].cq)
  476. reset_eq_pending(eq->eqe_cache[i].cq);
  477. }
  478. /* check eq */
  479. spin_lock(&eq->spinlock);
  480. eq_empty = (!ipz_eqit_eq_peek_valid(&shca->eq.ipz_queue));
  481. spin_unlock(&eq->spinlock);
  482. /* call completion handler for cached eqes */
  483. for (i = 0; i < eqe_cnt; i++)
  484. if (eq->eqe_cache[i].cq) {
  485. if (ehca_scaling_code)
  486. queue_comp_task(eq->eqe_cache[i].cq);
  487. else {
  488. struct ehca_cq *cq = eq->eqe_cache[i].cq;
  489. comp_event_callback(cq);
  490. if (atomic_dec_and_test(&cq->nr_events))
  491. wake_up(&cq->wait_completion);
  492. }
  493. } else {
  494. ehca_dbg(&shca->ib_device, "Got non completion event");
  495. parse_identifier(shca, eq->eqe_cache[i].eqe->entry);
  496. }
  497. /* poll eq if not empty */
  498. if (eq_empty)
  499. goto unlock_irq_spinlock;
  500. do {
  501. struct ehca_eqe *eqe;
  502. eqe = (struct ehca_eqe *)ehca_poll_eq(shca, &shca->eq);
  503. if (!eqe)
  504. break;
  505. process_eqe(shca, eqe);
  506. } while (1);
  507. unlock_irq_spinlock:
  508. spin_unlock_irqrestore(&eq->irq_spinlock, flags);
  509. }
  510. void ehca_tasklet_eq(unsigned long data)
  511. {
  512. ehca_process_eq((struct ehca_shca*)data, 1);
  513. }
  514. static inline int find_next_online_cpu(struct ehca_comp_pool *pool)
  515. {
  516. int cpu;
  517. unsigned long flags;
  518. WARN_ON_ONCE(!in_interrupt());
  519. if (ehca_debug_level)
  520. ehca_dmp(&cpu_online_map, sizeof(cpumask_t), "");
  521. spin_lock_irqsave(&pool->last_cpu_lock, flags);
  522. cpu = next_cpu(pool->last_cpu, cpu_online_map);
  523. if (cpu == NR_CPUS)
  524. cpu = first_cpu(cpu_online_map);
  525. pool->last_cpu = cpu;
  526. spin_unlock_irqrestore(&pool->last_cpu_lock, flags);
  527. return cpu;
  528. }
  529. static void __queue_comp_task(struct ehca_cq *__cq,
  530. struct ehca_cpu_comp_task *cct)
  531. {
  532. unsigned long flags;
  533. spin_lock_irqsave(&cct->task_lock, flags);
  534. spin_lock(&__cq->task_lock);
  535. if (__cq->nr_callbacks == 0) {
  536. __cq->nr_callbacks++;
  537. list_add_tail(&__cq->entry, &cct->cq_list);
  538. cct->cq_jobs++;
  539. wake_up(&cct->wait_queue);
  540. } else
  541. __cq->nr_callbacks++;
  542. spin_unlock(&__cq->task_lock);
  543. spin_unlock_irqrestore(&cct->task_lock, flags);
  544. }
  545. static void queue_comp_task(struct ehca_cq *__cq)
  546. {
  547. int cpu_id;
  548. struct ehca_cpu_comp_task *cct;
  549. int cq_jobs;
  550. unsigned long flags;
  551. cpu_id = find_next_online_cpu(pool);
  552. BUG_ON(!cpu_online(cpu_id));
  553. cct = per_cpu_ptr(pool->cpu_comp_tasks, cpu_id);
  554. BUG_ON(!cct);
  555. spin_lock_irqsave(&cct->task_lock, flags);
  556. cq_jobs = cct->cq_jobs;
  557. spin_unlock_irqrestore(&cct->task_lock, flags);
  558. if (cq_jobs > 0) {
  559. cpu_id = find_next_online_cpu(pool);
  560. cct = per_cpu_ptr(pool->cpu_comp_tasks, cpu_id);
  561. BUG_ON(!cct);
  562. }
  563. __queue_comp_task(__cq, cct);
  564. }
  565. static void run_comp_task(struct ehca_cpu_comp_task *cct)
  566. {
  567. struct ehca_cq *cq;
  568. unsigned long flags;
  569. spin_lock_irqsave(&cct->task_lock, flags);
  570. while (!list_empty(&cct->cq_list)) {
  571. cq = list_entry(cct->cq_list.next, struct ehca_cq, entry);
  572. spin_unlock_irqrestore(&cct->task_lock, flags);
  573. comp_event_callback(cq);
  574. if (atomic_dec_and_test(&cq->nr_events))
  575. wake_up(&cq->wait_completion);
  576. spin_lock_irqsave(&cct->task_lock, flags);
  577. spin_lock(&cq->task_lock);
  578. cq->nr_callbacks--;
  579. if (!cq->nr_callbacks) {
  580. list_del_init(cct->cq_list.next);
  581. cct->cq_jobs--;
  582. }
  583. spin_unlock(&cq->task_lock);
  584. }
  585. spin_unlock_irqrestore(&cct->task_lock, flags);
  586. }
  587. static int comp_task(void *__cct)
  588. {
  589. struct ehca_cpu_comp_task *cct = __cct;
  590. int cql_empty;
  591. DECLARE_WAITQUEUE(wait, current);
  592. set_current_state(TASK_INTERRUPTIBLE);
  593. while (!kthread_should_stop()) {
  594. add_wait_queue(&cct->wait_queue, &wait);
  595. spin_lock_irq(&cct->task_lock);
  596. cql_empty = list_empty(&cct->cq_list);
  597. spin_unlock_irq(&cct->task_lock);
  598. if (cql_empty)
  599. schedule();
  600. else
  601. __set_current_state(TASK_RUNNING);
  602. remove_wait_queue(&cct->wait_queue, &wait);
  603. spin_lock_irq(&cct->task_lock);
  604. cql_empty = list_empty(&cct->cq_list);
  605. spin_unlock_irq(&cct->task_lock);
  606. if (!cql_empty)
  607. run_comp_task(__cct);
  608. set_current_state(TASK_INTERRUPTIBLE);
  609. }
  610. __set_current_state(TASK_RUNNING);
  611. return 0;
  612. }
  613. static struct task_struct *create_comp_task(struct ehca_comp_pool *pool,
  614. int cpu)
  615. {
  616. struct ehca_cpu_comp_task *cct;
  617. cct = per_cpu_ptr(pool->cpu_comp_tasks, cpu);
  618. spin_lock_init(&cct->task_lock);
  619. INIT_LIST_HEAD(&cct->cq_list);
  620. init_waitqueue_head(&cct->wait_queue);
  621. cct->task = kthread_create(comp_task, cct, "ehca_comp/%d", cpu);
  622. return cct->task;
  623. }
  624. static void destroy_comp_task(struct ehca_comp_pool *pool,
  625. int cpu)
  626. {
  627. struct ehca_cpu_comp_task *cct;
  628. struct task_struct *task;
  629. unsigned long flags_cct;
  630. cct = per_cpu_ptr(pool->cpu_comp_tasks, cpu);
  631. spin_lock_irqsave(&cct->task_lock, flags_cct);
  632. task = cct->task;
  633. cct->task = NULL;
  634. cct->cq_jobs = 0;
  635. spin_unlock_irqrestore(&cct->task_lock, flags_cct);
  636. if (task)
  637. kthread_stop(task);
  638. }
  639. static void __cpuinit take_over_work(struct ehca_comp_pool *pool, int cpu)
  640. {
  641. struct ehca_cpu_comp_task *cct = per_cpu_ptr(pool->cpu_comp_tasks, cpu);
  642. LIST_HEAD(list);
  643. struct ehca_cq *cq;
  644. unsigned long flags_cct;
  645. spin_lock_irqsave(&cct->task_lock, flags_cct);
  646. list_splice_init(&cct->cq_list, &list);
  647. while (!list_empty(&list)) {
  648. cq = list_entry(cct->cq_list.next, struct ehca_cq, entry);
  649. list_del(&cq->entry);
  650. __queue_comp_task(cq, per_cpu_ptr(pool->cpu_comp_tasks,
  651. smp_processor_id()));
  652. }
  653. spin_unlock_irqrestore(&cct->task_lock, flags_cct);
  654. }
  655. static int __cpuinit comp_pool_callback(struct notifier_block *nfb,
  656. unsigned long action,
  657. void *hcpu)
  658. {
  659. unsigned int cpu = (unsigned long)hcpu;
  660. struct ehca_cpu_comp_task *cct;
  661. switch (action) {
  662. case CPU_UP_PREPARE:
  663. case CPU_UP_PREPARE_FROZEN:
  664. ehca_gen_dbg("CPU: %x (CPU_PREPARE)", cpu);
  665. if (!create_comp_task(pool, cpu)) {
  666. ehca_gen_err("Can't create comp_task for cpu: %x", cpu);
  667. return NOTIFY_BAD;
  668. }
  669. break;
  670. case CPU_UP_CANCELED:
  671. case CPU_UP_CANCELED_FROZEN:
  672. ehca_gen_dbg("CPU: %x (CPU_CANCELED)", cpu);
  673. cct = per_cpu_ptr(pool->cpu_comp_tasks, cpu);
  674. kthread_bind(cct->task, any_online_cpu(cpu_online_map));
  675. destroy_comp_task(pool, cpu);
  676. break;
  677. case CPU_ONLINE:
  678. case CPU_ONLINE_FROZEN:
  679. ehca_gen_dbg("CPU: %x (CPU_ONLINE)", cpu);
  680. cct = per_cpu_ptr(pool->cpu_comp_tasks, cpu);
  681. kthread_bind(cct->task, cpu);
  682. wake_up_process(cct->task);
  683. break;
  684. case CPU_DOWN_PREPARE:
  685. case CPU_DOWN_PREPARE_FROZEN:
  686. ehca_gen_dbg("CPU: %x (CPU_DOWN_PREPARE)", cpu);
  687. break;
  688. case CPU_DOWN_FAILED:
  689. case CPU_DOWN_FAILED_FROZEN:
  690. ehca_gen_dbg("CPU: %x (CPU_DOWN_FAILED)", cpu);
  691. break;
  692. case CPU_DEAD:
  693. case CPU_DEAD_FROZEN:
  694. ehca_gen_dbg("CPU: %x (CPU_DEAD)", cpu);
  695. destroy_comp_task(pool, cpu);
  696. take_over_work(pool, cpu);
  697. break;
  698. }
  699. return NOTIFY_OK;
  700. }
  701. static struct notifier_block comp_pool_callback_nb __cpuinitdata = {
  702. .notifier_call = comp_pool_callback,
  703. .priority = 0,
  704. };
  705. int ehca_create_comp_pool(void)
  706. {
  707. int cpu;
  708. struct task_struct *task;
  709. if (!ehca_scaling_code)
  710. return 0;
  711. pool = kzalloc(sizeof(struct ehca_comp_pool), GFP_KERNEL);
  712. if (pool == NULL)
  713. return -ENOMEM;
  714. spin_lock_init(&pool->last_cpu_lock);
  715. pool->last_cpu = any_online_cpu(cpu_online_map);
  716. pool->cpu_comp_tasks = alloc_percpu(struct ehca_cpu_comp_task);
  717. if (pool->cpu_comp_tasks == NULL) {
  718. kfree(pool);
  719. return -EINVAL;
  720. }
  721. for_each_online_cpu(cpu) {
  722. task = create_comp_task(pool, cpu);
  723. if (task) {
  724. kthread_bind(task, cpu);
  725. wake_up_process(task);
  726. }
  727. }
  728. register_hotcpu_notifier(&comp_pool_callback_nb);
  729. printk(KERN_INFO "eHCA scaling code enabled\n");
  730. return 0;
  731. }
  732. void ehca_destroy_comp_pool(void)
  733. {
  734. int i;
  735. if (!ehca_scaling_code)
  736. return;
  737. unregister_hotcpu_notifier(&comp_pool_callback_nb);
  738. for (i = 0; i < NR_CPUS; i++) {
  739. if (cpu_online(i))
  740. destroy_comp_task(pool, i);
  741. }
  742. free_percpu(pool->cpu_comp_tasks);
  743. kfree(pool);
  744. }