ioat_dca.c 6.7 KB

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  1. /*
  2. * Intel I/OAT DMA Linux driver
  3. * Copyright(c) 2007 Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17. *
  18. * The full GNU General Public License is included in this distribution in
  19. * the file called "COPYING".
  20. *
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/pci.h>
  24. #include <linux/smp.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/dca.h>
  27. /* either a kernel change is needed, or we need something like this in kernel */
  28. #ifndef CONFIG_SMP
  29. #include <asm/smp.h>
  30. #undef cpu_physical_id
  31. #define cpu_physical_id(cpu) (cpuid_ebx(1) >> 24)
  32. #endif
  33. #include "ioatdma.h"
  34. #include "ioatdma_registers.h"
  35. /*
  36. * Bit 16 of a tag map entry is the "valid" bit, if it is set then bits 0:15
  37. * contain the bit number of the APIC ID to map into the DCA tag. If the valid
  38. * bit is not set, then the value must be 0 or 1 and defines the bit in the tag.
  39. */
  40. #define DCA_TAG_MAP_VALID 0x80
  41. /*
  42. * "Legacy" DCA systems do not implement the DCA register set in the
  43. * I/OAT device. Software needs direct support for their tag mappings.
  44. */
  45. #define APICID_BIT(x) (DCA_TAG_MAP_VALID | (x))
  46. #define IOAT_TAG_MAP_LEN 8
  47. static u8 ioat_tag_map_BNB[IOAT_TAG_MAP_LEN] = {
  48. 1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
  49. static u8 ioat_tag_map_SCNB[IOAT_TAG_MAP_LEN] = {
  50. 1, APICID_BIT(1), APICID_BIT(2), APICID_BIT(2), };
  51. static u8 ioat_tag_map_CNB[IOAT_TAG_MAP_LEN] = {
  52. 1, APICID_BIT(1), APICID_BIT(3), APICID_BIT(4), APICID_BIT(2), };
  53. static u8 ioat_tag_map_UNISYS[IOAT_TAG_MAP_LEN] = { 0 };
  54. /* pack PCI B/D/F into a u16 */
  55. static inline u16 dcaid_from_pcidev(struct pci_dev *pci)
  56. {
  57. return (pci->bus->number << 8) | pci->devfn;
  58. }
  59. static int dca_enabled_in_bios(struct pci_dev *pdev)
  60. {
  61. /* CPUID level 9 returns DCA configuration */
  62. /* Bit 0 indicates DCA enabled by the BIOS */
  63. unsigned long cpuid_level_9;
  64. int res;
  65. cpuid_level_9 = cpuid_eax(9);
  66. res = test_bit(0, &cpuid_level_9);
  67. if (!res)
  68. dev_err(&pdev->dev, "DCA is disabled in BIOS\n");
  69. return res;
  70. }
  71. static int system_has_dca_enabled(struct pci_dev *pdev)
  72. {
  73. if (boot_cpu_has(X86_FEATURE_DCA))
  74. return dca_enabled_in_bios(pdev);
  75. dev_err(&pdev->dev, "boot cpu doesn't have X86_FEATURE_DCA\n");
  76. return 0;
  77. }
  78. struct ioat_dca_slot {
  79. struct pci_dev *pdev; /* requester device */
  80. u16 rid; /* requester id, as used by IOAT */
  81. };
  82. #define IOAT_DCA_MAX_REQ 6
  83. struct ioat_dca_priv {
  84. void __iomem *iobase;
  85. void *dca_base;
  86. int max_requesters;
  87. int requester_count;
  88. u8 tag_map[IOAT_TAG_MAP_LEN];
  89. struct ioat_dca_slot req_slots[0];
  90. };
  91. /* 5000 series chipset DCA Port Requester ID Table Entry Format
  92. * [15:8] PCI-Express Bus Number
  93. * [7:3] PCI-Express Device Number
  94. * [2:0] PCI-Express Function Number
  95. *
  96. * 5000 series chipset DCA control register format
  97. * [7:1] Reserved (0)
  98. * [0] Ignore Function Number
  99. */
  100. static int ioat_dca_add_requester(struct dca_provider *dca, struct device *dev)
  101. {
  102. struct ioat_dca_priv *ioatdca = dca_priv(dca);
  103. struct pci_dev *pdev;
  104. int i;
  105. u16 id;
  106. /* This implementation only supports PCI-Express */
  107. if (dev->bus != &pci_bus_type)
  108. return -ENODEV;
  109. pdev = to_pci_dev(dev);
  110. id = dcaid_from_pcidev(pdev);
  111. if (ioatdca->requester_count == ioatdca->max_requesters)
  112. return -ENODEV;
  113. for (i = 0; i < ioatdca->max_requesters; i++) {
  114. if (ioatdca->req_slots[i].pdev == NULL) {
  115. /* found an empty slot */
  116. ioatdca->requester_count++;
  117. ioatdca->req_slots[i].pdev = pdev;
  118. ioatdca->req_slots[i].rid = id;
  119. writew(id, ioatdca->dca_base + (i * 4));
  120. /* make sure the ignore function bit is off */
  121. writeb(0, ioatdca->dca_base + (i * 4) + 2);
  122. return i;
  123. }
  124. }
  125. /* Error, ioatdma->requester_count is out of whack */
  126. return -EFAULT;
  127. }
  128. static int ioat_dca_remove_requester(struct dca_provider *dca,
  129. struct device *dev)
  130. {
  131. struct ioat_dca_priv *ioatdca = dca_priv(dca);
  132. struct pci_dev *pdev;
  133. int i;
  134. /* This implementation only supports PCI-Express */
  135. if (dev->bus != &pci_bus_type)
  136. return -ENODEV;
  137. pdev = to_pci_dev(dev);
  138. for (i = 0; i < ioatdca->max_requesters; i++) {
  139. if (ioatdca->req_slots[i].pdev == pdev) {
  140. writew(0, ioatdca->dca_base + (i * 4));
  141. ioatdca->req_slots[i].pdev = NULL;
  142. ioatdca->req_slots[i].rid = 0;
  143. ioatdca->requester_count--;
  144. return i;
  145. }
  146. }
  147. return -ENODEV;
  148. }
  149. static u8 ioat_dca_get_tag(struct dca_provider *dca, int cpu)
  150. {
  151. struct ioat_dca_priv *ioatdca = dca_priv(dca);
  152. int i, apic_id, bit, value;
  153. u8 entry, tag;
  154. tag = 0;
  155. apic_id = cpu_physical_id(cpu);
  156. for (i = 0; i < IOAT_TAG_MAP_LEN; i++) {
  157. entry = ioatdca->tag_map[i];
  158. if (entry & DCA_TAG_MAP_VALID) {
  159. bit = entry & ~DCA_TAG_MAP_VALID;
  160. value = (apic_id & (1 << bit)) ? 1 : 0;
  161. } else {
  162. value = entry ? 1 : 0;
  163. }
  164. tag |= (value << i);
  165. }
  166. return tag;
  167. }
  168. static struct dca_ops ioat_dca_ops = {
  169. .add_requester = ioat_dca_add_requester,
  170. .remove_requester = ioat_dca_remove_requester,
  171. .get_tag = ioat_dca_get_tag,
  172. };
  173. struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase)
  174. {
  175. struct dca_provider *dca;
  176. struct ioat_dca_priv *ioatdca;
  177. u8 *tag_map = NULL;
  178. int i;
  179. int err;
  180. if (!system_has_dca_enabled(pdev))
  181. return NULL;
  182. /* I/OAT v1 systems must have a known tag_map to support DCA */
  183. switch (pdev->vendor) {
  184. case PCI_VENDOR_ID_INTEL:
  185. switch (pdev->device) {
  186. case PCI_DEVICE_ID_INTEL_IOAT:
  187. tag_map = ioat_tag_map_BNB;
  188. break;
  189. case PCI_DEVICE_ID_INTEL_IOAT_CNB:
  190. tag_map = ioat_tag_map_CNB;
  191. break;
  192. case PCI_DEVICE_ID_INTEL_IOAT_SCNB:
  193. tag_map = ioat_tag_map_SCNB;
  194. break;
  195. }
  196. break;
  197. case PCI_VENDOR_ID_UNISYS:
  198. switch (pdev->device) {
  199. case PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR:
  200. tag_map = ioat_tag_map_UNISYS;
  201. break;
  202. }
  203. break;
  204. }
  205. if (tag_map == NULL)
  206. return NULL;
  207. dca = alloc_dca_provider(&ioat_dca_ops,
  208. sizeof(*ioatdca) +
  209. (sizeof(struct ioat_dca_slot) * IOAT_DCA_MAX_REQ));
  210. if (!dca)
  211. return NULL;
  212. ioatdca = dca_priv(dca);
  213. ioatdca->max_requesters = IOAT_DCA_MAX_REQ;
  214. ioatdca->dca_base = iobase + 0x54;
  215. /* copy over the APIC ID to DCA tag mapping */
  216. for (i = 0; i < IOAT_TAG_MAP_LEN; i++)
  217. ioatdca->tag_map[i] = tag_map[i];
  218. err = register_dca_provider(dca, &pdev->dev);
  219. if (err) {
  220. free_dca_provider(dca);
  221. return NULL;
  222. }
  223. return dca;
  224. }