geode-aes.c 11 KB

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  1. /* Copyright (C) 2004-2006, Advanced Micro Devices, Inc.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License as published by
  5. * the Free Software Foundation; either version 2 of the License, or
  6. * (at your option) any later version.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/kernel.h>
  10. #include <linux/pci.h>
  11. #include <linux/pci_ids.h>
  12. #include <linux/crypto.h>
  13. #include <linux/spinlock.h>
  14. #include <crypto/algapi.h>
  15. #include <asm/io.h>
  16. #include <asm/delay.h>
  17. #include "geode-aes.h"
  18. /* Register definitions */
  19. #define AES_CTRLA_REG 0x0000
  20. #define AES_CTRL_START 0x01
  21. #define AES_CTRL_DECRYPT 0x00
  22. #define AES_CTRL_ENCRYPT 0x02
  23. #define AES_CTRL_WRKEY 0x04
  24. #define AES_CTRL_DCA 0x08
  25. #define AES_CTRL_SCA 0x10
  26. #define AES_CTRL_CBC 0x20
  27. #define AES_INTR_REG 0x0008
  28. #define AES_INTRA_PENDING (1 << 16)
  29. #define AES_INTRB_PENDING (1 << 17)
  30. #define AES_INTR_PENDING (AES_INTRA_PENDING | AES_INTRB_PENDING)
  31. #define AES_INTR_MASK 0x07
  32. #define AES_SOURCEA_REG 0x0010
  33. #define AES_DSTA_REG 0x0014
  34. #define AES_LENA_REG 0x0018
  35. #define AES_WRITEKEY0_REG 0x0030
  36. #define AES_WRITEIV0_REG 0x0040
  37. /* A very large counter that is used to gracefully bail out of an
  38. * operation in case of trouble
  39. */
  40. #define AES_OP_TIMEOUT 0x50000
  41. /* Static structures */
  42. static void __iomem * _iobase;
  43. static spinlock_t lock;
  44. /* Write a 128 bit field (either a writable key or IV) */
  45. static inline void
  46. _writefield(u32 offset, void *value)
  47. {
  48. int i;
  49. for(i = 0; i < 4; i++)
  50. iowrite32(((u32 *) value)[i], _iobase + offset + (i * 4));
  51. }
  52. /* Read a 128 bit field (either a writable key or IV) */
  53. static inline void
  54. _readfield(u32 offset, void *value)
  55. {
  56. int i;
  57. for(i = 0; i < 4; i++)
  58. ((u32 *) value)[i] = ioread32(_iobase + offset + (i * 4));
  59. }
  60. static int
  61. do_crypt(void *src, void *dst, int len, u32 flags)
  62. {
  63. u32 status;
  64. u32 counter = AES_OP_TIMEOUT;
  65. iowrite32(virt_to_phys(src), _iobase + AES_SOURCEA_REG);
  66. iowrite32(virt_to_phys(dst), _iobase + AES_DSTA_REG);
  67. iowrite32(len, _iobase + AES_LENA_REG);
  68. /* Start the operation */
  69. iowrite32(AES_CTRL_START | flags, _iobase + AES_CTRLA_REG);
  70. do
  71. status = ioread32(_iobase + AES_INTR_REG);
  72. while(!(status & AES_INTRA_PENDING) && --counter);
  73. /* Clear the event */
  74. iowrite32((status & 0xFF) | AES_INTRA_PENDING, _iobase + AES_INTR_REG);
  75. return counter ? 0 : 1;
  76. }
  77. static unsigned int
  78. geode_aes_crypt(struct geode_aes_op *op)
  79. {
  80. u32 flags = 0;
  81. unsigned long iflags;
  82. if (op->len == 0)
  83. return 0;
  84. /* If the source and destination is the same, then
  85. * we need to turn on the coherent flags, otherwise
  86. * we don't need to worry
  87. */
  88. if (op->src == op->dst)
  89. flags |= (AES_CTRL_DCA | AES_CTRL_SCA);
  90. if (op->dir == AES_DIR_ENCRYPT)
  91. flags |= AES_CTRL_ENCRYPT;
  92. /* Start the critical section */
  93. spin_lock_irqsave(&lock, iflags);
  94. if (op->mode == AES_MODE_CBC) {
  95. flags |= AES_CTRL_CBC;
  96. _writefield(AES_WRITEIV0_REG, op->iv);
  97. }
  98. if (!(op->flags & AES_FLAGS_HIDDENKEY)) {
  99. flags |= AES_CTRL_WRKEY;
  100. _writefield(AES_WRITEKEY0_REG, op->key);
  101. }
  102. do_crypt(op->src, op->dst, op->len, flags);
  103. if (op->mode == AES_MODE_CBC)
  104. _readfield(AES_WRITEIV0_REG, op->iv);
  105. spin_unlock_irqrestore(&lock, iflags);
  106. return op->len;
  107. }
  108. /* CRYPTO-API Functions */
  109. static int
  110. geode_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int len)
  111. {
  112. struct geode_aes_op *op = crypto_tfm_ctx(tfm);
  113. if (len != AES_KEY_LENGTH) {
  114. tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  115. return -EINVAL;
  116. }
  117. memcpy(op->key, key, len);
  118. return 0;
  119. }
  120. static void
  121. geode_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
  122. {
  123. struct geode_aes_op *op = crypto_tfm_ctx(tfm);
  124. if ((out == NULL) || (in == NULL))
  125. return;
  126. op->src = (void *) in;
  127. op->dst = (void *) out;
  128. op->mode = AES_MODE_ECB;
  129. op->flags = 0;
  130. op->len = AES_MIN_BLOCK_SIZE;
  131. op->dir = AES_DIR_ENCRYPT;
  132. geode_aes_crypt(op);
  133. }
  134. static void
  135. geode_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
  136. {
  137. struct geode_aes_op *op = crypto_tfm_ctx(tfm);
  138. if ((out == NULL) || (in == NULL))
  139. return;
  140. op->src = (void *) in;
  141. op->dst = (void *) out;
  142. op->mode = AES_MODE_ECB;
  143. op->flags = 0;
  144. op->len = AES_MIN_BLOCK_SIZE;
  145. op->dir = AES_DIR_DECRYPT;
  146. geode_aes_crypt(op);
  147. }
  148. static struct crypto_alg geode_alg = {
  149. .cra_name = "aes",
  150. .cra_driver_name = "geode-aes-128",
  151. .cra_priority = 300,
  152. .cra_alignmask = 15,
  153. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  154. .cra_blocksize = AES_MIN_BLOCK_SIZE,
  155. .cra_ctxsize = sizeof(struct geode_aes_op),
  156. .cra_module = THIS_MODULE,
  157. .cra_list = LIST_HEAD_INIT(geode_alg.cra_list),
  158. .cra_u = {
  159. .cipher = {
  160. .cia_min_keysize = AES_KEY_LENGTH,
  161. .cia_max_keysize = AES_KEY_LENGTH,
  162. .cia_setkey = geode_setkey,
  163. .cia_encrypt = geode_encrypt,
  164. .cia_decrypt = geode_decrypt
  165. }
  166. }
  167. };
  168. static int
  169. geode_cbc_decrypt(struct blkcipher_desc *desc,
  170. struct scatterlist *dst, struct scatterlist *src,
  171. unsigned int nbytes)
  172. {
  173. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  174. struct blkcipher_walk walk;
  175. int err, ret;
  176. blkcipher_walk_init(&walk, dst, src, nbytes);
  177. err = blkcipher_walk_virt(desc, &walk);
  178. while((nbytes = walk.nbytes)) {
  179. op->src = walk.src.virt.addr,
  180. op->dst = walk.dst.virt.addr;
  181. op->mode = AES_MODE_CBC;
  182. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  183. op->dir = AES_DIR_DECRYPT;
  184. memcpy(op->iv, walk.iv, AES_IV_LENGTH);
  185. ret = geode_aes_crypt(op);
  186. memcpy(walk.iv, op->iv, AES_IV_LENGTH);
  187. nbytes -= ret;
  188. err = blkcipher_walk_done(desc, &walk, nbytes);
  189. }
  190. return err;
  191. }
  192. static int
  193. geode_cbc_encrypt(struct blkcipher_desc *desc,
  194. struct scatterlist *dst, struct scatterlist *src,
  195. unsigned int nbytes)
  196. {
  197. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  198. struct blkcipher_walk walk;
  199. int err, ret;
  200. blkcipher_walk_init(&walk, dst, src, nbytes);
  201. err = blkcipher_walk_virt(desc, &walk);
  202. while((nbytes = walk.nbytes)) {
  203. op->src = walk.src.virt.addr,
  204. op->dst = walk.dst.virt.addr;
  205. op->mode = AES_MODE_CBC;
  206. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  207. op->dir = AES_DIR_ENCRYPT;
  208. memcpy(op->iv, walk.iv, AES_IV_LENGTH);
  209. ret = geode_aes_crypt(op);
  210. nbytes -= ret;
  211. err = blkcipher_walk_done(desc, &walk, nbytes);
  212. }
  213. return err;
  214. }
  215. static struct crypto_alg geode_cbc_alg = {
  216. .cra_name = "cbc(aes)",
  217. .cra_driver_name = "cbc-aes-geode-128",
  218. .cra_priority = 400,
  219. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  220. .cra_blocksize = AES_MIN_BLOCK_SIZE,
  221. .cra_ctxsize = sizeof(struct geode_aes_op),
  222. .cra_alignmask = 15,
  223. .cra_type = &crypto_blkcipher_type,
  224. .cra_module = THIS_MODULE,
  225. .cra_list = LIST_HEAD_INIT(geode_cbc_alg.cra_list),
  226. .cra_u = {
  227. .blkcipher = {
  228. .min_keysize = AES_KEY_LENGTH,
  229. .max_keysize = AES_KEY_LENGTH,
  230. .setkey = geode_setkey,
  231. .encrypt = geode_cbc_encrypt,
  232. .decrypt = geode_cbc_decrypt,
  233. .ivsize = AES_IV_LENGTH,
  234. }
  235. }
  236. };
  237. static int
  238. geode_ecb_decrypt(struct blkcipher_desc *desc,
  239. struct scatterlist *dst, struct scatterlist *src,
  240. unsigned int nbytes)
  241. {
  242. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  243. struct blkcipher_walk walk;
  244. int err, ret;
  245. blkcipher_walk_init(&walk, dst, src, nbytes);
  246. err = blkcipher_walk_virt(desc, &walk);
  247. while((nbytes = walk.nbytes)) {
  248. op->src = walk.src.virt.addr,
  249. op->dst = walk.dst.virt.addr;
  250. op->mode = AES_MODE_ECB;
  251. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  252. op->dir = AES_DIR_DECRYPT;
  253. ret = geode_aes_crypt(op);
  254. nbytes -= ret;
  255. err = blkcipher_walk_done(desc, &walk, nbytes);
  256. }
  257. return err;
  258. }
  259. static int
  260. geode_ecb_encrypt(struct blkcipher_desc *desc,
  261. struct scatterlist *dst, struct scatterlist *src,
  262. unsigned int nbytes)
  263. {
  264. struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
  265. struct blkcipher_walk walk;
  266. int err, ret;
  267. blkcipher_walk_init(&walk, dst, src, nbytes);
  268. err = blkcipher_walk_virt(desc, &walk);
  269. while((nbytes = walk.nbytes)) {
  270. op->src = walk.src.virt.addr,
  271. op->dst = walk.dst.virt.addr;
  272. op->mode = AES_MODE_ECB;
  273. op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
  274. op->dir = AES_DIR_ENCRYPT;
  275. ret = geode_aes_crypt(op);
  276. nbytes -= ret;
  277. ret = blkcipher_walk_done(desc, &walk, nbytes);
  278. }
  279. return err;
  280. }
  281. static struct crypto_alg geode_ecb_alg = {
  282. .cra_name = "ecb(aes)",
  283. .cra_driver_name = "ecb-aes-geode-128",
  284. .cra_priority = 400,
  285. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  286. .cra_blocksize = AES_MIN_BLOCK_SIZE,
  287. .cra_ctxsize = sizeof(struct geode_aes_op),
  288. .cra_alignmask = 15,
  289. .cra_type = &crypto_blkcipher_type,
  290. .cra_module = THIS_MODULE,
  291. .cra_list = LIST_HEAD_INIT(geode_ecb_alg.cra_list),
  292. .cra_u = {
  293. .blkcipher = {
  294. .min_keysize = AES_KEY_LENGTH,
  295. .max_keysize = AES_KEY_LENGTH,
  296. .setkey = geode_setkey,
  297. .encrypt = geode_ecb_encrypt,
  298. .decrypt = geode_ecb_decrypt,
  299. }
  300. }
  301. };
  302. static void
  303. geode_aes_remove(struct pci_dev *dev)
  304. {
  305. crypto_unregister_alg(&geode_alg);
  306. crypto_unregister_alg(&geode_ecb_alg);
  307. crypto_unregister_alg(&geode_cbc_alg);
  308. pci_iounmap(dev, _iobase);
  309. _iobase = NULL;
  310. pci_release_regions(dev);
  311. pci_disable_device(dev);
  312. }
  313. static int
  314. geode_aes_probe(struct pci_dev *dev, const struct pci_device_id *id)
  315. {
  316. int ret;
  317. if ((ret = pci_enable_device(dev)))
  318. return ret;
  319. if ((ret = pci_request_regions(dev, "geode-aes-128")))
  320. goto eenable;
  321. _iobase = pci_iomap(dev, 0, 0);
  322. if (_iobase == NULL) {
  323. ret = -ENOMEM;
  324. goto erequest;
  325. }
  326. spin_lock_init(&lock);
  327. /* Clear any pending activity */
  328. iowrite32(AES_INTR_PENDING | AES_INTR_MASK, _iobase + AES_INTR_REG);
  329. if ((ret = crypto_register_alg(&geode_alg)))
  330. goto eiomap;
  331. if ((ret = crypto_register_alg(&geode_ecb_alg)))
  332. goto ealg;
  333. if ((ret = crypto_register_alg(&geode_cbc_alg)))
  334. goto eecb;
  335. printk(KERN_NOTICE "geode-aes: GEODE AES engine enabled.\n");
  336. return 0;
  337. eecb:
  338. crypto_unregister_alg(&geode_ecb_alg);
  339. ealg:
  340. crypto_unregister_alg(&geode_alg);
  341. eiomap:
  342. pci_iounmap(dev, _iobase);
  343. erequest:
  344. pci_release_regions(dev);
  345. eenable:
  346. pci_disable_device(dev);
  347. printk(KERN_ERR "geode-aes: GEODE AES initialization failed.\n");
  348. return ret;
  349. }
  350. static struct pci_device_id geode_aes_tbl[] = {
  351. { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES, PCI_ANY_ID, PCI_ANY_ID} ,
  352. { 0, }
  353. };
  354. MODULE_DEVICE_TABLE(pci, geode_aes_tbl);
  355. static struct pci_driver geode_aes_driver = {
  356. .name = "Geode LX AES",
  357. .id_table = geode_aes_tbl,
  358. .probe = geode_aes_probe,
  359. .remove = __devexit_p(geode_aes_remove)
  360. };
  361. static int __init
  362. geode_aes_init(void)
  363. {
  364. return pci_register_driver(&geode_aes_driver);
  365. }
  366. static void __exit
  367. geode_aes_exit(void)
  368. {
  369. pci_unregister_driver(&geode_aes_driver);
  370. }
  371. MODULE_AUTHOR("Advanced Micro Devices, Inc.");
  372. MODULE_DESCRIPTION("Geode LX Hardware AES driver");
  373. MODULE_LICENSE("GPL");
  374. MODULE_ALIAS("aes");
  375. module_init(geode_aes_init);
  376. module_exit(geode_aes_exit);