mxser.c 82 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
  5. *
  6. * This code is loosely based on the Linux serial driver, written by
  7. * Linus Torvalds, Theodore T'so and others.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. * Original release 10/26/00
  24. *
  25. * 02/06/01 Support MOXA Industio family boards.
  26. * 02/06/01 Support TIOCGICOUNT.
  27. * 02/06/01 Fix the problem for connecting to serial mouse.
  28. * 02/06/01 Fix the problem for H/W flow control.
  29. * 02/06/01 Fix the compling warning when CONFIG_PCI
  30. * don't be defined.
  31. *
  32. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  33. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  34. * - Fixed x86_64 cleanness
  35. * - Fixed sleep with spinlock held in mxser_send_break
  36. */
  37. #include <linux/module.h>
  38. #include <linux/autoconf.h>
  39. #include <linux/errno.h>
  40. #include <linux/signal.h>
  41. #include <linux/sched.h>
  42. #include <linux/timer.h>
  43. #include <linux/interrupt.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial.h>
  47. #include <linux/serial_reg.h>
  48. #include <linux/major.h>
  49. #include <linux/string.h>
  50. #include <linux/fcntl.h>
  51. #include <linux/ptrace.h>
  52. #include <linux/gfp.h>
  53. #include <linux/ioport.h>
  54. #include <linux/mm.h>
  55. #include <linux/delay.h>
  56. #include <linux/pci.h>
  57. #include <linux/bitops.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/uaccess.h>
  62. #include "mxser.h"
  63. #define MXSER_VERSION "1.8"
  64. #define MXSERMAJOR 174
  65. #define MXSERCUMAJOR 175
  66. #define MXSER_EVENT_TXLOW 1
  67. #define MXSER_EVENT_HANGUP 2
  68. #define MXSER_BOARDS 4 /* Max. boards */
  69. #define MXSER_PORTS 32 /* Max. ports */
  70. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  71. #define MXSER_ISR_PASS_LIMIT 256
  72. #define MXSER_ERR_IOADDR -1
  73. #define MXSER_ERR_IRQ -2
  74. #define MXSER_ERR_IRQ_CONFLIT -3
  75. #define MXSER_ERR_VECTOR -4
  76. #define SERIAL_TYPE_NORMAL 1
  77. #define SERIAL_TYPE_CALLOUT 2
  78. #define WAKEUP_CHARS 256
  79. #define UART_MCR_AFE 0x20
  80. #define UART_LSR_SPECIAL 0x1E
  81. #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
  82. #define C168_ASIC_ID 1
  83. #define C104_ASIC_ID 2
  84. #define C102_ASIC_ID 0xB
  85. #define CI132_ASIC_ID 4
  86. #define CI134_ASIC_ID 3
  87. #define CI104J_ASIC_ID 5
  88. enum {
  89. MXSER_BOARD_C168_ISA = 1,
  90. MXSER_BOARD_C104_ISA,
  91. MXSER_BOARD_CI104J,
  92. MXSER_BOARD_C168_PCI,
  93. MXSER_BOARD_C104_PCI,
  94. MXSER_BOARD_C102_ISA,
  95. MXSER_BOARD_CI132,
  96. MXSER_BOARD_CI134,
  97. MXSER_BOARD_CP132,
  98. MXSER_BOARD_CP114,
  99. MXSER_BOARD_CT114,
  100. MXSER_BOARD_CP102,
  101. MXSER_BOARD_CP104U,
  102. MXSER_BOARD_CP168U,
  103. MXSER_BOARD_CP132U,
  104. MXSER_BOARD_CP134U,
  105. MXSER_BOARD_CP104JU,
  106. MXSER_BOARD_RC7000,
  107. MXSER_BOARD_CP118U,
  108. MXSER_BOARD_CP102UL,
  109. MXSER_BOARD_CP102U,
  110. };
  111. static char *mxser_brdname[] = {
  112. "C168 series",
  113. "C104 series",
  114. "CI-104J series",
  115. "C168H/PCI series",
  116. "C104H/PCI series",
  117. "C102 series",
  118. "CI-132 series",
  119. "CI-134 series",
  120. "CP-132 series",
  121. "CP-114 series",
  122. "CT-114 series",
  123. "CP-102 series",
  124. "CP-104U series",
  125. "CP-168U series",
  126. "CP-132U series",
  127. "CP-134U series",
  128. "CP-104JU series",
  129. "Moxa UC7000 Serial",
  130. "CP-118U series",
  131. "CP-102UL series",
  132. "CP-102U series",
  133. };
  134. static int mxser_numports[] = {
  135. 8, /* C168-ISA */
  136. 4, /* C104-ISA */
  137. 4, /* CI104J */
  138. 8, /* C168-PCI */
  139. 4, /* C104-PCI */
  140. 2, /* C102-ISA */
  141. 2, /* CI132 */
  142. 4, /* CI134 */
  143. 2, /* CP132 */
  144. 4, /* CP114 */
  145. 4, /* CT114 */
  146. 2, /* CP102 */
  147. 4, /* CP104U */
  148. 8, /* CP168U */
  149. 2, /* CP132U */
  150. 4, /* CP134U */
  151. 4, /* CP104JU */
  152. 8, /* RC7000 */
  153. 8, /* CP118U */
  154. 2, /* CP102UL */
  155. 2, /* CP102U */
  156. };
  157. #define UART_TYPE_NUM 2
  158. static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
  159. MOXA_MUST_MU150_HWID,
  160. MOXA_MUST_MU860_HWID
  161. };
  162. /* This is only for PCI */
  163. #define UART_INFO_NUM 3
  164. struct mxpciuart_info {
  165. int type;
  166. int tx_fifo;
  167. int rx_fifo;
  168. int xmit_fifo_size;
  169. int rx_high_water;
  170. int rx_trigger;
  171. int rx_low_water;
  172. long max_baud;
  173. };
  174. static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
  175. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  176. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  177. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  178. };
  179. #ifdef CONFIG_PCI
  180. static struct pci_device_id mxser_pcibrds[] = {
  181. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
  182. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
  183. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
  184. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
  185. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
  186. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
  187. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
  188. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
  189. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
  190. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
  191. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
  192. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
  193. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
  194. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
  195. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
  196. {0}
  197. };
  198. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  199. #endif
  200. typedef struct _moxa_pci_info {
  201. unsigned short busNum;
  202. unsigned short devNum;
  203. struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
  204. } moxa_pci_info;
  205. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  206. static int ttymajor = MXSERMAJOR;
  207. static int calloutmajor = MXSERCUMAJOR;
  208. static int verbose = 0;
  209. /* Variables for insmod */
  210. MODULE_AUTHOR("Casper Yang");
  211. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  212. module_param_array(ioaddr, int, NULL, 0);
  213. module_param(ttymajor, int, 0);
  214. module_param(calloutmajor, int, 0);
  215. module_param(verbose, bool, 0);
  216. MODULE_LICENSE("GPL");
  217. struct mxser_log {
  218. int tick;
  219. unsigned long rxcnt[MXSER_PORTS];
  220. unsigned long txcnt[MXSER_PORTS];
  221. };
  222. struct mxser_mon {
  223. unsigned long rxcnt;
  224. unsigned long txcnt;
  225. unsigned long up_rxcnt;
  226. unsigned long up_txcnt;
  227. int modem_status;
  228. unsigned char hold_reason;
  229. };
  230. struct mxser_mon_ext {
  231. unsigned long rx_cnt[32];
  232. unsigned long tx_cnt[32];
  233. unsigned long up_rxcnt[32];
  234. unsigned long up_txcnt[32];
  235. int modem_status[32];
  236. long baudrate[32];
  237. int databits[32];
  238. int stopbits[32];
  239. int parity[32];
  240. int flowctrl[32];
  241. int fifo[32];
  242. int iftype[32];
  243. };
  244. struct mxser_hwconf {
  245. int board_type;
  246. int ports;
  247. int irq;
  248. int vector;
  249. int vector_mask;
  250. int uart_type;
  251. int ioaddr[MXSER_PORTS_PER_BOARD];
  252. int baud_base[MXSER_PORTS_PER_BOARD];
  253. moxa_pci_info pciInfo;
  254. int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
  255. int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
  256. int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
  257. };
  258. struct mxser_struct {
  259. int port;
  260. int base; /* port base address */
  261. int irq; /* port using irq no. */
  262. int vector; /* port irq vector */
  263. int vectormask; /* port vector mask */
  264. int rx_high_water;
  265. int rx_trigger; /* Rx fifo trigger level */
  266. int rx_low_water;
  267. int baud_base; /* max. speed */
  268. int flags; /* defined in tty.h */
  269. int type; /* UART type */
  270. struct tty_struct *tty;
  271. int read_status_mask;
  272. int ignore_status_mask;
  273. int xmit_fifo_size;
  274. int custom_divisor;
  275. int x_char; /* xon/xoff character */
  276. int close_delay;
  277. unsigned short closing_wait;
  278. int IER; /* Interrupt Enable Register */
  279. int MCR; /* Modem control register */
  280. unsigned long event;
  281. int count; /* # of fd on device */
  282. int blocked_open; /* # of blocked opens */
  283. unsigned char *xmit_buf;
  284. int xmit_head;
  285. int xmit_tail;
  286. int xmit_cnt;
  287. struct work_struct tqueue;
  288. struct ktermios normal_termios;
  289. struct ktermios callout_termios;
  290. wait_queue_head_t open_wait;
  291. wait_queue_head_t close_wait;
  292. wait_queue_head_t delta_msr_wait;
  293. struct async_icount icount; /* kernel counters for the 4 input interrupts */
  294. int timeout;
  295. int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
  296. int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
  297. int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
  298. unsigned char stop_rx;
  299. unsigned char ldisc_stop_rx;
  300. long realbaud;
  301. struct mxser_mon mon_data;
  302. unsigned char err_shadow;
  303. spinlock_t slock;
  304. };
  305. struct mxser_mstatus {
  306. tcflag_t cflag;
  307. int cts;
  308. int dsr;
  309. int ri;
  310. int dcd;
  311. };
  312. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  313. static int mxserBoardCAP[MXSER_BOARDS] = {
  314. 0, 0, 0, 0
  315. /* 0x180, 0x280, 0x200, 0x320 */
  316. };
  317. static struct tty_driver *mxvar_sdriver;
  318. static struct mxser_struct mxvar_table[MXSER_PORTS];
  319. static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
  320. static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
  321. static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
  322. static struct mxser_log mxvar_log;
  323. static int mxvar_diagflag;
  324. static unsigned char mxser_msr[MXSER_PORTS + 1];
  325. static struct mxser_mon_ext mon_data_ext;
  326. static int mxser_set_baud_method[MXSER_PORTS + 1];
  327. static spinlock_t gm_lock;
  328. /*
  329. * This is used to figure out the divisor speeds and the timeouts
  330. */
  331. static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
  332. /*
  333. * static functions:
  334. */
  335. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
  336. static int mxser_init(void);
  337. /* static void mxser_poll(unsigned long); */
  338. static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
  339. static void mxser_do_softint(struct work_struct *);
  340. static int mxser_open(struct tty_struct *, struct file *);
  341. static void mxser_close(struct tty_struct *, struct file *);
  342. static int mxser_write(struct tty_struct *, const unsigned char *, int);
  343. static int mxser_write_room(struct tty_struct *);
  344. static void mxser_flush_buffer(struct tty_struct *);
  345. static int mxser_chars_in_buffer(struct tty_struct *);
  346. static void mxser_flush_chars(struct tty_struct *);
  347. static void mxser_put_char(struct tty_struct *, unsigned char);
  348. static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
  349. static int mxser_ioctl_special(unsigned int, void __user *);
  350. static void mxser_throttle(struct tty_struct *);
  351. static void mxser_unthrottle(struct tty_struct *);
  352. static void mxser_set_termios(struct tty_struct *, struct ktermios *);
  353. static void mxser_stop(struct tty_struct *);
  354. static void mxser_start(struct tty_struct *);
  355. static void mxser_hangup(struct tty_struct *);
  356. static void mxser_rs_break(struct tty_struct *, int);
  357. static irqreturn_t mxser_interrupt(int, void *);
  358. static void mxser_receive_chars(struct mxser_struct *, int *);
  359. static void mxser_transmit_chars(struct mxser_struct *);
  360. static void mxser_check_modem_status(struct mxser_struct *, int);
  361. static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
  362. static int mxser_startup(struct mxser_struct *);
  363. static void mxser_shutdown(struct mxser_struct *);
  364. static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
  365. static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
  366. static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
  367. static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
  368. static void mxser_send_break(struct mxser_struct *, int);
  369. static int mxser_tiocmget(struct tty_struct *, struct file *);
  370. static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
  371. static int mxser_set_baud(struct mxser_struct *info, long newspd);
  372. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
  373. static void mxser_startrx(struct tty_struct *tty);
  374. static void mxser_stoprx(struct tty_struct *tty);
  375. #ifdef CONFIG_PCI
  376. static int CheckIsMoxaMust(int io)
  377. {
  378. u8 oldmcr, hwid;
  379. int i;
  380. outb(0, io + UART_LCR);
  381. DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
  382. oldmcr = inb(io + UART_MCR);
  383. outb(0, io + UART_MCR);
  384. SET_MOXA_MUST_XON1_VALUE(io, 0x11);
  385. if ((hwid = inb(io + UART_MCR)) != 0) {
  386. outb(oldmcr, io + UART_MCR);
  387. return MOXA_OTHER_UART;
  388. }
  389. GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
  390. for (i = 0; i < UART_TYPE_NUM; i++) {
  391. if (hwid == Gmoxa_uart_id[i])
  392. return (int)hwid;
  393. }
  394. return MOXA_OTHER_UART;
  395. }
  396. #endif
  397. /* above is modified by Victor Yu. 08-15-2002 */
  398. static const struct tty_operations mxser_ops = {
  399. .open = mxser_open,
  400. .close = mxser_close,
  401. .write = mxser_write,
  402. .put_char = mxser_put_char,
  403. .flush_chars = mxser_flush_chars,
  404. .write_room = mxser_write_room,
  405. .chars_in_buffer = mxser_chars_in_buffer,
  406. .flush_buffer = mxser_flush_buffer,
  407. .ioctl = mxser_ioctl,
  408. .throttle = mxser_throttle,
  409. .unthrottle = mxser_unthrottle,
  410. .set_termios = mxser_set_termios,
  411. .stop = mxser_stop,
  412. .start = mxser_start,
  413. .hangup = mxser_hangup,
  414. .break_ctl = mxser_rs_break,
  415. .wait_until_sent = mxser_wait_until_sent,
  416. .tiocmget = mxser_tiocmget,
  417. .tiocmset = mxser_tiocmset,
  418. };
  419. /*
  420. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  421. */
  422. static int __init mxser_module_init(void)
  423. {
  424. int ret;
  425. if (verbose)
  426. printk(KERN_DEBUG "Loading module mxser ...\n");
  427. ret = mxser_init();
  428. if (verbose)
  429. printk(KERN_DEBUG "Done.\n");
  430. return ret;
  431. }
  432. static void __exit mxser_module_exit(void)
  433. {
  434. int i, err;
  435. if (verbose)
  436. printk(KERN_DEBUG "Unloading module mxser ...\n");
  437. err = tty_unregister_driver(mxvar_sdriver);
  438. if (!err)
  439. put_tty_driver(mxvar_sdriver);
  440. else
  441. printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
  442. for (i = 0; i < MXSER_BOARDS; i++) {
  443. struct pci_dev *pdev;
  444. if (mxsercfg[i].board_type == -1)
  445. continue;
  446. else {
  447. pdev = mxsercfg[i].pciInfo.pdev;
  448. free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
  449. if (pdev != NULL) { /* PCI */
  450. release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
  451. release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
  452. pci_dev_put(pdev);
  453. } else {
  454. release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
  455. release_region(mxsercfg[i].vector, 1);
  456. }
  457. }
  458. }
  459. if (verbose)
  460. printk(KERN_DEBUG "Done.\n");
  461. }
  462. static void process_txrx_fifo(struct mxser_struct *info)
  463. {
  464. int i;
  465. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  466. info->rx_trigger = 1;
  467. info->rx_high_water = 1;
  468. info->rx_low_water = 1;
  469. info->xmit_fifo_size = 1;
  470. } else {
  471. for (i = 0; i < UART_INFO_NUM; i++) {
  472. if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
  473. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  474. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  475. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  476. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  477. break;
  478. }
  479. }
  480. }
  481. }
  482. static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
  483. {
  484. struct mxser_struct *info;
  485. int retval;
  486. int i, n;
  487. n = board * MXSER_PORTS_PER_BOARD;
  488. info = &mxvar_table[n];
  489. /*if (verbose) */ {
  490. printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
  491. n, n + hwconf->ports - 1);
  492. printk(" max. baud rate = %d bps.\n",
  493. hwconf->MaxCanSetBaudRate[0]);
  494. }
  495. for (i = 0; i < hwconf->ports; i++, n++, info++) {
  496. info->port = n;
  497. info->base = hwconf->ioaddr[i];
  498. info->irq = hwconf->irq;
  499. info->vector = hwconf->vector;
  500. info->vectormask = hwconf->vector_mask;
  501. info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
  502. info->stop_rx = 0;
  503. info->ldisc_stop_rx = 0;
  504. info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
  505. /* Enhance mode enabled here */
  506. if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
  507. ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
  508. }
  509. info->flags = ASYNC_SHARE_IRQ;
  510. info->type = hwconf->uart_type;
  511. info->baud_base = hwconf->baud_base[i];
  512. info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
  513. process_txrx_fifo(info);
  514. info->custom_divisor = hwconf->baud_base[i] * 16;
  515. info->close_delay = 5 * HZ / 10;
  516. info->closing_wait = 30 * HZ;
  517. INIT_WORK(&info->tqueue, mxser_do_softint);
  518. info->normal_termios = mxvar_sdriver->init_termios;
  519. init_waitqueue_head(&info->open_wait);
  520. init_waitqueue_head(&info->close_wait);
  521. init_waitqueue_head(&info->delta_msr_wait);
  522. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  523. info->err_shadow = 0;
  524. spin_lock_init(&info->slock);
  525. }
  526. /*
  527. * Allocate the IRQ if necessary
  528. */
  529. /* before set INT ISR, disable all int */
  530. for (i = 0; i < hwconf->ports; i++) {
  531. outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
  532. hwconf->ioaddr[i] + UART_IER);
  533. }
  534. n = board * MXSER_PORTS_PER_BOARD;
  535. info = &mxvar_table[n];
  536. retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
  537. "mxser", info);
  538. if (retval) {
  539. printk(KERN_ERR "Board %d: %s",
  540. board, mxser_brdname[hwconf->board_type - 1]);
  541. printk(" Request irq failed, IRQ (%d) may conflict with"
  542. " another device.\n", info->irq);
  543. return retval;
  544. }
  545. return 0;
  546. }
  547. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
  548. {
  549. mxsercfg[board] = *hwconf;
  550. }
  551. #ifdef CONFIG_PCI
  552. static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
  553. {
  554. int i, j;
  555. /* unsigned int val; */
  556. unsigned int ioaddress;
  557. struct pci_dev *pdev = hwconf->pciInfo.pdev;
  558. /* io address */
  559. hwconf->board_type = board_type;
  560. hwconf->ports = mxser_numports[board_type - 1];
  561. ioaddress = pci_resource_start(pdev, 2);
  562. request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
  563. "mxser(IO)");
  564. for (i = 0; i < hwconf->ports; i++)
  565. hwconf->ioaddr[i] = ioaddress + 8 * i;
  566. /* vector */
  567. ioaddress = pci_resource_start(pdev, 3);
  568. request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
  569. "mxser(vector)");
  570. hwconf->vector = ioaddress;
  571. /* irq */
  572. hwconf->irq = hwconf->pciInfo.pdev->irq;
  573. hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
  574. hwconf->uart_type = PORT_16550A;
  575. hwconf->vector_mask = 0;
  576. for (i = 0; i < hwconf->ports; i++) {
  577. for (j = 0; j < UART_INFO_NUM; j++) {
  578. if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
  579. hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
  580. /* exception....CP-102 */
  581. if (board_type == MXSER_BOARD_CP102)
  582. hwconf->MaxCanSetBaudRate[i] = 921600;
  583. break;
  584. }
  585. }
  586. }
  587. if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
  588. for (i = 0; i < hwconf->ports; i++) {
  589. if (i < 4)
  590. hwconf->opmode_ioaddr[i] = ioaddress + 4;
  591. else
  592. hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
  593. }
  594. outb(0, ioaddress + 4); /* default set to RS232 mode */
  595. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  596. }
  597. for (i = 0; i < hwconf->ports; i++) {
  598. hwconf->vector_mask |= (1 << i);
  599. hwconf->baud_base[i] = 921600;
  600. }
  601. return 0;
  602. }
  603. #endif
  604. static int mxser_init(void)
  605. {
  606. int i, m, retval, b, n;
  607. struct pci_dev *pdev = NULL;
  608. int index;
  609. unsigned char busnum, devnum;
  610. struct mxser_hwconf hwconf;
  611. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  612. if (!mxvar_sdriver)
  613. return -ENOMEM;
  614. spin_lock_init(&gm_lock);
  615. for (i = 0; i < MXSER_BOARDS; i++) {
  616. mxsercfg[i].board_type = -1;
  617. }
  618. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  619. MXSER_VERSION);
  620. /* Initialize the tty_driver structure */
  621. memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
  622. mxvar_sdriver->owner = THIS_MODULE;
  623. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  624. mxvar_sdriver->name = "ttyMI";
  625. mxvar_sdriver->major = ttymajor;
  626. mxvar_sdriver->minor_start = 0;
  627. mxvar_sdriver->num = MXSER_PORTS + 1;
  628. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  629. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  630. mxvar_sdriver->init_termios = tty_std_termios;
  631. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  632. mxvar_sdriver->init_termios.c_ispeed = 9600;
  633. mxvar_sdriver->init_termios.c_ospeed = 9600;
  634. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
  635. tty_set_operations(mxvar_sdriver, &mxser_ops);
  636. mxvar_sdriver->ttys = mxvar_tty;
  637. mxvar_sdriver->termios = mxvar_termios;
  638. mxvar_sdriver->termios_locked = mxvar_termios_locked;
  639. mxvar_diagflag = 0;
  640. memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
  641. memset(&mxvar_log, 0, sizeof(struct mxser_log));
  642. memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
  643. memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
  644. memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
  645. memset(&hwconf, 0, sizeof(struct mxser_hwconf));
  646. m = 0;
  647. /* Start finding ISA boards here */
  648. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  649. int cap;
  650. if (!(cap = mxserBoardCAP[b]))
  651. continue;
  652. retval = mxser_get_ISA_conf(cap, &hwconf);
  653. if (retval != 0)
  654. printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
  655. mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
  656. if (retval <= 0) {
  657. if (retval == MXSER_ERR_IRQ)
  658. printk(KERN_ERR "Invalid interrupt number, "
  659. "board not configured\n");
  660. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  661. printk(KERN_ERR "Invalid interrupt number, "
  662. "board not configured\n");
  663. else if (retval == MXSER_ERR_VECTOR)
  664. printk(KERN_ERR "Invalid interrupt vector, "
  665. "board not configured\n");
  666. else if (retval == MXSER_ERR_IOADDR)
  667. printk(KERN_ERR "Invalid I/O address, "
  668. "board not configured\n");
  669. continue;
  670. }
  671. hwconf.pciInfo.busNum = 0;
  672. hwconf.pciInfo.devNum = 0;
  673. hwconf.pciInfo.pdev = NULL;
  674. mxser_getcfg(m, &hwconf);
  675. /*
  676. * init mxsercfg first,
  677. * or mxsercfg data is not correct on ISR.
  678. */
  679. /* mxser_initbrd will hook ISR. */
  680. if (mxser_initbrd(m, &hwconf) < 0)
  681. continue;
  682. m++;
  683. }
  684. /* Start finding ISA boards from module arg */
  685. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  686. int cap;
  687. if (!(cap = ioaddr[b]))
  688. continue;
  689. retval = mxser_get_ISA_conf(cap, &hwconf);
  690. if (retval != 0)
  691. printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
  692. mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
  693. if (retval <= 0) {
  694. if (retval == MXSER_ERR_IRQ)
  695. printk(KERN_ERR "Invalid interrupt number, "
  696. "board not configured\n");
  697. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  698. printk(KERN_ERR "Invalid interrupt number, "
  699. "board not configured\n");
  700. else if (retval == MXSER_ERR_VECTOR)
  701. printk(KERN_ERR "Invalid interrupt vector, "
  702. "board not configured\n");
  703. else if (retval == MXSER_ERR_IOADDR)
  704. printk(KERN_ERR "Invalid I/O address, "
  705. "board not configured\n");
  706. continue;
  707. }
  708. hwconf.pciInfo.busNum = 0;
  709. hwconf.pciInfo.devNum = 0;
  710. hwconf.pciInfo.pdev = NULL;
  711. mxser_getcfg(m, &hwconf);
  712. /*
  713. * init mxsercfg first,
  714. * or mxsercfg data is not correct on ISR.
  715. */
  716. /* mxser_initbrd will hook ISR. */
  717. if (mxser_initbrd(m, &hwconf) < 0)
  718. continue;
  719. m++;
  720. }
  721. /* start finding PCI board here */
  722. #ifdef CONFIG_PCI
  723. n = ARRAY_SIZE(mxser_pcibrds) - 1;
  724. index = 0;
  725. b = 0;
  726. while (b < n) {
  727. pdev = pci_get_device(mxser_pcibrds[b].vendor,
  728. mxser_pcibrds[b].device, pdev);
  729. if (pdev == NULL) {
  730. b++;
  731. continue;
  732. }
  733. hwconf.pciInfo.busNum = busnum = pdev->bus->number;
  734. hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
  735. hwconf.pciInfo.pdev = pdev;
  736. printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
  737. mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
  738. busnum, devnum >> 3);
  739. index++;
  740. if (m >= MXSER_BOARDS)
  741. printk(KERN_ERR
  742. "Too many Smartio/Industio family boards find "
  743. "(maximum %d), board not configured\n",
  744. MXSER_BOARDS);
  745. else {
  746. if (pci_enable_device(pdev)) {
  747. printk(KERN_ERR "Moxa SmartI/O PCI enable "
  748. "fail !\n");
  749. continue;
  750. }
  751. retval = mxser_get_PCI_conf(busnum, devnum,
  752. (int)mxser_pcibrds[b].driver_data,
  753. &hwconf);
  754. if (retval < 0) {
  755. if (retval == MXSER_ERR_IRQ)
  756. printk(KERN_ERR
  757. "Invalid interrupt number, "
  758. "board not configured\n");
  759. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  760. printk(KERN_ERR
  761. "Invalid interrupt number, "
  762. "board not configured\n");
  763. else if (retval == MXSER_ERR_VECTOR)
  764. printk(KERN_ERR
  765. "Invalid interrupt vector, "
  766. "board not configured\n");
  767. else if (retval == MXSER_ERR_IOADDR)
  768. printk(KERN_ERR
  769. "Invalid I/O address, "
  770. "board not configured\n");
  771. continue;
  772. }
  773. mxser_getcfg(m, &hwconf);
  774. /* init mxsercfg first,
  775. * or mxsercfg data is not correct on ISR.
  776. */
  777. /* mxser_initbrd will hook ISR. */
  778. if (mxser_initbrd(m, &hwconf) < 0)
  779. continue;
  780. m++;
  781. /* Keep an extra reference if we succeeded. It will
  782. be returned at unload time */
  783. pci_dev_get(pdev);
  784. }
  785. }
  786. #endif
  787. retval = tty_register_driver(mxvar_sdriver);
  788. if (retval) {
  789. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
  790. " driver !\n");
  791. put_tty_driver(mxvar_sdriver);
  792. for (i = 0; i < MXSER_BOARDS; i++) {
  793. if (mxsercfg[i].board_type == -1)
  794. continue;
  795. else {
  796. free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
  797. /* todo: release io, vector */
  798. }
  799. }
  800. return retval;
  801. }
  802. return 0;
  803. }
  804. static void mxser_do_softint(struct work_struct *work)
  805. {
  806. struct mxser_struct *info =
  807. container_of(work, struct mxser_struct, tqueue);
  808. struct tty_struct *tty;
  809. tty = info->tty;
  810. if (tty) {
  811. if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
  812. tty_wakeup(tty);
  813. if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
  814. tty_hangup(tty);
  815. }
  816. }
  817. static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
  818. {
  819. unsigned char status = 0;
  820. status = inb(baseaddr + UART_MSR);
  821. mxser_msr[port] &= 0x0F;
  822. mxser_msr[port] |= status;
  823. status = mxser_msr[port];
  824. if (mode)
  825. mxser_msr[port] = 0;
  826. return status;
  827. }
  828. /*
  829. * This routine is called whenever a serial port is opened. It
  830. * enables interrupts for a serial port, linking in its async structure into
  831. * the IRQ chain. It also performs the serial-specific
  832. * initialization for the tty structure.
  833. */
  834. static int mxser_open(struct tty_struct *tty, struct file *filp)
  835. {
  836. struct mxser_struct *info;
  837. int retval, line;
  838. /* initialize driver_data in case something fails */
  839. tty->driver_data = NULL;
  840. line = tty->index;
  841. if (line == MXSER_PORTS)
  842. return 0;
  843. if (line < 0 || line > MXSER_PORTS)
  844. return -ENODEV;
  845. info = mxvar_table + line;
  846. if (!info->base)
  847. return -ENODEV;
  848. tty->driver_data = info;
  849. info->tty = tty;
  850. /*
  851. * Start up serial port
  852. */
  853. retval = mxser_startup(info);
  854. if (retval)
  855. return retval;
  856. retval = mxser_block_til_ready(tty, filp, info);
  857. if (retval)
  858. return retval;
  859. info->count++;
  860. if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
  861. if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
  862. *tty->termios = info->normal_termios;
  863. else
  864. *tty->termios = info->callout_termios;
  865. mxser_change_speed(info, NULL);
  866. }
  867. /*
  868. status = mxser_get_msr(info->base, 0, info->port);
  869. mxser_check_modem_status(info, status);
  870. */
  871. /* unmark here for very high baud rate (ex. 921600 bps) used */
  872. tty->low_latency = 1;
  873. return 0;
  874. }
  875. /*
  876. * This routine is called when the serial port gets closed. First, we
  877. * wait for the last remaining data to be sent. Then, we unlink its
  878. * async structure from the interrupt chain if necessary, and we free
  879. * that IRQ if nothing is left in the chain.
  880. */
  881. static void mxser_close(struct tty_struct *tty, struct file *filp)
  882. {
  883. struct mxser_struct *info = tty->driver_data;
  884. unsigned long timeout;
  885. unsigned long flags;
  886. struct tty_ldisc *ld;
  887. if (tty->index == MXSER_PORTS)
  888. return;
  889. if (!info)
  890. return;
  891. spin_lock_irqsave(&info->slock, flags);
  892. if (tty_hung_up_p(filp)) {
  893. spin_unlock_irqrestore(&info->slock, flags);
  894. return;
  895. }
  896. if ((tty->count == 1) && (info->count != 1)) {
  897. /*
  898. * Uh, oh. tty->count is 1, which means that the tty
  899. * structure will be freed. Info->count should always
  900. * be one in these conditions. If it's greater than
  901. * one, we've got real problems, since it means the
  902. * serial port won't be shutdown.
  903. */
  904. printk(KERN_ERR "mxser_close: bad serial port count; "
  905. "tty->count is 1, info->count is %d\n", info->count);
  906. info->count = 1;
  907. }
  908. if (--info->count < 0) {
  909. printk(KERN_ERR "mxser_close: bad serial port count for "
  910. "ttys%d: %d\n", info->port, info->count);
  911. info->count = 0;
  912. }
  913. if (info->count) {
  914. spin_unlock_irqrestore(&info->slock, flags);
  915. return;
  916. }
  917. info->flags |= ASYNC_CLOSING;
  918. spin_unlock_irqrestore(&info->slock, flags);
  919. /*
  920. * Save the termios structure, since this port may have
  921. * separate termios for callout and dialin.
  922. */
  923. if (info->flags & ASYNC_NORMAL_ACTIVE)
  924. info->normal_termios = *tty->termios;
  925. /*
  926. * Now we wait for the transmit buffer to clear; and we notify
  927. * the line discipline to only process XON/XOFF characters.
  928. */
  929. tty->closing = 1;
  930. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
  931. tty_wait_until_sent(tty, info->closing_wait);
  932. /*
  933. * At this point we stop accepting input. To do this, we
  934. * disable the receive line status interrupts, and tell the
  935. * interrupt driver to stop checking the data ready bit in the
  936. * line status register.
  937. */
  938. info->IER &= ~UART_IER_RLSI;
  939. if (info->IsMoxaMustChipFlag)
  940. info->IER &= ~MOXA_MUST_RECV_ISR;
  941. /* by William
  942. info->read_status_mask &= ~UART_LSR_DR;
  943. */
  944. if (info->flags & ASYNC_INITIALIZED) {
  945. outb(info->IER, info->base + UART_IER);
  946. /*
  947. * Before we drop DTR, make sure the UART transmitter
  948. * has completely drained; this is especially
  949. * important if there is a transmit FIFO!
  950. */
  951. timeout = jiffies + HZ;
  952. while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
  953. schedule_timeout_interruptible(5);
  954. if (time_after(jiffies, timeout))
  955. break;
  956. }
  957. }
  958. mxser_shutdown(info);
  959. if (tty->driver->flush_buffer)
  960. tty->driver->flush_buffer(tty);
  961. ld = tty_ldisc_ref(tty);
  962. if (ld) {
  963. if (ld->flush_buffer)
  964. ld->flush_buffer(tty);
  965. tty_ldisc_deref(ld);
  966. }
  967. tty->closing = 0;
  968. info->event = 0;
  969. info->tty = NULL;
  970. if (info->blocked_open) {
  971. if (info->close_delay)
  972. schedule_timeout_interruptible(info->close_delay);
  973. wake_up_interruptible(&info->open_wait);
  974. }
  975. info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  976. wake_up_interruptible(&info->close_wait);
  977. }
  978. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  979. {
  980. int c, total = 0;
  981. struct mxser_struct *info = tty->driver_data;
  982. unsigned long flags;
  983. if (!info->xmit_buf)
  984. return 0;
  985. while (1) {
  986. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  987. SERIAL_XMIT_SIZE - info->xmit_head));
  988. if (c <= 0)
  989. break;
  990. memcpy(info->xmit_buf + info->xmit_head, buf, c);
  991. spin_lock_irqsave(&info->slock, flags);
  992. info->xmit_head = (info->xmit_head + c) &
  993. (SERIAL_XMIT_SIZE - 1);
  994. info->xmit_cnt += c;
  995. spin_unlock_irqrestore(&info->slock, flags);
  996. buf += c;
  997. count -= c;
  998. total += c;
  999. }
  1000. if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
  1001. if (!tty->hw_stopped ||
  1002. (info->type == PORT_16550A) ||
  1003. (info->IsMoxaMustChipFlag)) {
  1004. spin_lock_irqsave(&info->slock, flags);
  1005. info->IER |= UART_IER_THRI;
  1006. outb(info->IER, info->base + UART_IER);
  1007. spin_unlock_irqrestore(&info->slock, flags);
  1008. }
  1009. }
  1010. return total;
  1011. }
  1012. static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1013. {
  1014. struct mxser_struct *info = tty->driver_data;
  1015. unsigned long flags;
  1016. if (!info->xmit_buf)
  1017. return;
  1018. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1019. return;
  1020. spin_lock_irqsave(&info->slock, flags);
  1021. info->xmit_buf[info->xmit_head++] = ch;
  1022. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1023. info->xmit_cnt++;
  1024. spin_unlock_irqrestore(&info->slock, flags);
  1025. if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
  1026. if (!tty->hw_stopped ||
  1027. (info->type == PORT_16550A) ||
  1028. info->IsMoxaMustChipFlag) {
  1029. spin_lock_irqsave(&info->slock, flags);
  1030. info->IER |= UART_IER_THRI;
  1031. outb(info->IER, info->base + UART_IER);
  1032. spin_unlock_irqrestore(&info->slock, flags);
  1033. }
  1034. }
  1035. }
  1036. static void mxser_flush_chars(struct tty_struct *tty)
  1037. {
  1038. struct mxser_struct *info = tty->driver_data;
  1039. unsigned long flags;
  1040. if (info->xmit_cnt <= 0 ||
  1041. tty->stopped ||
  1042. !info->xmit_buf ||
  1043. (tty->hw_stopped &&
  1044. (info->type != PORT_16550A) &&
  1045. (!info->IsMoxaMustChipFlag)
  1046. ))
  1047. return;
  1048. spin_lock_irqsave(&info->slock, flags);
  1049. info->IER |= UART_IER_THRI;
  1050. outb(info->IER, info->base + UART_IER);
  1051. spin_unlock_irqrestore(&info->slock, flags);
  1052. }
  1053. static int mxser_write_room(struct tty_struct *tty)
  1054. {
  1055. struct mxser_struct *info = tty->driver_data;
  1056. int ret;
  1057. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1058. if (ret < 0)
  1059. ret = 0;
  1060. return ret;
  1061. }
  1062. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1063. {
  1064. struct mxser_struct *info = tty->driver_data;
  1065. return info->xmit_cnt;
  1066. }
  1067. static void mxser_flush_buffer(struct tty_struct *tty)
  1068. {
  1069. struct mxser_struct *info = tty->driver_data;
  1070. char fcr;
  1071. unsigned long flags;
  1072. spin_lock_irqsave(&info->slock, flags);
  1073. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  1074. /* below added by shinhay */
  1075. fcr = inb(info->base + UART_FCR);
  1076. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  1077. info->base + UART_FCR);
  1078. outb(fcr, info->base + UART_FCR);
  1079. spin_unlock_irqrestore(&info->slock, flags);
  1080. /* above added by shinhay */
  1081. tty_wakeup(tty);
  1082. }
  1083. static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
  1084. {
  1085. struct mxser_struct *info = tty->driver_data;
  1086. int retval;
  1087. struct async_icount cprev, cnow; /* kernel counter temps */
  1088. struct serial_icounter_struct __user *p_cuser;
  1089. unsigned long templ;
  1090. unsigned long flags;
  1091. void __user *argp = (void __user *)arg;
  1092. if (tty->index == MXSER_PORTS)
  1093. return mxser_ioctl_special(cmd, argp);
  1094. /* following add by Victor Yu. 01-05-2004 */
  1095. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1096. int opmode, p;
  1097. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1098. int shiftbit;
  1099. unsigned char val, mask;
  1100. p = info->port % 4;
  1101. if (cmd == MOXA_SET_OP_MODE) {
  1102. if (get_user(opmode, (int __user *) argp))
  1103. return -EFAULT;
  1104. if (opmode != RS232_MODE &&
  1105. opmode != RS485_2WIRE_MODE &&
  1106. opmode != RS422_MODE &&
  1107. opmode != RS485_4WIRE_MODE)
  1108. return -EFAULT;
  1109. mask = ModeMask[p];
  1110. shiftbit = p * 2;
  1111. val = inb(info->opmode_ioaddr);
  1112. val &= mask;
  1113. val |= (opmode << shiftbit);
  1114. outb(val, info->opmode_ioaddr);
  1115. } else {
  1116. shiftbit = p * 2;
  1117. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1118. opmode &= OP_MODE_MASK;
  1119. if (copy_to_user(argp, &opmode, sizeof(int)))
  1120. return -EFAULT;
  1121. }
  1122. return 0;
  1123. }
  1124. /* above add by Victor Yu. 01-05-2004 */
  1125. if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1126. if (tty->flags & (1 << TTY_IO_ERROR))
  1127. return -EIO;
  1128. }
  1129. switch (cmd) {
  1130. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1131. retval = tty_check_change(tty);
  1132. if (retval)
  1133. return retval;
  1134. tty_wait_until_sent(tty, 0);
  1135. if (!arg)
  1136. mxser_send_break(info, HZ / 4); /* 1/4 second */
  1137. return 0;
  1138. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1139. retval = tty_check_change(tty);
  1140. if (retval)
  1141. return retval;
  1142. tty_wait_until_sent(tty, 0);
  1143. mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
  1144. return 0;
  1145. case TIOCGSOFTCAR:
  1146. return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
  1147. case TIOCSSOFTCAR:
  1148. if (get_user(templ, (unsigned long __user *) argp))
  1149. return -EFAULT;
  1150. arg = templ;
  1151. tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
  1152. return 0;
  1153. case TIOCGSERIAL:
  1154. return mxser_get_serial_info(info, argp);
  1155. case TIOCSSERIAL:
  1156. return mxser_set_serial_info(info, argp);
  1157. case TIOCSERGETLSR: /* Get line status register */
  1158. return mxser_get_lsr_info(info, argp);
  1159. /*
  1160. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1161. * - mask passed in arg for lines of interest
  1162. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1163. * Caller should use TIOCGICOUNT to see which one it was
  1164. */
  1165. case TIOCMIWAIT:
  1166. spin_lock_irqsave(&info->slock, flags);
  1167. cnow = info->icount; /* note the counters on entry */
  1168. spin_unlock_irqrestore(&info->slock, flags);
  1169. wait_event_interruptible(info->delta_msr_wait, ({
  1170. cprev = cnow;
  1171. spin_lock_irqsave(&info->slock, flags);
  1172. cnow = info->icount; /* atomic copy */
  1173. spin_unlock_irqrestore(&info->slock, flags);
  1174. ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
  1175. ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
  1176. ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
  1177. ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
  1178. }));
  1179. break;
  1180. /*
  1181. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1182. * Return: write counters to the user passed counter struct
  1183. * NB: both 1->0 and 0->1 transitions are counted except for
  1184. * RI where only 0->1 is counted.
  1185. */
  1186. case TIOCGICOUNT:
  1187. spin_lock_irqsave(&info->slock, flags);
  1188. cnow = info->icount;
  1189. spin_unlock_irqrestore(&info->slock, flags);
  1190. p_cuser = argp;
  1191. /* modified by casper 1/11/2000 */
  1192. if (put_user(cnow.frame, &p_cuser->frame))
  1193. return -EFAULT;
  1194. if (put_user(cnow.brk, &p_cuser->brk))
  1195. return -EFAULT;
  1196. if (put_user(cnow.overrun, &p_cuser->overrun))
  1197. return -EFAULT;
  1198. if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
  1199. return -EFAULT;
  1200. if (put_user(cnow.parity, &p_cuser->parity))
  1201. return -EFAULT;
  1202. if (put_user(cnow.rx, &p_cuser->rx))
  1203. return -EFAULT;
  1204. if (put_user(cnow.tx, &p_cuser->tx))
  1205. return -EFAULT;
  1206. put_user(cnow.cts, &p_cuser->cts);
  1207. put_user(cnow.dsr, &p_cuser->dsr);
  1208. put_user(cnow.rng, &p_cuser->rng);
  1209. put_user(cnow.dcd, &p_cuser->dcd);
  1210. return 0;
  1211. case MOXA_HighSpeedOn:
  1212. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1213. case MOXA_SDS_RSTICOUNTER: {
  1214. info->mon_data.rxcnt = 0;
  1215. info->mon_data.txcnt = 0;
  1216. return 0;
  1217. }
  1218. /* (above) added by James. */
  1219. case MOXA_ASPP_SETBAUD:{
  1220. long baud;
  1221. if (get_user(baud, (long __user *)argp))
  1222. return -EFAULT;
  1223. mxser_set_baud(info, baud);
  1224. return 0;
  1225. }
  1226. case MOXA_ASPP_GETBAUD:
  1227. if (copy_to_user(argp, &info->realbaud, sizeof(long)))
  1228. return -EFAULT;
  1229. return 0;
  1230. case MOXA_ASPP_OQUEUE:{
  1231. int len, lsr;
  1232. len = mxser_chars_in_buffer(tty);
  1233. lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
  1234. len += (lsr ? 0 : 1);
  1235. if (copy_to_user(argp, &len, sizeof(int)))
  1236. return -EFAULT;
  1237. return 0;
  1238. }
  1239. case MOXA_ASPP_MON: {
  1240. int mcr, status;
  1241. /* info->mon_data.ser_param = tty->termios->c_cflag; */
  1242. status = mxser_get_msr(info->base, 1, info->port, info);
  1243. mxser_check_modem_status(info, status);
  1244. mcr = inb(info->base + UART_MCR);
  1245. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1246. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1247. else
  1248. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1249. if (mcr & MOXA_MUST_MCR_TX_XON)
  1250. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1251. else
  1252. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1253. if (info->tty->hw_stopped)
  1254. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1255. else
  1256. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1257. if (copy_to_user(argp, &info->mon_data,
  1258. sizeof(struct mxser_mon)))
  1259. return -EFAULT;
  1260. return 0;
  1261. }
  1262. case MOXA_ASPP_LSTATUS: {
  1263. if (copy_to_user(argp, &info->err_shadow,
  1264. sizeof(unsigned char)))
  1265. return -EFAULT;
  1266. info->err_shadow = 0;
  1267. return 0;
  1268. }
  1269. case MOXA_SET_BAUD_METHOD: {
  1270. int method;
  1271. if (get_user(method, (int __user *)argp))
  1272. return -EFAULT;
  1273. mxser_set_baud_method[info->port] = method;
  1274. if (copy_to_user(argp, &method, sizeof(int)))
  1275. return -EFAULT;
  1276. return 0;
  1277. }
  1278. default:
  1279. return -ENOIOCTLCMD;
  1280. }
  1281. return 0;
  1282. }
  1283. #ifndef CMSPAR
  1284. #define CMSPAR 010000000000
  1285. #endif
  1286. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1287. {
  1288. int i, result, status;
  1289. switch (cmd) {
  1290. case MOXA_GET_CONF:
  1291. if (copy_to_user(argp, mxsercfg,
  1292. sizeof(struct mxser_hwconf) * 4))
  1293. return -EFAULT;
  1294. return 0;
  1295. case MOXA_GET_MAJOR:
  1296. if (copy_to_user(argp, &ttymajor, sizeof(int)))
  1297. return -EFAULT;
  1298. return 0;
  1299. case MOXA_GET_CUMAJOR:
  1300. if (copy_to_user(argp, &calloutmajor, sizeof(int)))
  1301. return -EFAULT;
  1302. return 0;
  1303. case MOXA_CHKPORTENABLE:
  1304. result = 0;
  1305. for (i = 0; i < MXSER_PORTS; i++) {
  1306. if (mxvar_table[i].base)
  1307. result |= (1 << i);
  1308. }
  1309. return put_user(result, (unsigned long __user *)argp);
  1310. case MOXA_GETDATACOUNT:
  1311. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1312. return -EFAULT;
  1313. return 0;
  1314. case MOXA_GETMSTATUS:
  1315. for (i = 0; i < MXSER_PORTS; i++) {
  1316. GMStatus[i].ri = 0;
  1317. if (!mxvar_table[i].base) {
  1318. GMStatus[i].dcd = 0;
  1319. GMStatus[i].dsr = 0;
  1320. GMStatus[i].cts = 0;
  1321. continue;
  1322. }
  1323. if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
  1324. GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
  1325. else
  1326. GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
  1327. status = inb(mxvar_table[i].base + UART_MSR);
  1328. if (status & 0x80 /*UART_MSR_DCD */ )
  1329. GMStatus[i].dcd = 1;
  1330. else
  1331. GMStatus[i].dcd = 0;
  1332. if (status & 0x20 /*UART_MSR_DSR */ )
  1333. GMStatus[i].dsr = 1;
  1334. else
  1335. GMStatus[i].dsr = 0;
  1336. if (status & 0x10 /*UART_MSR_CTS */ )
  1337. GMStatus[i].cts = 1;
  1338. else
  1339. GMStatus[i].cts = 0;
  1340. }
  1341. if (copy_to_user(argp, GMStatus,
  1342. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1343. return -EFAULT;
  1344. return 0;
  1345. case MOXA_ASPP_MON_EXT: {
  1346. int status;
  1347. int opmode, p;
  1348. int shiftbit;
  1349. unsigned cflag, iflag;
  1350. for (i = 0; i < MXSER_PORTS; i++) {
  1351. if (!mxvar_table[i].base)
  1352. continue;
  1353. status = mxser_get_msr(mxvar_table[i].base, 0,
  1354. i, &(mxvar_table[i]));
  1355. /*
  1356. mxser_check_modem_status(&mxvar_table[i],
  1357. status);
  1358. */
  1359. if (status & UART_MSR_TERI)
  1360. mxvar_table[i].icount.rng++;
  1361. if (status & UART_MSR_DDSR)
  1362. mxvar_table[i].icount.dsr++;
  1363. if (status & UART_MSR_DDCD)
  1364. mxvar_table[i].icount.dcd++;
  1365. if (status & UART_MSR_DCTS)
  1366. mxvar_table[i].icount.cts++;
  1367. mxvar_table[i].mon_data.modem_status = status;
  1368. mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
  1369. mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
  1370. mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
  1371. mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
  1372. mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
  1373. mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
  1374. if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
  1375. cflag = mxvar_table[i].normal_termios.c_cflag;
  1376. iflag = mxvar_table[i].normal_termios.c_iflag;
  1377. } else {
  1378. cflag = mxvar_table[i].tty->termios->c_cflag;
  1379. iflag = mxvar_table[i].tty->termios->c_iflag;
  1380. }
  1381. mon_data_ext.databits[i] = cflag & CSIZE;
  1382. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1383. mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
  1384. mon_data_ext.flowctrl[i] = 0x00;
  1385. if (cflag & CRTSCTS)
  1386. mon_data_ext.flowctrl[i] |= 0x03;
  1387. if (iflag & (IXON | IXOFF))
  1388. mon_data_ext.flowctrl[i] |= 0x0C;
  1389. if (mxvar_table[i].type == PORT_16550A)
  1390. mon_data_ext.fifo[i] = 1;
  1391. else
  1392. mon_data_ext.fifo[i] = 0;
  1393. p = i % 4;
  1394. shiftbit = p * 2;
  1395. opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
  1396. opmode &= OP_MODE_MASK;
  1397. mon_data_ext.iftype[i] = opmode;
  1398. }
  1399. if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
  1400. return -EFAULT;
  1401. return 0;
  1402. }
  1403. default:
  1404. return -ENOIOCTLCMD;
  1405. }
  1406. return 0;
  1407. }
  1408. static void mxser_stoprx(struct tty_struct *tty)
  1409. {
  1410. struct mxser_struct *info = tty->driver_data;
  1411. /* unsigned long flags; */
  1412. info->ldisc_stop_rx = 1;
  1413. if (I_IXOFF(tty)) {
  1414. /* MX_LOCK(&info->slock); */
  1415. /* following add by Victor Yu. 09-02-2002 */
  1416. if (info->IsMoxaMustChipFlag) {
  1417. info->IER &= ~MOXA_MUST_RECV_ISR;
  1418. outb(info->IER, info->base + UART_IER);
  1419. } else {
  1420. /* above add by Victor Yu. 09-02-2002 */
  1421. info->x_char = STOP_CHAR(tty);
  1422. /* mask by Victor Yu. 09-02-2002 */
  1423. /* outb(info->IER, 0); */
  1424. outb(0, info->base + UART_IER);
  1425. info->IER |= UART_IER_THRI;
  1426. /* force Tx interrupt */
  1427. outb(info->IER, info->base + UART_IER);
  1428. } /* add by Victor Yu. 09-02-2002 */
  1429. /* MX_UNLOCK(&info->slock); */
  1430. }
  1431. if (info->tty->termios->c_cflag & CRTSCTS) {
  1432. /* MX_LOCK(&info->slock); */
  1433. info->MCR &= ~UART_MCR_RTS;
  1434. outb(info->MCR, info->base + UART_MCR);
  1435. /* MX_UNLOCK(&info->slock); */
  1436. }
  1437. }
  1438. static void mxser_startrx(struct tty_struct *tty)
  1439. {
  1440. struct mxser_struct *info = tty->driver_data;
  1441. /* unsigned long flags; */
  1442. info->ldisc_stop_rx = 0;
  1443. if (I_IXOFF(tty)) {
  1444. if (info->x_char)
  1445. info->x_char = 0;
  1446. else {
  1447. /* MX_LOCK(&info->slock); */
  1448. /* following add by Victor Yu. 09-02-2002 */
  1449. if (info->IsMoxaMustChipFlag) {
  1450. info->IER |= MOXA_MUST_RECV_ISR;
  1451. outb(info->IER, info->base + UART_IER);
  1452. } else {
  1453. /* above add by Victor Yu. 09-02-2002 */
  1454. info->x_char = START_CHAR(tty);
  1455. /* mask by Victor Yu. 09-02-2002 */
  1456. /* outb(info->IER, 0); */
  1457. /* add by Victor Yu. 09-02-2002 */
  1458. outb(0, info->base + UART_IER);
  1459. /* force Tx interrupt */
  1460. info->IER |= UART_IER_THRI;
  1461. outb(info->IER, info->base + UART_IER);
  1462. } /* add by Victor Yu. 09-02-2002 */
  1463. /* MX_UNLOCK(&info->slock); */
  1464. }
  1465. }
  1466. if (info->tty->termios->c_cflag & CRTSCTS) {
  1467. /* MX_LOCK(&info->slock); */
  1468. info->MCR |= UART_MCR_RTS;
  1469. outb(info->MCR, info->base + UART_MCR);
  1470. /* MX_UNLOCK(&info->slock); */
  1471. }
  1472. }
  1473. /*
  1474. * This routine is called by the upper-layer tty layer to signal that
  1475. * incoming characters should be throttled.
  1476. */
  1477. static void mxser_throttle(struct tty_struct *tty)
  1478. {
  1479. /* struct mxser_struct *info = tty->driver_data; */
  1480. /* unsigned long flags; */
  1481. /* MX_LOCK(&info->slock); */
  1482. mxser_stoprx(tty);
  1483. /* MX_UNLOCK(&info->slock); */
  1484. }
  1485. static void mxser_unthrottle(struct tty_struct *tty)
  1486. {
  1487. /* struct mxser_struct *info = tty->driver_data; */
  1488. /* unsigned long flags; */
  1489. /* MX_LOCK(&info->slock); */
  1490. mxser_startrx(tty);
  1491. /* MX_UNLOCK(&info->slock); */
  1492. }
  1493. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1494. {
  1495. struct mxser_struct *info = tty->driver_data;
  1496. unsigned long flags;
  1497. mxser_change_speed(info, old_termios);
  1498. if ((old_termios->c_cflag & CRTSCTS) &&
  1499. !(tty->termios->c_cflag & CRTSCTS)) {
  1500. tty->hw_stopped = 0;
  1501. mxser_start(tty);
  1502. }
  1503. /* Handle sw stopped */
  1504. if ((old_termios->c_iflag & IXON) &&
  1505. !(tty->termios->c_iflag & IXON)) {
  1506. tty->stopped = 0;
  1507. /* following add by Victor Yu. 09-02-2002 */
  1508. if (info->IsMoxaMustChipFlag) {
  1509. spin_lock_irqsave(&info->slock, flags);
  1510. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  1511. spin_unlock_irqrestore(&info->slock, flags);
  1512. }
  1513. /* above add by Victor Yu. 09-02-2002 */
  1514. mxser_start(tty);
  1515. }
  1516. }
  1517. /*
  1518. * mxser_stop() and mxser_start()
  1519. *
  1520. * This routines are called before setting or resetting tty->stopped.
  1521. * They enable or disable transmitter interrupts, as necessary.
  1522. */
  1523. static void mxser_stop(struct tty_struct *tty)
  1524. {
  1525. struct mxser_struct *info = tty->driver_data;
  1526. unsigned long flags;
  1527. spin_lock_irqsave(&info->slock, flags);
  1528. if (info->IER & UART_IER_THRI) {
  1529. info->IER &= ~UART_IER_THRI;
  1530. outb(info->IER, info->base + UART_IER);
  1531. }
  1532. spin_unlock_irqrestore(&info->slock, flags);
  1533. }
  1534. static void mxser_start(struct tty_struct *tty)
  1535. {
  1536. struct mxser_struct *info = tty->driver_data;
  1537. unsigned long flags;
  1538. spin_lock_irqsave(&info->slock, flags);
  1539. if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
  1540. info->IER |= UART_IER_THRI;
  1541. outb(info->IER, info->base + UART_IER);
  1542. }
  1543. spin_unlock_irqrestore(&info->slock, flags);
  1544. }
  1545. /*
  1546. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1547. */
  1548. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1549. {
  1550. struct mxser_struct *info = tty->driver_data;
  1551. unsigned long orig_jiffies, char_time;
  1552. int lsr;
  1553. if (info->type == PORT_UNKNOWN)
  1554. return;
  1555. if (info->xmit_fifo_size == 0)
  1556. return; /* Just in case.... */
  1557. orig_jiffies = jiffies;
  1558. /*
  1559. * Set the check interval to be 1/5 of the estimated time to
  1560. * send a single character, and make it at least 1. The check
  1561. * interval should also be less than the timeout.
  1562. *
  1563. * Note: we have to use pretty tight timings here to satisfy
  1564. * the NIST-PCTS.
  1565. */
  1566. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1567. char_time = char_time / 5;
  1568. if (char_time == 0)
  1569. char_time = 1;
  1570. if (timeout && timeout < char_time)
  1571. char_time = timeout;
  1572. /*
  1573. * If the transmitter hasn't cleared in twice the approximate
  1574. * amount of time to send the entire FIFO, it probably won't
  1575. * ever clear. This assumes the UART isn't doing flow
  1576. * control, which is currently the case. Hence, if it ever
  1577. * takes longer than info->timeout, this is probably due to a
  1578. * UART bug of some kind. So, we clamp the timeout parameter at
  1579. * 2*info->timeout.
  1580. */
  1581. if (!timeout || timeout > 2 * info->timeout)
  1582. timeout = 2 * info->timeout;
  1583. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1584. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1585. timeout, char_time);
  1586. printk("jiff=%lu...", jiffies);
  1587. #endif
  1588. while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
  1589. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1590. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1591. #endif
  1592. schedule_timeout_interruptible(char_time);
  1593. if (signal_pending(current))
  1594. break;
  1595. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1596. break;
  1597. }
  1598. set_current_state(TASK_RUNNING);
  1599. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1600. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1601. #endif
  1602. }
  1603. /*
  1604. * This routine is called by tty_hangup() when a hangup is signaled.
  1605. */
  1606. void mxser_hangup(struct tty_struct *tty)
  1607. {
  1608. struct mxser_struct *info = tty->driver_data;
  1609. mxser_flush_buffer(tty);
  1610. mxser_shutdown(info);
  1611. info->event = 0;
  1612. info->count = 0;
  1613. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  1614. info->tty = NULL;
  1615. wake_up_interruptible(&info->open_wait);
  1616. }
  1617. /* added by James 03-12-2004. */
  1618. /*
  1619. * mxser_rs_break() --- routine which turns the break handling on or off
  1620. */
  1621. static void mxser_rs_break(struct tty_struct *tty, int break_state)
  1622. {
  1623. struct mxser_struct *info = tty->driver_data;
  1624. unsigned long flags;
  1625. spin_lock_irqsave(&info->slock, flags);
  1626. if (break_state == -1)
  1627. outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
  1628. info->base + UART_LCR);
  1629. else
  1630. outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
  1631. info->base + UART_LCR);
  1632. spin_unlock_irqrestore(&info->slock, flags);
  1633. }
  1634. /* (above) added by James. */
  1635. /*
  1636. * This is the serial driver's generic interrupt routine
  1637. */
  1638. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1639. {
  1640. int status, iir, i;
  1641. struct mxser_struct *info;
  1642. struct mxser_struct *port;
  1643. int max, irqbits, bits, msr;
  1644. int pass_counter = 0;
  1645. int handled = IRQ_NONE;
  1646. port = NULL;
  1647. /* spin_lock(&gm_lock); */
  1648. for (i = 0; i < MXSER_BOARDS; i++) {
  1649. if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
  1650. port = dev_id;
  1651. break;
  1652. }
  1653. }
  1654. if (i == MXSER_BOARDS)
  1655. goto irq_stop;
  1656. if (port == 0)
  1657. goto irq_stop;
  1658. max = mxser_numports[mxsercfg[i].board_type - 1];
  1659. while (1) {
  1660. irqbits = inb(port->vector) & port->vectormask;
  1661. if (irqbits == port->vectormask)
  1662. break;
  1663. handled = IRQ_HANDLED;
  1664. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1665. if (irqbits == port->vectormask)
  1666. break;
  1667. if (bits & irqbits)
  1668. continue;
  1669. info = port + i;
  1670. /* following add by Victor Yu. 09-13-2002 */
  1671. iir = inb(info->base + UART_IIR);
  1672. if (iir & UART_IIR_NO_INT)
  1673. continue;
  1674. iir &= MOXA_MUST_IIR_MASK;
  1675. if (!info->tty) {
  1676. status = inb(info->base + UART_LSR);
  1677. outb(0x27, info->base + UART_FCR);
  1678. inb(info->base + UART_MSR);
  1679. continue;
  1680. }
  1681. /* mask by Victor Yu. 09-13-2002
  1682. if ( !info->tty ||
  1683. (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
  1684. continue;
  1685. */
  1686. /* mask by Victor Yu. 09-02-2002
  1687. status = inb(info->base + UART_LSR) & info->read_status_mask;
  1688. */
  1689. /* following add by Victor Yu. 09-02-2002 */
  1690. status = inb(info->base + UART_LSR);
  1691. if (status & UART_LSR_PE)
  1692. info->err_shadow |= NPPI_NOTIFY_PARITY;
  1693. if (status & UART_LSR_FE)
  1694. info->err_shadow |= NPPI_NOTIFY_FRAMING;
  1695. if (status & UART_LSR_OE)
  1696. info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
  1697. if (status & UART_LSR_BI)
  1698. info->err_shadow |= NPPI_NOTIFY_BREAK;
  1699. if (info->IsMoxaMustChipFlag) {
  1700. /*
  1701. if ( (status & 0x02) && !(status & 0x01) ) {
  1702. outb(info->base+UART_FCR, 0x23);
  1703. continue;
  1704. }
  1705. */
  1706. if (iir == MOXA_MUST_IIR_GDA ||
  1707. iir == MOXA_MUST_IIR_RDA ||
  1708. iir == MOXA_MUST_IIR_RTO ||
  1709. iir == MOXA_MUST_IIR_LSR)
  1710. mxser_receive_chars(info, &status);
  1711. } else {
  1712. /* above add by Victor Yu. 09-02-2002 */
  1713. status &= info->read_status_mask;
  1714. if (status & UART_LSR_DR)
  1715. mxser_receive_chars(info, &status);
  1716. }
  1717. msr = inb(info->base + UART_MSR);
  1718. if (msr & UART_MSR_ANY_DELTA) {
  1719. mxser_check_modem_status(info, msr);
  1720. }
  1721. /* following add by Victor Yu. 09-13-2002 */
  1722. if (info->IsMoxaMustChipFlag) {
  1723. if ((iir == 0x02) && (status & UART_LSR_THRE)) {
  1724. mxser_transmit_chars(info);
  1725. }
  1726. } else {
  1727. /* above add by Victor Yu. 09-13-2002 */
  1728. if (status & UART_LSR_THRE) {
  1729. /* 8-2-99 by William
  1730. if ( info->x_char || (info->xmit_cnt > 0) )
  1731. */
  1732. mxser_transmit_chars(info);
  1733. }
  1734. }
  1735. }
  1736. if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
  1737. break; /* Prevent infinite loops */
  1738. }
  1739. }
  1740. irq_stop:
  1741. /* spin_unlock(&gm_lock); */
  1742. return handled;
  1743. }
  1744. static void mxser_receive_chars(struct mxser_struct *info, int *status)
  1745. {
  1746. struct tty_struct *tty = info->tty;
  1747. unsigned char ch, gdl;
  1748. int ignored = 0;
  1749. int cnt = 0;
  1750. int recv_room;
  1751. int max = 256;
  1752. unsigned long flags;
  1753. spin_lock_irqsave(&info->slock, flags);
  1754. recv_room = tty->receive_room;
  1755. if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
  1756. /* mxser_throttle(tty); */
  1757. mxser_stoprx(tty);
  1758. /* return; */
  1759. }
  1760. /* following add by Victor Yu. 09-02-2002 */
  1761. if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
  1762. if (*status & UART_LSR_SPECIAL) {
  1763. goto intr_old;
  1764. }
  1765. /* following add by Victor Yu. 02-11-2004 */
  1766. if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
  1767. (*status & MOXA_MUST_LSR_RERR))
  1768. goto intr_old;
  1769. /* above add by Victor Yu. 02-14-2004 */
  1770. if (*status & MOXA_MUST_LSR_RERR)
  1771. goto intr_old;
  1772. gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
  1773. /* add by Victor Yu. 02-11-2004 */
  1774. if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
  1775. gdl &= MOXA_MUST_GDL_MASK;
  1776. if (gdl >= recv_room) {
  1777. if (!info->ldisc_stop_rx) {
  1778. /* mxser_throttle(tty); */
  1779. mxser_stoprx(tty);
  1780. }
  1781. /* return; */
  1782. }
  1783. while (gdl--) {
  1784. ch = inb(info->base + UART_RX);
  1785. tty_insert_flip_char(tty, ch, 0);
  1786. cnt++;
  1787. /*
  1788. if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
  1789. mxser_stoprx(tty);
  1790. info->stop_rx = 1;
  1791. break;
  1792. } */
  1793. }
  1794. goto end_intr;
  1795. }
  1796. intr_old:
  1797. /* above add by Victor Yu. 09-02-2002 */
  1798. do {
  1799. if (max-- < 0)
  1800. break;
  1801. /*
  1802. if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
  1803. mxser_stoprx(tty);
  1804. info->stop_rx=1;
  1805. break;
  1806. }
  1807. */
  1808. ch = inb(info->base + UART_RX);
  1809. /* following add by Victor Yu. 09-02-2002 */
  1810. if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
  1811. outb(0x23, info->base + UART_FCR);
  1812. *status &= info->read_status_mask;
  1813. /* above add by Victor Yu. 09-02-2002 */
  1814. if (*status & info->ignore_status_mask) {
  1815. if (++ignored > 100)
  1816. break;
  1817. } else {
  1818. char flag = 0;
  1819. if (*status & UART_LSR_SPECIAL) {
  1820. if (*status & UART_LSR_BI) {
  1821. flag = TTY_BREAK;
  1822. /* added by casper 1/11/2000 */
  1823. info->icount.brk++;
  1824. /* */
  1825. if (info->flags & ASYNC_SAK)
  1826. do_SAK(tty);
  1827. } else if (*status & UART_LSR_PE) {
  1828. flag = TTY_PARITY;
  1829. /* added by casper 1/11/2000 */
  1830. info->icount.parity++;
  1831. /* */
  1832. } else if (*status & UART_LSR_FE) {
  1833. flag = TTY_FRAME;
  1834. /* added by casper 1/11/2000 */
  1835. info->icount.frame++;
  1836. /* */
  1837. } else if (*status & UART_LSR_OE) {
  1838. flag = TTY_OVERRUN;
  1839. /* added by casper 1/11/2000 */
  1840. info->icount.overrun++;
  1841. /* */
  1842. }
  1843. }
  1844. tty_insert_flip_char(tty, ch, flag);
  1845. cnt++;
  1846. if (cnt >= recv_room) {
  1847. if (!info->ldisc_stop_rx) {
  1848. /* mxser_throttle(tty); */
  1849. mxser_stoprx(tty);
  1850. }
  1851. break;
  1852. }
  1853. }
  1854. /* following add by Victor Yu. 09-02-2002 */
  1855. if (info->IsMoxaMustChipFlag)
  1856. break;
  1857. /* above add by Victor Yu. 09-02-2002 */
  1858. /* mask by Victor Yu. 09-02-2002
  1859. *status = inb(info->base + UART_LSR) & info->read_status_mask;
  1860. */
  1861. /* following add by Victor Yu. 09-02-2002 */
  1862. *status = inb(info->base + UART_LSR);
  1863. /* above add by Victor Yu. 09-02-2002 */
  1864. } while (*status & UART_LSR_DR);
  1865. end_intr: /* add by Victor Yu. 09-02-2002 */
  1866. mxvar_log.rxcnt[info->port] += cnt;
  1867. info->mon_data.rxcnt += cnt;
  1868. info->mon_data.up_rxcnt += cnt;
  1869. spin_unlock_irqrestore(&info->slock, flags);
  1870. tty_flip_buffer_push(tty);
  1871. }
  1872. static void mxser_transmit_chars(struct mxser_struct *info)
  1873. {
  1874. int count, cnt;
  1875. unsigned long flags;
  1876. spin_lock_irqsave(&info->slock, flags);
  1877. if (info->x_char) {
  1878. outb(info->x_char, info->base + UART_TX);
  1879. info->x_char = 0;
  1880. mxvar_log.txcnt[info->port]++;
  1881. info->mon_data.txcnt++;
  1882. info->mon_data.up_txcnt++;
  1883. /* added by casper 1/11/2000 */
  1884. info->icount.tx++;
  1885. /* */
  1886. spin_unlock_irqrestore(&info->slock, flags);
  1887. return;
  1888. }
  1889. if (info->xmit_buf == 0) {
  1890. spin_unlock_irqrestore(&info->slock, flags);
  1891. return;
  1892. }
  1893. if ((info->xmit_cnt <= 0) || info->tty->stopped ||
  1894. (info->tty->hw_stopped &&
  1895. (info->type != PORT_16550A) &&
  1896. (!info->IsMoxaMustChipFlag))) {
  1897. info->IER &= ~UART_IER_THRI;
  1898. outb(info->IER, info->base + UART_IER);
  1899. spin_unlock_irqrestore(&info->slock, flags);
  1900. return;
  1901. }
  1902. cnt = info->xmit_cnt;
  1903. count = info->xmit_fifo_size;
  1904. do {
  1905. outb(info->xmit_buf[info->xmit_tail++],
  1906. info->base + UART_TX);
  1907. info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1908. if (--info->xmit_cnt <= 0)
  1909. break;
  1910. } while (--count > 0);
  1911. mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
  1912. /* added by James 03-12-2004. */
  1913. info->mon_data.txcnt += (cnt - info->xmit_cnt);
  1914. info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
  1915. /* (above) added by James. */
  1916. /* added by casper 1/11/2000 */
  1917. info->icount.tx += (cnt - info->xmit_cnt);
  1918. /* */
  1919. if (info->xmit_cnt < WAKEUP_CHARS) {
  1920. set_bit(MXSER_EVENT_TXLOW, &info->event);
  1921. schedule_work(&info->tqueue);
  1922. }
  1923. if (info->xmit_cnt <= 0) {
  1924. info->IER &= ~UART_IER_THRI;
  1925. outb(info->IER, info->base + UART_IER);
  1926. }
  1927. spin_unlock_irqrestore(&info->slock, flags);
  1928. }
  1929. static void mxser_check_modem_status(struct mxser_struct *info, int status)
  1930. {
  1931. /* update input line counters */
  1932. if (status & UART_MSR_TERI)
  1933. info->icount.rng++;
  1934. if (status & UART_MSR_DDSR)
  1935. info->icount.dsr++;
  1936. if (status & UART_MSR_DDCD)
  1937. info->icount.dcd++;
  1938. if (status & UART_MSR_DCTS)
  1939. info->icount.cts++;
  1940. info->mon_data.modem_status = status;
  1941. wake_up_interruptible(&info->delta_msr_wait);
  1942. if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  1943. if (status & UART_MSR_DCD)
  1944. wake_up_interruptible(&info->open_wait);
  1945. schedule_work(&info->tqueue);
  1946. }
  1947. if (info->flags & ASYNC_CTS_FLOW) {
  1948. if (info->tty->hw_stopped) {
  1949. if (status & UART_MSR_CTS) {
  1950. info->tty->hw_stopped = 0;
  1951. if ((info->type != PORT_16550A) &&
  1952. (!info->IsMoxaMustChipFlag)) {
  1953. info->IER |= UART_IER_THRI;
  1954. outb(info->IER, info->base + UART_IER);
  1955. }
  1956. set_bit(MXSER_EVENT_TXLOW, &info->event);
  1957. schedule_work(&info->tqueue); }
  1958. } else {
  1959. if (!(status & UART_MSR_CTS)) {
  1960. info->tty->hw_stopped = 1;
  1961. if ((info->type != PORT_16550A) &&
  1962. (!info->IsMoxaMustChipFlag)) {
  1963. info->IER &= ~UART_IER_THRI;
  1964. outb(info->IER, info->base + UART_IER);
  1965. }
  1966. }
  1967. }
  1968. }
  1969. }
  1970. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
  1971. {
  1972. DECLARE_WAITQUEUE(wait, current);
  1973. int retval;
  1974. int do_clocal = 0;
  1975. unsigned long flags;
  1976. /*
  1977. * If non-blocking mode is set, or the port is not enabled,
  1978. * then make the check up front and then exit.
  1979. */
  1980. if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
  1981. info->flags |= ASYNC_NORMAL_ACTIVE;
  1982. return 0;
  1983. }
  1984. if (tty->termios->c_cflag & CLOCAL)
  1985. do_clocal = 1;
  1986. /*
  1987. * Block waiting for the carrier detect and the line to become
  1988. * free (i.e., not in use by the callout). While we are in
  1989. * this loop, info->count is dropped by one, so that
  1990. * mxser_close() knows when to free things. We restore it upon
  1991. * exit, either normal or abnormal.
  1992. */
  1993. retval = 0;
  1994. add_wait_queue(&info->open_wait, &wait);
  1995. spin_lock_irqsave(&info->slock, flags);
  1996. if (!tty_hung_up_p(filp))
  1997. info->count--;
  1998. spin_unlock_irqrestore(&info->slock, flags);
  1999. info->blocked_open++;
  2000. while (1) {
  2001. spin_lock_irqsave(&info->slock, flags);
  2002. outb(inb(info->base + UART_MCR) |
  2003. UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
  2004. spin_unlock_irqrestore(&info->slock, flags);
  2005. set_current_state(TASK_INTERRUPTIBLE);
  2006. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
  2007. if (info->flags & ASYNC_HUP_NOTIFY)
  2008. retval = -EAGAIN;
  2009. else
  2010. retval = -ERESTARTSYS;
  2011. break;
  2012. }
  2013. if (!(info->flags & ASYNC_CLOSING) &&
  2014. (do_clocal ||
  2015. (inb(info->base + UART_MSR) & UART_MSR_DCD)))
  2016. break;
  2017. if (signal_pending(current)) {
  2018. retval = -ERESTARTSYS;
  2019. break;
  2020. }
  2021. schedule();
  2022. }
  2023. set_current_state(TASK_RUNNING);
  2024. remove_wait_queue(&info->open_wait, &wait);
  2025. if (!tty_hung_up_p(filp))
  2026. info->count++;
  2027. info->blocked_open--;
  2028. if (retval)
  2029. return retval;
  2030. info->flags |= ASYNC_NORMAL_ACTIVE;
  2031. return 0;
  2032. }
  2033. static int mxser_startup(struct mxser_struct *info)
  2034. {
  2035. unsigned long page;
  2036. unsigned long flags;
  2037. page = __get_free_page(GFP_KERNEL);
  2038. if (!page)
  2039. return -ENOMEM;
  2040. spin_lock_irqsave(&info->slock, flags);
  2041. if (info->flags & ASYNC_INITIALIZED) {
  2042. free_page(page);
  2043. spin_unlock_irqrestore(&info->slock, flags);
  2044. return 0;
  2045. }
  2046. if (!info->base || !info->type) {
  2047. if (info->tty)
  2048. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2049. free_page(page);
  2050. spin_unlock_irqrestore(&info->slock, flags);
  2051. return 0;
  2052. }
  2053. if (info->xmit_buf)
  2054. free_page(page);
  2055. else
  2056. info->xmit_buf = (unsigned char *) page;
  2057. /*
  2058. * Clear the FIFO buffers and disable them
  2059. * (they will be reenabled in mxser_change_speed())
  2060. */
  2061. if (info->IsMoxaMustChipFlag)
  2062. outb((UART_FCR_CLEAR_RCVR |
  2063. UART_FCR_CLEAR_XMIT |
  2064. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
  2065. else
  2066. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  2067. info->base + UART_FCR);
  2068. /*
  2069. * At this point there's no way the LSR could still be 0xFF;
  2070. * if it is, then bail out, because there's likely no UART
  2071. * here.
  2072. */
  2073. if (inb(info->base + UART_LSR) == 0xff) {
  2074. spin_unlock_irqrestore(&info->slock, flags);
  2075. if (capable(CAP_SYS_ADMIN)) {
  2076. if (info->tty)
  2077. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2078. return 0;
  2079. } else
  2080. return -ENODEV;
  2081. }
  2082. /*
  2083. * Clear the interrupt registers.
  2084. */
  2085. (void) inb(info->base + UART_LSR);
  2086. (void) inb(info->base + UART_RX);
  2087. (void) inb(info->base + UART_IIR);
  2088. (void) inb(info->base + UART_MSR);
  2089. /*
  2090. * Now, initialize the UART
  2091. */
  2092. outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
  2093. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  2094. outb(info->MCR, info->base + UART_MCR);
  2095. /*
  2096. * Finally, enable interrupts
  2097. */
  2098. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  2099. /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
  2100. /* following add by Victor Yu. 08-30-2002 */
  2101. if (info->IsMoxaMustChipFlag)
  2102. info->IER |= MOXA_MUST_IER_EGDAI;
  2103. /* above add by Victor Yu. 08-30-2002 */
  2104. outb(info->IER, info->base + UART_IER); /* enable interrupts */
  2105. /*
  2106. * And clear the interrupt registers again for luck.
  2107. */
  2108. (void) inb(info->base + UART_LSR);
  2109. (void) inb(info->base + UART_RX);
  2110. (void) inb(info->base + UART_IIR);
  2111. (void) inb(info->base + UART_MSR);
  2112. if (info->tty)
  2113. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  2114. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  2115. /*
  2116. * and set the speed of the serial port
  2117. */
  2118. spin_unlock_irqrestore(&info->slock, flags);
  2119. mxser_change_speed(info, NULL);
  2120. info->flags |= ASYNC_INITIALIZED;
  2121. return 0;
  2122. }
  2123. /*
  2124. * This routine will shutdown a serial port; interrupts maybe disabled, and
  2125. * DTR is dropped if the hangup on close termio flag is on.
  2126. */
  2127. static void mxser_shutdown(struct mxser_struct *info)
  2128. {
  2129. unsigned long flags;
  2130. if (!(info->flags & ASYNC_INITIALIZED))
  2131. return;
  2132. spin_lock_irqsave(&info->slock, flags);
  2133. /*
  2134. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  2135. * here so the queue might never be waken up
  2136. */
  2137. wake_up_interruptible(&info->delta_msr_wait);
  2138. /*
  2139. * Free the IRQ, if necessary
  2140. */
  2141. if (info->xmit_buf) {
  2142. free_page((unsigned long) info->xmit_buf);
  2143. info->xmit_buf = NULL;
  2144. }
  2145. info->IER = 0;
  2146. outb(0x00, info->base + UART_IER);
  2147. if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
  2148. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  2149. outb(info->MCR, info->base + UART_MCR);
  2150. /* clear Rx/Tx FIFO's */
  2151. /* following add by Victor Yu. 08-30-2002 */
  2152. if (info->IsMoxaMustChipFlag)
  2153. outb((UART_FCR_CLEAR_RCVR |
  2154. UART_FCR_CLEAR_XMIT |
  2155. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
  2156. else
  2157. /* above add by Victor Yu. 08-30-2002 */
  2158. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  2159. info->base + UART_FCR);
  2160. /* read data port to reset things */
  2161. (void) inb(info->base + UART_RX);
  2162. if (info->tty)
  2163. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2164. info->flags &= ~ASYNC_INITIALIZED;
  2165. /* following add by Victor Yu. 09-23-2002 */
  2166. if (info->IsMoxaMustChipFlag)
  2167. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
  2168. /* above add by Victor Yu. 09-23-2002 */
  2169. spin_unlock_irqrestore(&info->slock, flags);
  2170. }
  2171. /*
  2172. * This routine is called to set the UART divisor registers to match
  2173. * the specified baud rate for a serial port.
  2174. */
  2175. static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
  2176. {
  2177. unsigned cflag, cval, fcr;
  2178. int ret = 0;
  2179. unsigned char status;
  2180. long baud;
  2181. unsigned long flags;
  2182. if (!info->tty || !info->tty->termios)
  2183. return ret;
  2184. cflag = info->tty->termios->c_cflag;
  2185. if (!(info->base))
  2186. return ret;
  2187. #ifndef B921600
  2188. #define B921600 (B460800 +1)
  2189. #endif
  2190. if (mxser_set_baud_method[info->port] == 0) {
  2191. baud = tty_get_baud_rate(info->tty);
  2192. mxser_set_baud(info, baud);
  2193. }
  2194. /* byte size and parity */
  2195. switch (cflag & CSIZE) {
  2196. case CS5:
  2197. cval = 0x00;
  2198. break;
  2199. case CS6:
  2200. cval = 0x01;
  2201. break;
  2202. case CS7:
  2203. cval = 0x02;
  2204. break;
  2205. case CS8:
  2206. cval = 0x03;
  2207. break;
  2208. default:
  2209. cval = 0x00;
  2210. break; /* too keep GCC shut... */
  2211. }
  2212. if (cflag & CSTOPB)
  2213. cval |= 0x04;
  2214. if (cflag & PARENB)
  2215. cval |= UART_LCR_PARITY;
  2216. if (!(cflag & PARODD))
  2217. cval |= UART_LCR_EPAR;
  2218. if (cflag & CMSPAR)
  2219. cval |= UART_LCR_SPAR;
  2220. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  2221. if (info->IsMoxaMustChipFlag) {
  2222. fcr = UART_FCR_ENABLE_FIFO;
  2223. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  2224. SET_MOXA_MUST_FIFO_VALUE(info);
  2225. } else
  2226. fcr = 0;
  2227. } else {
  2228. fcr = UART_FCR_ENABLE_FIFO;
  2229. /* following add by Victor Yu. 08-30-2002 */
  2230. if (info->IsMoxaMustChipFlag) {
  2231. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  2232. SET_MOXA_MUST_FIFO_VALUE(info);
  2233. } else {
  2234. /* above add by Victor Yu. 08-30-2002 */
  2235. switch (info->rx_trigger) {
  2236. case 1:
  2237. fcr |= UART_FCR_TRIGGER_1;
  2238. break;
  2239. case 4:
  2240. fcr |= UART_FCR_TRIGGER_4;
  2241. break;
  2242. case 8:
  2243. fcr |= UART_FCR_TRIGGER_8;
  2244. break;
  2245. default:
  2246. fcr |= UART_FCR_TRIGGER_14;
  2247. break;
  2248. }
  2249. }
  2250. }
  2251. /* CTS flow control flag and modem status interrupts */
  2252. info->IER &= ~UART_IER_MSI;
  2253. info->MCR &= ~UART_MCR_AFE;
  2254. if (cflag & CRTSCTS) {
  2255. info->flags |= ASYNC_CTS_FLOW;
  2256. info->IER |= UART_IER_MSI;
  2257. if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
  2258. info->MCR |= UART_MCR_AFE;
  2259. } else {
  2260. status = inb(info->base + UART_MSR);
  2261. if (info->tty->hw_stopped) {
  2262. if (status & UART_MSR_CTS) {
  2263. info->tty->hw_stopped = 0;
  2264. if ((info->type != PORT_16550A) &&
  2265. (!info->IsMoxaMustChipFlag)) {
  2266. info->IER |= UART_IER_THRI;
  2267. outb(info->IER, info->base + UART_IER);
  2268. }
  2269. set_bit(MXSER_EVENT_TXLOW, &info->event);
  2270. schedule_work(&info->tqueue); }
  2271. } else {
  2272. if (!(status & UART_MSR_CTS)) {
  2273. info->tty->hw_stopped = 1;
  2274. if ((info->type != PORT_16550A) &&
  2275. (!info->IsMoxaMustChipFlag)) {
  2276. info->IER &= ~UART_IER_THRI;
  2277. outb(info->IER, info->base + UART_IER);
  2278. }
  2279. }
  2280. }
  2281. }
  2282. } else {
  2283. info->flags &= ~ASYNC_CTS_FLOW;
  2284. }
  2285. outb(info->MCR, info->base + UART_MCR);
  2286. if (cflag & CLOCAL) {
  2287. info->flags &= ~ASYNC_CHECK_CD;
  2288. } else {
  2289. info->flags |= ASYNC_CHECK_CD;
  2290. info->IER |= UART_IER_MSI;
  2291. }
  2292. outb(info->IER, info->base + UART_IER);
  2293. /*
  2294. * Set up parity check flag
  2295. */
  2296. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  2297. if (I_INPCK(info->tty))
  2298. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  2299. if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
  2300. info->read_status_mask |= UART_LSR_BI;
  2301. info->ignore_status_mask = 0;
  2302. if (I_IGNBRK(info->tty)) {
  2303. info->ignore_status_mask |= UART_LSR_BI;
  2304. info->read_status_mask |= UART_LSR_BI;
  2305. /*
  2306. * If we're ignore parity and break indicators, ignore
  2307. * overruns too. (For real raw support).
  2308. */
  2309. if (I_IGNPAR(info->tty)) {
  2310. info->ignore_status_mask |=
  2311. UART_LSR_OE |
  2312. UART_LSR_PE |
  2313. UART_LSR_FE;
  2314. info->read_status_mask |=
  2315. UART_LSR_OE |
  2316. UART_LSR_PE |
  2317. UART_LSR_FE;
  2318. }
  2319. }
  2320. /* following add by Victor Yu. 09-02-2002 */
  2321. if (info->IsMoxaMustChipFlag) {
  2322. spin_lock_irqsave(&info->slock, flags);
  2323. SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
  2324. SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
  2325. if (I_IXON(info->tty)) {
  2326. ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  2327. } else {
  2328. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  2329. }
  2330. if (I_IXOFF(info->tty)) {
  2331. ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
  2332. } else {
  2333. DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
  2334. }
  2335. /*
  2336. if ( I_IXANY(info->tty) ) {
  2337. info->MCR |= MOXA_MUST_MCR_XON_ANY;
  2338. ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
  2339. } else {
  2340. info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
  2341. DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
  2342. }
  2343. */
  2344. spin_unlock_irqrestore(&info->slock, flags);
  2345. }
  2346. /* above add by Victor Yu. 09-02-2002 */
  2347. outb(fcr, info->base + UART_FCR); /* set fcr */
  2348. outb(cval, info->base + UART_LCR);
  2349. return ret;
  2350. }
  2351. static int mxser_set_baud(struct mxser_struct *info, long newspd)
  2352. {
  2353. int quot = 0;
  2354. unsigned char cval;
  2355. int ret = 0;
  2356. unsigned long flags;
  2357. if (!info->tty || !info->tty->termios)
  2358. return ret;
  2359. if (!(info->base))
  2360. return ret;
  2361. if (newspd > info->MaxCanSetBaudRate)
  2362. return 0;
  2363. info->realbaud = newspd;
  2364. if (newspd == 134) {
  2365. quot = (2 * info->baud_base / 269);
  2366. } else if (newspd) {
  2367. quot = info->baud_base / newspd;
  2368. if (quot == 0)
  2369. quot = 1;
  2370. } else {
  2371. quot = 0;
  2372. }
  2373. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  2374. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  2375. if (quot) {
  2376. spin_lock_irqsave(&info->slock, flags);
  2377. info->MCR |= UART_MCR_DTR;
  2378. outb(info->MCR, info->base + UART_MCR);
  2379. spin_unlock_irqrestore(&info->slock, flags);
  2380. } else {
  2381. spin_lock_irqsave(&info->slock, flags);
  2382. info->MCR &= ~UART_MCR_DTR;
  2383. outb(info->MCR, info->base + UART_MCR);
  2384. spin_unlock_irqrestore(&info->slock, flags);
  2385. return ret;
  2386. }
  2387. cval = inb(info->base + UART_LCR);
  2388. outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
  2389. outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
  2390. outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
  2391. outb(cval, info->base + UART_LCR); /* reset DLAB */
  2392. return ret;
  2393. }
  2394. /*
  2395. * ------------------------------------------------------------
  2396. * friends of mxser_ioctl()
  2397. * ------------------------------------------------------------
  2398. */
  2399. static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
  2400. {
  2401. struct serial_struct tmp;
  2402. if (!retinfo)
  2403. return -EFAULT;
  2404. memset(&tmp, 0, sizeof(tmp));
  2405. tmp.type = info->type;
  2406. tmp.line = info->port;
  2407. tmp.port = info->base;
  2408. tmp.irq = info->irq;
  2409. tmp.flags = info->flags;
  2410. tmp.baud_base = info->baud_base;
  2411. tmp.close_delay = info->close_delay;
  2412. tmp.closing_wait = info->closing_wait;
  2413. tmp.custom_divisor = info->custom_divisor;
  2414. tmp.hub6 = 0;
  2415. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  2416. return -EFAULT;
  2417. return 0;
  2418. }
  2419. static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
  2420. {
  2421. struct serial_struct new_serial;
  2422. unsigned int flags;
  2423. int retval = 0;
  2424. if (!new_info || !info->base)
  2425. return -EFAULT;
  2426. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  2427. return -EFAULT;
  2428. if ((new_serial.irq != info->irq) ||
  2429. (new_serial.port != info->base) ||
  2430. (new_serial.custom_divisor != info->custom_divisor) ||
  2431. (new_serial.baud_base != info->baud_base))
  2432. return -EPERM;
  2433. flags = info->flags & ASYNC_SPD_MASK;
  2434. if (!capable(CAP_SYS_ADMIN)) {
  2435. if ((new_serial.baud_base != info->baud_base) ||
  2436. (new_serial.close_delay != info->close_delay) ||
  2437. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
  2438. return -EPERM;
  2439. info->flags = ((info->flags & ~ASYNC_USR_MASK) |
  2440. (new_serial.flags & ASYNC_USR_MASK));
  2441. } else {
  2442. /*
  2443. * OK, past this point, all the error checking has been done.
  2444. * At this point, we start making changes.....
  2445. */
  2446. info->flags = ((info->flags & ~ASYNC_FLAGS) |
  2447. (new_serial.flags & ASYNC_FLAGS));
  2448. info->close_delay = new_serial.close_delay * HZ / 100;
  2449. info->closing_wait = new_serial.closing_wait * HZ / 100;
  2450. info->tty->low_latency =
  2451. (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2452. info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
  2453. }
  2454. /* added by casper, 3/17/2000, for mouse */
  2455. info->type = new_serial.type;
  2456. process_txrx_fifo(info);
  2457. if (info->flags & ASYNC_INITIALIZED) {
  2458. if (flags != (info->flags & ASYNC_SPD_MASK)) {
  2459. mxser_change_speed(info, NULL);
  2460. }
  2461. } else {
  2462. retval = mxser_startup(info);
  2463. }
  2464. return retval;
  2465. }
  2466. /*
  2467. * mxser_get_lsr_info - get line status register info
  2468. *
  2469. * Purpose: Let user call ioctl() to get info when the UART physically
  2470. * is emptied. On bus types like RS485, the transmitter must
  2471. * release the bus after transmitting. This must be done when
  2472. * the transmit shift register is empty, not be done when the
  2473. * transmit holding register is empty. This functionality
  2474. * allows an RS485 driver to be written in user space.
  2475. */
  2476. static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
  2477. {
  2478. unsigned char status;
  2479. unsigned int result;
  2480. unsigned long flags;
  2481. spin_lock_irqsave(&info->slock, flags);
  2482. status = inb(info->base + UART_LSR);
  2483. spin_unlock_irqrestore(&info->slock, flags);
  2484. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  2485. return put_user(result, value);
  2486. }
  2487. /*
  2488. * This routine sends a break character out the serial port.
  2489. */
  2490. static void mxser_send_break(struct mxser_struct *info, int duration)
  2491. {
  2492. unsigned long flags;
  2493. if (!info->base)
  2494. return;
  2495. set_current_state(TASK_INTERRUPTIBLE);
  2496. spin_lock_irqsave(&info->slock, flags);
  2497. outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
  2498. info->base + UART_LCR);
  2499. spin_unlock_irqrestore(&info->slock, flags);
  2500. schedule_timeout(duration);
  2501. spin_lock_irqsave(&info->slock, flags);
  2502. outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
  2503. info->base + UART_LCR);
  2504. spin_unlock_irqrestore(&info->slock, flags);
  2505. }
  2506. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  2507. {
  2508. struct mxser_struct *info = tty->driver_data;
  2509. unsigned char control, status;
  2510. unsigned long flags;
  2511. if (tty->index == MXSER_PORTS)
  2512. return -ENOIOCTLCMD;
  2513. if (tty->flags & (1 << TTY_IO_ERROR))
  2514. return -EIO;
  2515. control = info->MCR;
  2516. spin_lock_irqsave(&info->slock, flags);
  2517. status = inb(info->base + UART_MSR);
  2518. if (status & UART_MSR_ANY_DELTA)
  2519. mxser_check_modem_status(info, status);
  2520. spin_unlock_irqrestore(&info->slock, flags);
  2521. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  2522. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  2523. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  2524. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  2525. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  2526. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  2527. }
  2528. static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
  2529. {
  2530. struct mxser_struct *info = tty->driver_data;
  2531. unsigned long flags;
  2532. if (tty->index == MXSER_PORTS)
  2533. return -ENOIOCTLCMD;
  2534. if (tty->flags & (1 << TTY_IO_ERROR))
  2535. return -EIO;
  2536. spin_lock_irqsave(&info->slock, flags);
  2537. if (set & TIOCM_RTS)
  2538. info->MCR |= UART_MCR_RTS;
  2539. if (set & TIOCM_DTR)
  2540. info->MCR |= UART_MCR_DTR;
  2541. if (clear & TIOCM_RTS)
  2542. info->MCR &= ~UART_MCR_RTS;
  2543. if (clear & TIOCM_DTR)
  2544. info->MCR &= ~UART_MCR_DTR;
  2545. outb(info->MCR, info->base + UART_MCR);
  2546. spin_unlock_irqrestore(&info->slock, flags);
  2547. return 0;
  2548. }
  2549. static int mxser_read_register(int, unsigned short *);
  2550. static int mxser_program_mode(int);
  2551. static void mxser_normal_mode(int);
  2552. static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
  2553. {
  2554. int id, i, bits;
  2555. unsigned short regs[16], irq;
  2556. unsigned char scratch, scratch2;
  2557. hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
  2558. id = mxser_read_register(cap, regs);
  2559. if (id == C168_ASIC_ID) {
  2560. hwconf->board_type = MXSER_BOARD_C168_ISA;
  2561. hwconf->ports = 8;
  2562. } else if (id == C104_ASIC_ID) {
  2563. hwconf->board_type = MXSER_BOARD_C104_ISA;
  2564. hwconf->ports = 4;
  2565. } else if (id == C102_ASIC_ID) {
  2566. hwconf->board_type = MXSER_BOARD_C102_ISA;
  2567. hwconf->ports = 2;
  2568. } else if (id == CI132_ASIC_ID) {
  2569. hwconf->board_type = MXSER_BOARD_CI132;
  2570. hwconf->ports = 2;
  2571. } else if (id == CI134_ASIC_ID) {
  2572. hwconf->board_type = MXSER_BOARD_CI134;
  2573. hwconf->ports = 4;
  2574. } else if (id == CI104J_ASIC_ID) {
  2575. hwconf->board_type = MXSER_BOARD_CI104J;
  2576. hwconf->ports = 4;
  2577. } else
  2578. return 0;
  2579. irq = 0;
  2580. if (hwconf->ports == 2) {
  2581. irq = regs[9] & 0xF000;
  2582. irq = irq | (irq >> 4);
  2583. if (irq != (regs[9] & 0xFF00))
  2584. return MXSER_ERR_IRQ_CONFLIT;
  2585. } else if (hwconf->ports == 4) {
  2586. irq = regs[9] & 0xF000;
  2587. irq = irq | (irq >> 4);
  2588. irq = irq | (irq >> 8);
  2589. if (irq != regs[9])
  2590. return MXSER_ERR_IRQ_CONFLIT;
  2591. } else if (hwconf->ports == 8) {
  2592. irq = regs[9] & 0xF000;
  2593. irq = irq | (irq >> 4);
  2594. irq = irq | (irq >> 8);
  2595. if ((irq != regs[9]) || (irq != regs[10]))
  2596. return MXSER_ERR_IRQ_CONFLIT;
  2597. }
  2598. if (!irq)
  2599. return MXSER_ERR_IRQ;
  2600. hwconf->irq = ((int)(irq & 0xF000) >> 12);
  2601. for (i = 0; i < 8; i++)
  2602. hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
  2603. if ((regs[12] & 0x80) == 0)
  2604. return MXSER_ERR_VECTOR;
  2605. hwconf->vector = (int)regs[11]; /* interrupt vector */
  2606. if (id == 1)
  2607. hwconf->vector_mask = 0x00FF;
  2608. else
  2609. hwconf->vector_mask = 0x000F;
  2610. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2611. if (regs[12] & bits) {
  2612. hwconf->baud_base[i] = 921600;
  2613. hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
  2614. } else {
  2615. hwconf->baud_base[i] = 115200;
  2616. hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
  2617. }
  2618. }
  2619. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2620. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2621. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2622. outb(scratch2, cap + UART_LCR);
  2623. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2624. scratch = inb(cap + UART_IIR);
  2625. if (scratch & 0xC0)
  2626. hwconf->uart_type = PORT_16550A;
  2627. else
  2628. hwconf->uart_type = PORT_16450;
  2629. if (id == 1)
  2630. hwconf->ports = 8;
  2631. else
  2632. hwconf->ports = 4;
  2633. request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
  2634. request_region(hwconf->vector, 1, "mxser(vector)");
  2635. return hwconf->ports;
  2636. }
  2637. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  2638. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  2639. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  2640. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  2641. #define EN_CCMD 0x000 /* Chip's command register */
  2642. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  2643. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  2644. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  2645. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  2646. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  2647. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  2648. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  2649. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  2650. static int mxser_read_register(int port, unsigned short *regs)
  2651. {
  2652. int i, k, value, id;
  2653. unsigned int j;
  2654. id = mxser_program_mode(port);
  2655. if (id < 0)
  2656. return id;
  2657. for (i = 0; i < 14; i++) {
  2658. k = (i & 0x3F) | 0x180;
  2659. for (j = 0x100; j > 0; j >>= 1) {
  2660. outb(CHIP_CS, port);
  2661. if (k & j) {
  2662. outb(CHIP_CS | CHIP_DO, port);
  2663. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  2664. } else {
  2665. outb(CHIP_CS, port);
  2666. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  2667. }
  2668. }
  2669. (void)inb(port);
  2670. value = 0;
  2671. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  2672. outb(CHIP_CS, port);
  2673. outb(CHIP_CS | CHIP_SK, port);
  2674. if (inb(port) & CHIP_DI)
  2675. value |= j;
  2676. }
  2677. regs[i] = value;
  2678. outb(0, port);
  2679. }
  2680. mxser_normal_mode(port);
  2681. return id;
  2682. }
  2683. static int mxser_program_mode(int port)
  2684. {
  2685. int id, i, j, n;
  2686. /* unsigned long flags; */
  2687. spin_lock(&gm_lock);
  2688. outb(0, port);
  2689. outb(0, port);
  2690. outb(0, port);
  2691. (void)inb(port);
  2692. (void)inb(port);
  2693. outb(0, port);
  2694. (void)inb(port);
  2695. /* restore_flags(flags); */
  2696. spin_unlock(&gm_lock);
  2697. id = inb(port + 1) & 0x1F;
  2698. if ((id != C168_ASIC_ID) &&
  2699. (id != C104_ASIC_ID) &&
  2700. (id != C102_ASIC_ID) &&
  2701. (id != CI132_ASIC_ID) &&
  2702. (id != CI134_ASIC_ID) &&
  2703. (id != CI104J_ASIC_ID))
  2704. return -1;
  2705. for (i = 0, j = 0; i < 4; i++) {
  2706. n = inb(port + 2);
  2707. if (n == 'M') {
  2708. j = 1;
  2709. } else if ((j == 1) && (n == 1)) {
  2710. j = 2;
  2711. break;
  2712. } else
  2713. j = 0;
  2714. }
  2715. if (j != 2)
  2716. id = -2;
  2717. return id;
  2718. }
  2719. static void mxser_normal_mode(int port)
  2720. {
  2721. int i, n;
  2722. outb(0xA5, port + 1);
  2723. outb(0x80, port + 3);
  2724. outb(12, port + 0); /* 9600 bps */
  2725. outb(0, port + 1);
  2726. outb(0x03, port + 3); /* 8 data bits */
  2727. outb(0x13, port + 4); /* loop back mode */
  2728. for (i = 0; i < 16; i++) {
  2729. n = inb(port + 5);
  2730. if ((n & 0x61) == 0x60)
  2731. break;
  2732. if ((n & 1) == 1)
  2733. (void)inb(port);
  2734. }
  2735. outb(0x00, port + 4);
  2736. }
  2737. module_init(mxser_module_init);
  2738. module_exit(mxser_module_exit);