ati_pcigart.c 6.0 KB

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  1. /**
  2. * \file ati_pcigart.c
  3. * ATI PCI GART support
  4. *
  5. * \author Gareth Hughes <gareth@valinux.com>
  6. */
  7. /*
  8. * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
  9. *
  10. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  11. * All Rights Reserved.
  12. *
  13. * Permission is hereby granted, free of charge, to any person obtaining a
  14. * copy of this software and associated documentation files (the "Software"),
  15. * to deal in the Software without restriction, including without limitation
  16. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  17. * and/or sell copies of the Software, and to permit persons to whom the
  18. * Software is furnished to do so, subject to the following conditions:
  19. *
  20. * The above copyright notice and this permission notice (including the next
  21. * paragraph) shall be included in all copies or substantial portions of the
  22. * Software.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  25. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  26. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  27. * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  28. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  29. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  30. * DEALINGS IN THE SOFTWARE.
  31. */
  32. #include "drmP.h"
  33. # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
  34. static void *drm_ati_alloc_pcigart_table(int order)
  35. {
  36. unsigned long address;
  37. struct page *page;
  38. int i;
  39. DRM_DEBUG("%s: alloc %d order\n", __FUNCTION__, order);
  40. address = __get_free_pages(GFP_KERNEL | __GFP_COMP,
  41. order);
  42. if (address == 0UL) {
  43. return NULL;
  44. }
  45. page = virt_to_page(address);
  46. for (i = 0; i < order; i++, page++)
  47. SetPageReserved(page);
  48. DRM_DEBUG("%s: returning 0x%08lx\n", __FUNCTION__, address);
  49. return (void *)address;
  50. }
  51. static void drm_ati_free_pcigart_table(void *address, int order)
  52. {
  53. struct page *page;
  54. int i;
  55. int num_pages = 1 << order;
  56. DRM_DEBUG("%s\n", __FUNCTION__);
  57. page = virt_to_page((unsigned long)address);
  58. for (i = 0; i < num_pages; i++, page++)
  59. ClearPageReserved(page);
  60. free_pages((unsigned long)address, order);
  61. }
  62. int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  63. {
  64. struct drm_sg_mem *entry = dev->sg;
  65. unsigned long pages;
  66. int i;
  67. int order;
  68. int num_pages, max_pages;
  69. /* we need to support large memory configurations */
  70. if (!entry) {
  71. DRM_ERROR("no scatter/gather memory!\n");
  72. return 0;
  73. }
  74. order = drm_order((gart_info->table_size + (PAGE_SIZE-1)) / PAGE_SIZE);
  75. num_pages = 1 << order;
  76. if (gart_info->bus_addr) {
  77. if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
  78. pci_unmap_single(dev->pdev, gart_info->bus_addr,
  79. num_pages * PAGE_SIZE,
  80. PCI_DMA_TODEVICE);
  81. }
  82. max_pages = (gart_info->table_size / sizeof(u32));
  83. pages = (entry->pages <= max_pages)
  84. ? entry->pages : max_pages;
  85. for (i = 0; i < pages; i++) {
  86. if (!entry->busaddr[i])
  87. break;
  88. pci_unmap_single(dev->pdev, entry->busaddr[i],
  89. PAGE_SIZE, PCI_DMA_TODEVICE);
  90. }
  91. if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
  92. gart_info->bus_addr = 0;
  93. }
  94. if (gart_info->gart_table_location == DRM_ATI_GART_MAIN
  95. && gart_info->addr) {
  96. drm_ati_free_pcigart_table(gart_info->addr, order);
  97. gart_info->addr = NULL;
  98. }
  99. return 1;
  100. }
  101. EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
  102. int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  103. {
  104. struct drm_sg_mem *entry = dev->sg;
  105. void *address = NULL;
  106. unsigned long pages;
  107. u32 *pci_gart, page_base, bus_address = 0;
  108. int i, j, ret = 0;
  109. int order;
  110. int max_pages;
  111. int num_pages;
  112. if (!entry) {
  113. DRM_ERROR("no scatter/gather memory!\n");
  114. goto done;
  115. }
  116. if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
  117. DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
  118. order = drm_order((gart_info->table_size +
  119. (PAGE_SIZE-1)) / PAGE_SIZE);
  120. num_pages = 1 << order;
  121. address = drm_ati_alloc_pcigart_table(order);
  122. if (!address) {
  123. DRM_ERROR("cannot allocate PCI GART page!\n");
  124. goto done;
  125. }
  126. if (!dev->pdev) {
  127. DRM_ERROR("PCI device unknown!\n");
  128. goto done;
  129. }
  130. bus_address = pci_map_single(dev->pdev, address,
  131. num_pages * PAGE_SIZE,
  132. PCI_DMA_TODEVICE);
  133. if (bus_address == 0) {
  134. DRM_ERROR("unable to map PCIGART pages!\n");
  135. order = drm_order((gart_info->table_size +
  136. (PAGE_SIZE-1)) / PAGE_SIZE);
  137. drm_ati_free_pcigart_table(address, order);
  138. address = NULL;
  139. goto done;
  140. }
  141. } else {
  142. address = gart_info->addr;
  143. bus_address = gart_info->bus_addr;
  144. DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
  145. bus_address, (unsigned long)address);
  146. }
  147. pci_gart = (u32 *) address;
  148. max_pages = (gart_info->table_size / sizeof(u32));
  149. pages = (entry->pages <= max_pages)
  150. ? entry->pages : max_pages;
  151. memset(pci_gart, 0, max_pages * sizeof(u32));
  152. for (i = 0; i < pages; i++) {
  153. /* we need to support large memory configurations */
  154. entry->busaddr[i] = pci_map_single(dev->pdev,
  155. page_address(entry->
  156. pagelist[i]),
  157. PAGE_SIZE, PCI_DMA_TODEVICE);
  158. if (entry->busaddr[i] == 0) {
  159. DRM_ERROR("unable to map PCIGART pages!\n");
  160. drm_ati_pcigart_cleanup(dev, gart_info);
  161. address = NULL;
  162. bus_address = 0;
  163. goto done;
  164. }
  165. page_base = (u32) entry->busaddr[i];
  166. for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
  167. switch(gart_info->gart_reg_if) {
  168. case DRM_ATI_GART_IGP:
  169. *pci_gart = cpu_to_le32((page_base) | 0xc);
  170. break;
  171. case DRM_ATI_GART_PCIE:
  172. *pci_gart = cpu_to_le32((page_base >> 8) | 0xc);
  173. break;
  174. default:
  175. case DRM_ATI_GART_PCI:
  176. *pci_gart = cpu_to_le32(page_base);
  177. break;
  178. }
  179. pci_gart++;
  180. page_base += ATI_PCIGART_PAGE_SIZE;
  181. }
  182. }
  183. ret = 1;
  184. #if defined(__i386__) || defined(__x86_64__)
  185. wbinvd();
  186. #else
  187. mb();
  188. #endif
  189. done:
  190. gart_info->addr = address;
  191. gart_info->bus_addr = bus_address;
  192. return ret;
  193. }
  194. EXPORT_SYMBOL(drm_ati_pcigart_init);