sata_uli.c 7.9 KB

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  1. /*
  2. * sata_uli.c - ULi Electronics SATA
  3. *
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2, or (at your option)
  8. * any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; see the file COPYING. If not, write to
  17. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  18. *
  19. *
  20. * libata documentation is available via 'make {ps|pdf}docs',
  21. * as Documentation/DocBook/libata.*
  22. *
  23. * Hardware documentation available under NDA.
  24. *
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/init.h>
  30. #include <linux/blkdev.h>
  31. #include <linux/delay.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/device.h>
  34. #include <scsi/scsi_host.h>
  35. #include <linux/libata.h>
  36. #define DRV_NAME "sata_uli"
  37. #define DRV_VERSION "1.3"
  38. enum {
  39. uli_5289 = 0,
  40. uli_5287 = 1,
  41. uli_5281 = 2,
  42. uli_max_ports = 4,
  43. /* PCI configuration registers */
  44. ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
  45. ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
  46. ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
  47. ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
  48. };
  49. struct uli_priv {
  50. unsigned int scr_cfg_addr[uli_max_ports];
  51. };
  52. static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
  53. static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val);
  54. static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
  55. static const struct pci_device_id uli_pci_tbl[] = {
  56. { PCI_VDEVICE(AL, 0x5289), uli_5289 },
  57. { PCI_VDEVICE(AL, 0x5287), uli_5287 },
  58. { PCI_VDEVICE(AL, 0x5281), uli_5281 },
  59. { } /* terminate list */
  60. };
  61. static struct pci_driver uli_pci_driver = {
  62. .name = DRV_NAME,
  63. .id_table = uli_pci_tbl,
  64. .probe = uli_init_one,
  65. .remove = ata_pci_remove_one,
  66. };
  67. static struct scsi_host_template uli_sht = {
  68. .module = THIS_MODULE,
  69. .name = DRV_NAME,
  70. .ioctl = ata_scsi_ioctl,
  71. .queuecommand = ata_scsi_queuecmd,
  72. .can_queue = ATA_DEF_QUEUE,
  73. .this_id = ATA_SHT_THIS_ID,
  74. .sg_tablesize = LIBATA_MAX_PRD,
  75. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  76. .emulated = ATA_SHT_EMULATED,
  77. .use_clustering = ATA_SHT_USE_CLUSTERING,
  78. .proc_name = DRV_NAME,
  79. .dma_boundary = ATA_DMA_BOUNDARY,
  80. .slave_configure = ata_scsi_slave_config,
  81. .slave_destroy = ata_scsi_slave_destroy,
  82. .bios_param = ata_std_bios_param,
  83. };
  84. static const struct ata_port_operations uli_ops = {
  85. .tf_load = ata_tf_load,
  86. .tf_read = ata_tf_read,
  87. .check_status = ata_check_status,
  88. .exec_command = ata_exec_command,
  89. .dev_select = ata_std_dev_select,
  90. .bmdma_setup = ata_bmdma_setup,
  91. .bmdma_start = ata_bmdma_start,
  92. .bmdma_stop = ata_bmdma_stop,
  93. .bmdma_status = ata_bmdma_status,
  94. .qc_prep = ata_qc_prep,
  95. .qc_issue = ata_qc_issue_prot,
  96. .data_xfer = ata_data_xfer,
  97. .freeze = ata_bmdma_freeze,
  98. .thaw = ata_bmdma_thaw,
  99. .error_handler = ata_bmdma_error_handler,
  100. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  101. .irq_clear = ata_bmdma_irq_clear,
  102. .irq_on = ata_irq_on,
  103. .scr_read = uli_scr_read,
  104. .scr_write = uli_scr_write,
  105. .port_start = ata_port_start,
  106. };
  107. static const struct ata_port_info uli_port_info = {
  108. .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
  109. ATA_FLAG_IGN_SIMPLEX,
  110. .pio_mask = 0x1f, /* pio0-4 */
  111. .udma_mask = ATA_UDMA6,
  112. .port_ops = &uli_ops,
  113. };
  114. MODULE_AUTHOR("Peer Chen");
  115. MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
  116. MODULE_LICENSE("GPL");
  117. MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
  118. MODULE_VERSION(DRV_VERSION);
  119. static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
  120. {
  121. struct uli_priv *hpriv = ap->host->private_data;
  122. return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
  123. }
  124. static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
  125. {
  126. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  127. unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
  128. u32 val;
  129. pci_read_config_dword(pdev, cfg_addr, &val);
  130. return val;
  131. }
  132. static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
  133. {
  134. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  135. unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);
  136. pci_write_config_dword(pdev, cfg_addr, val);
  137. }
  138. static int uli_scr_read (struct ata_port *ap, unsigned int sc_reg, u32 *val)
  139. {
  140. if (sc_reg > SCR_CONTROL)
  141. return -EINVAL;
  142. *val = uli_scr_cfg_read(ap, sc_reg);
  143. return 0;
  144. }
  145. static int uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
  146. {
  147. if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
  148. return -EINVAL;
  149. uli_scr_cfg_write(ap, sc_reg, val);
  150. return 0;
  151. }
  152. static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
  153. {
  154. static int printed_version;
  155. const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
  156. unsigned int board_idx = (unsigned int) ent->driver_data;
  157. struct ata_host *host;
  158. struct uli_priv *hpriv;
  159. void __iomem * const *iomap;
  160. struct ata_ioports *ioaddr;
  161. int n_ports, rc;
  162. if (!printed_version++)
  163. dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
  164. rc = pcim_enable_device(pdev);
  165. if (rc)
  166. return rc;
  167. n_ports = 2;
  168. if (board_idx == uli_5287)
  169. n_ports = 4;
  170. /* allocate the host */
  171. host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
  172. if (!host)
  173. return -ENOMEM;
  174. hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
  175. if (!hpriv)
  176. return -ENOMEM;
  177. host->private_data = hpriv;
  178. /* the first two ports are standard SFF */
  179. rc = ata_pci_init_sff_host(host);
  180. if (rc)
  181. return rc;
  182. rc = ata_pci_init_bmdma(host);
  183. if (rc)
  184. return rc;
  185. iomap = host->iomap;
  186. switch (board_idx) {
  187. case uli_5287:
  188. /* If there are four, the last two live right after
  189. * the standard SFF ports.
  190. */
  191. hpriv->scr_cfg_addr[0] = ULI5287_BASE;
  192. hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
  193. ioaddr = &host->ports[2]->ioaddr;
  194. ioaddr->cmd_addr = iomap[0] + 8;
  195. ioaddr->altstatus_addr =
  196. ioaddr->ctl_addr = (void __iomem *)
  197. ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
  198. ioaddr->bmdma_addr = iomap[4] + 16;
  199. hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
  200. ata_std_ports(ioaddr);
  201. ata_port_desc(host->ports[2],
  202. "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
  203. (unsigned long long)pci_resource_start(pdev, 0) + 8,
  204. ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
  205. (unsigned long long)pci_resource_start(pdev, 4) + 16);
  206. ioaddr = &host->ports[3]->ioaddr;
  207. ioaddr->cmd_addr = iomap[2] + 8;
  208. ioaddr->altstatus_addr =
  209. ioaddr->ctl_addr = (void __iomem *)
  210. ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
  211. ioaddr->bmdma_addr = iomap[4] + 24;
  212. hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
  213. ata_std_ports(ioaddr);
  214. ata_port_desc(host->ports[2],
  215. "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
  216. (unsigned long long)pci_resource_start(pdev, 2) + 9,
  217. ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
  218. (unsigned long long)pci_resource_start(pdev, 4) + 24);
  219. break;
  220. case uli_5289:
  221. hpriv->scr_cfg_addr[0] = ULI5287_BASE;
  222. hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
  223. break;
  224. case uli_5281:
  225. hpriv->scr_cfg_addr[0] = ULI5281_BASE;
  226. hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
  227. break;
  228. default:
  229. BUG();
  230. break;
  231. }
  232. pci_set_master(pdev);
  233. pci_intx(pdev, 1);
  234. return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED,
  235. &uli_sht);
  236. }
  237. static int __init uli_init(void)
  238. {
  239. return pci_register_driver(&uli_pci_driver);
  240. }
  241. static void __exit uli_exit(void)
  242. {
  243. pci_unregister_driver(&uli_pci_driver);
  244. }
  245. module_init(uli_init);
  246. module_exit(uli_exit);