trampoline_64.S 4.2 KB

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  1. /*
  2. *
  3. * Trampoline.S Derived from Setup.S by Linus Torvalds
  4. *
  5. * 4 Jan 1997 Michael Chastain: changed to gnu as.
  6. * 15 Sept 2005 Eric Biederman: 64bit PIC support
  7. *
  8. * Entry: CS:IP point to the start of our code, we are
  9. * in real mode with no stack, but the rest of the
  10. * trampoline page to make our stack and everything else
  11. * is a mystery.
  12. *
  13. * In fact we don't actually need a stack so we don't
  14. * set one up.
  15. *
  16. * On entry to trampoline_data, the processor is in real mode
  17. * with 16-bit addressing and 16-bit data. CS has some value
  18. * and IP is zero. Thus, data addresses need to be absolute
  19. * (no relocation) and are taken with regard to r_base.
  20. *
  21. * With the addition of trampoline_level4_pgt this code can
  22. * now enter a 64bit kernel that lives at arbitrary 64bit
  23. * physical addresses.
  24. *
  25. * If you work on this file, check the object module with objdump
  26. * --full-contents --reloc to make sure there are no relocation
  27. * entries.
  28. */
  29. #include <linux/linkage.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/page.h>
  32. #include <asm/msr.h>
  33. #include <asm/segment.h>
  34. /* We can free up trampoline after bootup if cpu hotplug is not supported. */
  35. #ifndef CONFIG_HOTPLUG_CPU
  36. .section .init.data, "aw", @progbits
  37. #else
  38. .section .rodata, "a", @progbits
  39. #endif
  40. .code16
  41. ENTRY(trampoline_data)
  42. r_base = .
  43. cli # We should be safe anyway
  44. wbinvd
  45. mov %cs, %ax # Code and data in the same place
  46. mov %ax, %ds
  47. mov %ax, %es
  48. mov %ax, %ss
  49. movl $0xA5A5A5A5, trampoline_data - r_base
  50. # write marker for master knows we're running
  51. # Setup stack
  52. movw $(trampoline_stack_end - r_base), %sp
  53. call verify_cpu # Verify the cpu supports long mode
  54. testl %eax, %eax # Check for return code
  55. jnz no_longmode
  56. mov %cs, %ax
  57. movzx %ax, %esi # Find the 32bit trampoline location
  58. shll $4, %esi
  59. # Fixup the vectors
  60. addl %esi, startup_32_vector - r_base
  61. addl %esi, startup_64_vector - r_base
  62. addl %esi, tgdt + 2 - r_base # Fixup the gdt pointer
  63. /*
  64. * GDT tables in non default location kernel can be beyond 16MB and
  65. * lgdt will not be able to load the address as in real mode default
  66. * operand size is 16bit. Use lgdtl instead to force operand size
  67. * to 32 bit.
  68. */
  69. lidtl tidt - r_base # load idt with 0, 0
  70. lgdtl tgdt - r_base # load gdt with whatever is appropriate
  71. xor %ax, %ax
  72. inc %ax # protected mode (PE) bit
  73. lmsw %ax # into protected mode
  74. # flush prefetch and jump to startup_32
  75. ljmpl *(startup_32_vector - r_base)
  76. .code32
  77. .balign 4
  78. startup_32:
  79. movl $__KERNEL_DS, %eax # Initialize the %ds segment register
  80. movl %eax, %ds
  81. xorl %eax, %eax
  82. btsl $5, %eax # Enable PAE mode
  83. movl %eax, %cr4
  84. # Setup trampoline 4 level pagetables
  85. leal (trampoline_level4_pgt - r_base)(%esi), %eax
  86. movl %eax, %cr3
  87. movl $MSR_EFER, %ecx
  88. movl $(1 << _EFER_LME), %eax # Enable Long Mode
  89. xorl %edx, %edx
  90. wrmsr
  91. xorl %eax, %eax
  92. btsl $31, %eax # Enable paging and in turn activate Long Mode
  93. btsl $0, %eax # Enable protected mode
  94. movl %eax, %cr0
  95. /*
  96. * At this point we're in long mode but in 32bit compatibility mode
  97. * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
  98. * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we use
  99. * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
  100. */
  101. ljmp *(startup_64_vector - r_base)(%esi)
  102. .code64
  103. .balign 4
  104. startup_64:
  105. # Now jump into the kernel using virtual addresses
  106. movq $secondary_startup_64, %rax
  107. jmp *%rax
  108. .code16
  109. no_longmode:
  110. hlt
  111. jmp no_longmode
  112. #include "verify_cpu_64.S"
  113. # Careful these need to be in the same 64K segment as the above;
  114. tidt:
  115. .word 0 # idt limit = 0
  116. .word 0, 0 # idt base = 0L
  117. # Duplicate the global descriptor table
  118. # so the kernel can live anywhere
  119. .balign 4
  120. tgdt:
  121. .short tgdt_end - tgdt # gdt limit
  122. .long tgdt - r_base
  123. .short 0
  124. .quad 0x00cf9b000000ffff # __KERNEL32_CS
  125. .quad 0x00af9b000000ffff # __KERNEL_CS
  126. .quad 0x00cf93000000ffff # __KERNEL_DS
  127. tgdt_end:
  128. .balign 4
  129. startup_32_vector:
  130. .long startup_32 - r_base
  131. .word __KERNEL32_CS, 0
  132. .balign 4
  133. startup_64_vector:
  134. .long startup_64 - r_base
  135. .word __KERNEL_CS, 0
  136. trampoline_stack:
  137. .org 0x1000
  138. trampoline_stack_end:
  139. ENTRY(trampoline_level4_pgt)
  140. .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
  141. .fill 510,8,0
  142. .quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
  143. ENTRY(trampoline_end)