suspend_64.c 8.0 KB

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  1. /*
  2. * Suspend support specific for i386.
  3. *
  4. * Distribute under GPLv2
  5. *
  6. * Copyright (c) 2002 Pavel Machek <pavel@suse.cz>
  7. * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org>
  8. */
  9. #include <linux/smp.h>
  10. #include <linux/suspend.h>
  11. #include <asm/proto.h>
  12. #include <asm/page.h>
  13. #include <asm/pgtable.h>
  14. #include <asm/mtrr.h>
  15. /* References to section boundaries */
  16. extern const void __nosave_begin, __nosave_end;
  17. struct saved_context saved_context;
  18. unsigned long saved_context_eax, saved_context_ebx, saved_context_ecx, saved_context_edx;
  19. unsigned long saved_context_esp, saved_context_ebp, saved_context_esi, saved_context_edi;
  20. unsigned long saved_context_r08, saved_context_r09, saved_context_r10, saved_context_r11;
  21. unsigned long saved_context_r12, saved_context_r13, saved_context_r14, saved_context_r15;
  22. unsigned long saved_context_eflags;
  23. void __save_processor_state(struct saved_context *ctxt)
  24. {
  25. kernel_fpu_begin();
  26. /*
  27. * descriptor tables
  28. */
  29. store_gdt((struct desc_ptr *)&ctxt->gdt_limit);
  30. store_idt((struct desc_ptr *)&ctxt->idt_limit);
  31. store_tr(ctxt->tr);
  32. /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
  33. /*
  34. * segment registers
  35. */
  36. asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds));
  37. asm volatile ("movw %%es, %0" : "=m" (ctxt->es));
  38. asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs));
  39. asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs));
  40. asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss));
  41. rdmsrl(MSR_FS_BASE, ctxt->fs_base);
  42. rdmsrl(MSR_GS_BASE, ctxt->gs_base);
  43. rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
  44. mtrr_save_fixed_ranges(NULL);
  45. /*
  46. * control registers
  47. */
  48. rdmsrl(MSR_EFER, ctxt->efer);
  49. ctxt->cr0 = read_cr0();
  50. ctxt->cr2 = read_cr2();
  51. ctxt->cr3 = read_cr3();
  52. ctxt->cr4 = read_cr4();
  53. ctxt->cr8 = read_cr8();
  54. }
  55. void save_processor_state(void)
  56. {
  57. __save_processor_state(&saved_context);
  58. }
  59. static void do_fpu_end(void)
  60. {
  61. /*
  62. * Restore FPU regs if necessary
  63. */
  64. kernel_fpu_end();
  65. }
  66. void __restore_processor_state(struct saved_context *ctxt)
  67. {
  68. /*
  69. * control registers
  70. */
  71. wrmsrl(MSR_EFER, ctxt->efer);
  72. write_cr8(ctxt->cr8);
  73. write_cr4(ctxt->cr4);
  74. write_cr3(ctxt->cr3);
  75. write_cr2(ctxt->cr2);
  76. write_cr0(ctxt->cr0);
  77. /*
  78. * now restore the descriptor tables to their proper values
  79. * ltr is done i fix_processor_context().
  80. */
  81. load_gdt((const struct desc_ptr *)&ctxt->gdt_limit);
  82. load_idt((const struct desc_ptr *)&ctxt->idt_limit);
  83. /*
  84. * segment registers
  85. */
  86. asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds));
  87. asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
  88. asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs));
  89. load_gs_index(ctxt->gs);
  90. asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
  91. wrmsrl(MSR_FS_BASE, ctxt->fs_base);
  92. wrmsrl(MSR_GS_BASE, ctxt->gs_base);
  93. wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
  94. fix_processor_context();
  95. do_fpu_end();
  96. mtrr_ap_init();
  97. }
  98. void restore_processor_state(void)
  99. {
  100. __restore_processor_state(&saved_context);
  101. }
  102. void fix_processor_context(void)
  103. {
  104. int cpu = smp_processor_id();
  105. struct tss_struct *t = &per_cpu(init_tss, cpu);
  106. set_tss_desc(cpu,t); /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
  107. cpu_gdt(cpu)[GDT_ENTRY_TSS].type = 9;
  108. syscall_init(); /* This sets MSR_*STAR and related */
  109. load_TR_desc(); /* This does ltr */
  110. load_LDT(&current->active_mm->context); /* This does lldt */
  111. /*
  112. * Now maybe reload the debug registers
  113. */
  114. if (current->thread.debugreg7){
  115. loaddebug(&current->thread, 0);
  116. loaddebug(&current->thread, 1);
  117. loaddebug(&current->thread, 2);
  118. loaddebug(&current->thread, 3);
  119. /* no 4 and 5 */
  120. loaddebug(&current->thread, 6);
  121. loaddebug(&current->thread, 7);
  122. }
  123. }
  124. #ifdef CONFIG_HIBERNATION
  125. /* Defined in arch/x86_64/kernel/suspend_asm.S */
  126. extern int restore_image(void);
  127. /*
  128. * Address to jump to in the last phase of restore in order to get to the image
  129. * kernel's text (this value is passed in the image header).
  130. */
  131. unsigned long restore_jump_address;
  132. /*
  133. * Value of the cr3 register from before the hibernation (this value is passed
  134. * in the image header).
  135. */
  136. unsigned long restore_cr3;
  137. pgd_t *temp_level4_pgt;
  138. void *relocated_restore_code;
  139. static int res_phys_pud_init(pud_t *pud, unsigned long address, unsigned long end)
  140. {
  141. long i, j;
  142. i = pud_index(address);
  143. pud = pud + i;
  144. for (; i < PTRS_PER_PUD; pud++, i++) {
  145. unsigned long paddr;
  146. pmd_t *pmd;
  147. paddr = address + i*PUD_SIZE;
  148. if (paddr >= end)
  149. break;
  150. pmd = (pmd_t *)get_safe_page(GFP_ATOMIC);
  151. if (!pmd)
  152. return -ENOMEM;
  153. set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
  154. for (j = 0; j < PTRS_PER_PMD; pmd++, j++, paddr += PMD_SIZE) {
  155. unsigned long pe;
  156. if (paddr >= end)
  157. break;
  158. pe = __PAGE_KERNEL_LARGE_EXEC | paddr;
  159. pe &= __supported_pte_mask;
  160. set_pmd(pmd, __pmd(pe));
  161. }
  162. }
  163. return 0;
  164. }
  165. static int res_kernel_text_pud_init(pud_t *pud, unsigned long start)
  166. {
  167. pmd_t *pmd;
  168. unsigned long paddr;
  169. pmd = (pmd_t *)get_safe_page(GFP_ATOMIC);
  170. if (!pmd)
  171. return -ENOMEM;
  172. set_pud(pud + pud_index(start), __pud(__pa(pmd) | _KERNPG_TABLE));
  173. for (paddr = 0; paddr < KERNEL_TEXT_SIZE; pmd++, paddr += PMD_SIZE) {
  174. unsigned long pe;
  175. pe = __PAGE_KERNEL_LARGE_EXEC | _PAGE_GLOBAL | paddr;
  176. pe &= __supported_pte_mask;
  177. set_pmd(pmd, __pmd(pe));
  178. }
  179. return 0;
  180. }
  181. static int set_up_temporary_mappings(void)
  182. {
  183. unsigned long start, end, next;
  184. pud_t *pud;
  185. int error;
  186. temp_level4_pgt = (pgd_t *)get_safe_page(GFP_ATOMIC);
  187. if (!temp_level4_pgt)
  188. return -ENOMEM;
  189. /* Set up the direct mapping from scratch */
  190. start = (unsigned long)pfn_to_kaddr(0);
  191. end = (unsigned long)pfn_to_kaddr(end_pfn);
  192. for (; start < end; start = next) {
  193. pud = (pud_t *)get_safe_page(GFP_ATOMIC);
  194. if (!pud)
  195. return -ENOMEM;
  196. next = start + PGDIR_SIZE;
  197. if (next > end)
  198. next = end;
  199. if ((error = res_phys_pud_init(pud, __pa(start), __pa(next))))
  200. return error;
  201. set_pgd(temp_level4_pgt + pgd_index(start),
  202. mk_kernel_pgd(__pa(pud)));
  203. }
  204. /* Set up the kernel text mapping from scratch */
  205. pud = (pud_t *)get_safe_page(GFP_ATOMIC);
  206. if (!pud)
  207. return -ENOMEM;
  208. error = res_kernel_text_pud_init(pud, __START_KERNEL_map);
  209. if (!error)
  210. set_pgd(temp_level4_pgt + pgd_index(__START_KERNEL_map),
  211. __pgd(__pa(pud) | _PAGE_TABLE));
  212. return error;
  213. }
  214. int swsusp_arch_resume(void)
  215. {
  216. int error;
  217. /* We have got enough memory and from now on we cannot recover */
  218. if ((error = set_up_temporary_mappings()))
  219. return error;
  220. relocated_restore_code = (void *)get_safe_page(GFP_ATOMIC);
  221. if (!relocated_restore_code)
  222. return -ENOMEM;
  223. memcpy(relocated_restore_code, &core_restore_code,
  224. &restore_registers - &core_restore_code);
  225. restore_image();
  226. return 0;
  227. }
  228. /*
  229. * pfn_is_nosave - check if given pfn is in the 'nosave' section
  230. */
  231. int pfn_is_nosave(unsigned long pfn)
  232. {
  233. unsigned long nosave_begin_pfn = __pa_symbol(&__nosave_begin) >> PAGE_SHIFT;
  234. unsigned long nosave_end_pfn = PAGE_ALIGN(__pa_symbol(&__nosave_end)) >> PAGE_SHIFT;
  235. return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
  236. }
  237. struct restore_data_record {
  238. unsigned long jump_address;
  239. unsigned long cr3;
  240. unsigned long magic;
  241. };
  242. #define RESTORE_MAGIC 0x0123456789ABCDEFUL
  243. /**
  244. * arch_hibernation_header_save - populate the architecture specific part
  245. * of a hibernation image header
  246. * @addr: address to save the data at
  247. */
  248. int arch_hibernation_header_save(void *addr, unsigned int max_size)
  249. {
  250. struct restore_data_record *rdr = addr;
  251. if (max_size < sizeof(struct restore_data_record))
  252. return -EOVERFLOW;
  253. rdr->jump_address = restore_jump_address;
  254. rdr->cr3 = restore_cr3;
  255. rdr->magic = RESTORE_MAGIC;
  256. return 0;
  257. }
  258. /**
  259. * arch_hibernation_header_restore - read the architecture specific data
  260. * from the hibernation image header
  261. * @addr: address to read the data from
  262. */
  263. int arch_hibernation_header_restore(void *addr)
  264. {
  265. struct restore_data_record *rdr = addr;
  266. restore_jump_address = rdr->jump_address;
  267. restore_cr3 = rdr->cr3;
  268. return (rdr->magic == RESTORE_MAGIC) ? 0 : -EINVAL;
  269. }
  270. #endif /* CONFIG_HIBERNATION */