treeboot-walnut.c 3.3 KB

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  1. /*
  2. * Old U-boot compatibility for Walnut
  3. *
  4. * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
  5. *
  6. * Copyright 2007 IBM Corporation
  7. * Based on cuboot-83xx.c, which is:
  8. * Copyright (c) 2007 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License version 2 as published
  12. * by the Free Software Foundation.
  13. */
  14. #include "ops.h"
  15. #include "stdio.h"
  16. #include "dcr.h"
  17. #include "4xx.h"
  18. #include "io.h"
  19. BSS_STACK(4096);
  20. void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
  21. {
  22. u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
  23. u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
  24. u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
  25. u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
  26. u32 fwdv, fbdv, cbdv, opdv, epdv, udiv;
  27. fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
  28. fbdv = (pllmr & 0x1e000000) >> 25;
  29. cbdv = ((pllmr & 0x00060000) >> 17) + 1;
  30. opdv = ((pllmr & 0x00018000) >> 15) + 1;
  31. epdv = ((pllmr & 0x00001800) >> 13) + 2;
  32. udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
  33. m = fwdv * fbdv * cbdv;
  34. cpu = sysclk * m / fwdv;
  35. plb = cpu / cbdv;
  36. opb = plb / opdv;
  37. ebc = plb / epdv;
  38. if (cpc0_cr0 & 0x80) {
  39. /* uart0 uses the external clock */
  40. uart0 = ser_clk;
  41. } else {
  42. uart0 = cpu / udiv;
  43. }
  44. if (cpc0_cr0 & 0x40) {
  45. /* uart1 uses the external clock */
  46. uart1 = ser_clk;
  47. } else {
  48. uart1 = cpu / udiv;
  49. }
  50. /* setup the timebase clock to tick at the cpu frequency */
  51. cpc0_cr1 = cpc0_cr1 & ~ 0x00800000;
  52. mtdcr(DCRN_CPC0_CR1, cpc0_cr1);
  53. tb = cpu;
  54. dt_fixup_cpu_clocks(cpu, tb, 0);
  55. dt_fixup_clock("/plb", plb);
  56. dt_fixup_clock("/plb/opb", opb);
  57. dt_fixup_clock("/plb/ebc", ebc);
  58. dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
  59. dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
  60. }
  61. static void walnut_flashsel_fixup(void)
  62. {
  63. void *devp, *sram;
  64. u32 reg_flash[3] = {0x0, 0x0, 0x80000};
  65. u32 reg_sram[3] = {0x0, 0x0, 0x80000};
  66. u8 *fpga;
  67. u8 fpga_brds1 = 0x0;
  68. devp = finddevice("/plb/ebc/fpga");
  69. if (!devp)
  70. fatal("Couldn't locate FPGA node\n\r");
  71. if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
  72. fatal("no virtual-reg property\n\r");
  73. fpga_brds1 = in_8(fpga);
  74. devp = finddevice("/plb/ebc/flash");
  75. if (!devp)
  76. fatal("Couldn't locate flash node\n\r");
  77. if (getprop(devp, "reg", reg_flash, sizeof(reg_flash)) != sizeof(reg_flash))
  78. fatal("flash reg property has unexpected size\n\r");
  79. sram = finddevice("/plb/ebc/sram");
  80. if (!sram)
  81. fatal("Couldn't locate sram node\n\r");
  82. if (getprop(sram, "reg", reg_sram, sizeof(reg_sram)) != sizeof(reg_sram))
  83. fatal("sram reg property has unexpected size\n\r");
  84. if (fpga_brds1 & 0x1) {
  85. reg_flash[1] ^= 0x80000;
  86. reg_sram[1] ^= 0x80000;
  87. }
  88. setprop(devp, "reg", reg_flash, sizeof(reg_flash));
  89. setprop(sram, "reg", reg_sram, sizeof(reg_sram));
  90. }
  91. static void walnut_fixups(void)
  92. {
  93. ibm4xx_fixup_memsize();
  94. ibm405gp_fixup_clocks(33330000, 0xa8c000);
  95. ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
  96. ibm4xx_fixup_ebc_ranges("/plb/ebc");
  97. walnut_flashsel_fixup();
  98. }
  99. void platform_init(void)
  100. {
  101. unsigned long end_of_ram = 0x2000000;
  102. unsigned long avail_ram = end_of_ram - (unsigned long) _end;
  103. simple_alloc_init(_end, avail_ram, 32, 32);
  104. platform_ops.fixups = walnut_fixups;
  105. platform_ops.exit = ibm40x_dbcr_reset;
  106. ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
  107. serial_console_init();
  108. }