processor.c 11 KB

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  1. /* $Id: processor.c,v 1.1 2002/07/20 16:27:06 rhirst Exp $
  2. *
  3. * Initial setup-routines for HP 9000 based hardware.
  4. *
  5. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  6. * Modifications for PA-RISC (C) 1999 Helge Deller <deller@gmx.de>
  7. * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
  8. * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
  9. * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
  10. * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
  11. *
  12. * Initial PA-RISC Version: 04-23-1999 by Helge Deller
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2, or (at your option)
  17. * any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27. *
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/mm.h>
  32. #include <linux/module.h>
  33. #include <linux/seq_file.h>
  34. #include <linux/slab.h>
  35. #include <linux/cpu.h>
  36. #include <asm/param.h>
  37. #include <asm/cache.h>
  38. #include <asm/hardware.h> /* for register_parisc_driver() stuff */
  39. #include <asm/processor.h>
  40. #include <asm/page.h>
  41. #include <asm/pdc.h>
  42. #include <asm/pdcpat.h>
  43. #include <asm/irq.h> /* for struct irq_region */
  44. #include <asm/parisc-device.h>
  45. struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
  46. EXPORT_SYMBOL(boot_cpu_data);
  47. struct cpuinfo_parisc cpu_data[NR_CPUS] __read_mostly;
  48. extern int update_cr16_clocksource(void); /* from time.c */
  49. /*
  50. ** PARISC CPU driver - claim "device" and initialize CPU data structures.
  51. **
  52. ** Consolidate per CPU initialization into (mostly) one module.
  53. ** Monarch CPU will initialize boot_cpu_data which shouldn't
  54. ** change once the system has booted.
  55. **
  56. ** The callback *should* do per-instance initialization of
  57. ** everything including the monarch. "Per CPU" init code in
  58. ** setup.c:start_parisc() has migrated here and start_parisc()
  59. ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
  60. **
  61. ** The goal of consolidating CPU initialization into one place is
  62. ** to make sure all CPUs get initialized the same way.
  63. ** The code path not shared is how PDC hands control of the CPU to the OS.
  64. ** The initialization of OS data structures is the same (done below).
  65. */
  66. /**
  67. * processor_probe - Determine if processor driver should claim this device.
  68. * @dev: The device which has been found.
  69. *
  70. * Determine if processor driver should claim this chip (return 0) or not
  71. * (return 1). If so, initialize the chip and tell other partners in crime
  72. * they have work to do.
  73. */
  74. static int __cpuinit processor_probe(struct parisc_device *dev)
  75. {
  76. unsigned long txn_addr;
  77. unsigned long cpuid;
  78. struct cpuinfo_parisc *p;
  79. #ifndef CONFIG_SMP
  80. if (boot_cpu_data.cpu_count > 0) {
  81. printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
  82. return 1;
  83. }
  84. #endif
  85. /* logical CPU ID and update global counter
  86. * May get overwritten by PAT code.
  87. */
  88. cpuid = boot_cpu_data.cpu_count;
  89. txn_addr = dev->hpa.start; /* for legacy PDC */
  90. #ifdef CONFIG_64BIT
  91. if (is_pdc_pat()) {
  92. ulong status;
  93. unsigned long bytecnt;
  94. pdc_pat_cell_mod_maddr_block_t pa_pdc_cell;
  95. #undef USE_PAT_CPUID
  96. #ifdef USE_PAT_CPUID
  97. struct pdc_pat_cpu_num cpu_info;
  98. #endif
  99. status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
  100. dev->mod_index, PA_VIEW, &pa_pdc_cell);
  101. BUG_ON(PDC_OK != status);
  102. /* verify it's the same as what do_pat_inventory() found */
  103. BUG_ON(dev->mod_info != pa_pdc_cell.mod_info);
  104. BUG_ON(dev->pmod_loc != pa_pdc_cell.mod_location);
  105. txn_addr = pa_pdc_cell.mod[0]; /* id_eid for IO sapic */
  106. #ifdef USE_PAT_CPUID
  107. /* We need contiguous numbers for cpuid. Firmware's notion
  108. * of cpuid is for physical CPUs and we just don't care yet.
  109. * We'll care when we need to query PAT PDC about a CPU *after*
  110. * boot time (ie shutdown a CPU from an OS perspective).
  111. */
  112. /* get the cpu number */
  113. status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
  114. BUG_ON(PDC_OK != status);
  115. if (cpu_info.cpu_num >= NR_CPUS) {
  116. printk(KERN_WARNING "IGNORING CPU at 0x%x,"
  117. " cpu_slot_id > NR_CPUS"
  118. " (%ld > %d)\n",
  119. dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
  120. /* Ignore CPU since it will only crash */
  121. boot_cpu_data.cpu_count--;
  122. return 1;
  123. } else {
  124. cpuid = cpu_info.cpu_num;
  125. }
  126. #endif
  127. }
  128. #endif
  129. p = &cpu_data[cpuid];
  130. boot_cpu_data.cpu_count++;
  131. /* initialize counters - CPU 0 gets it_value set in time_init() */
  132. if (cpuid)
  133. memset(p, 0, sizeof(struct cpuinfo_parisc));
  134. p->loops_per_jiffy = loops_per_jiffy;
  135. p->dev = dev; /* Save IODC data in case we need it */
  136. p->hpa = dev->hpa.start; /* save CPU hpa */
  137. p->cpuid = cpuid; /* save CPU id */
  138. p->txn_addr = txn_addr; /* save CPU IRQ address */
  139. #ifdef CONFIG_SMP
  140. /*
  141. ** FIXME: review if any other initialization is clobbered
  142. ** for boot_cpu by the above memset().
  143. */
  144. /* stolen from init_percpu_prof() */
  145. cpu_data[cpuid].prof_counter = 1;
  146. cpu_data[cpuid].prof_multiplier = 1;
  147. #endif
  148. /*
  149. ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
  150. ** OS control. RENDEZVOUS is the default state - see mem_set above.
  151. ** p->state = STATE_RENDEZVOUS;
  152. */
  153. #if 0
  154. /* CPU 0 IRQ table is statically allocated/initialized */
  155. if (cpuid) {
  156. struct irqaction actions[];
  157. /*
  158. ** itimer and ipi IRQ handlers are statically initialized in
  159. ** arch/parisc/kernel/irq.c. ie Don't need to register them.
  160. */
  161. actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
  162. if (!actions) {
  163. /* not getting it's own table, share with monarch */
  164. actions = cpu_irq_actions[0];
  165. }
  166. cpu_irq_actions[cpuid] = actions;
  167. }
  168. #endif
  169. /*
  170. * Bring this CPU up now! (ignore bootstrap cpuid == 0)
  171. */
  172. #ifdef CONFIG_SMP
  173. if (cpuid) {
  174. cpu_set(cpuid, cpu_present_map);
  175. cpu_up(cpuid);
  176. }
  177. #endif
  178. /* If we've registered more than one cpu,
  179. * we'll use the jiffies clocksource since cr16
  180. * is not synchronized between CPUs.
  181. */
  182. update_cr16_clocksource();
  183. return 0;
  184. }
  185. /**
  186. * collect_boot_cpu_data - Fill the boot_cpu_data structure.
  187. *
  188. * This function collects and stores the generic processor information
  189. * in the boot_cpu_data structure.
  190. */
  191. void __init collect_boot_cpu_data(void)
  192. {
  193. memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
  194. boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
  195. /* get CPU-Model Information... */
  196. #define p ((unsigned long *)&boot_cpu_data.pdc.model)
  197. if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK)
  198. printk(KERN_INFO
  199. "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
  200. p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
  201. #undef p
  202. if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK)
  203. printk(KERN_INFO "vers %08lx\n",
  204. boot_cpu_data.pdc.versions);
  205. if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK)
  206. printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
  207. (boot_cpu_data.pdc.cpuid >> 5) & 127,
  208. boot_cpu_data.pdc.cpuid & 31,
  209. boot_cpu_data.pdc.cpuid);
  210. if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
  211. printk(KERN_INFO "capabilities 0x%lx\n",
  212. boot_cpu_data.pdc.capabilities);
  213. if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
  214. printk(KERN_INFO "model %s\n",
  215. boot_cpu_data.pdc.sys_model_name);
  216. boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
  217. boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
  218. boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
  219. boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
  220. boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
  221. }
  222. /**
  223. * init_cpu_profiler - enable/setup per cpu profiling hooks.
  224. * @cpunum: The processor instance.
  225. *
  226. * FIXME: doesn't do much yet...
  227. */
  228. static inline void __init
  229. init_percpu_prof(int cpunum)
  230. {
  231. cpu_data[cpunum].prof_counter = 1;
  232. cpu_data[cpunum].prof_multiplier = 1;
  233. }
  234. /**
  235. * init_per_cpu - Handle individual processor initializations.
  236. * @cpunum: logical processor number.
  237. *
  238. * This function handles initialization for *every* CPU
  239. * in the system:
  240. *
  241. * o Set "default" CPU width for trap handlers
  242. *
  243. * o Enable FP coprocessor
  244. * REVISIT: this could be done in the "code 22" trap handler.
  245. * (frowands idea - that way we know which processes need FP
  246. * registers saved on the interrupt stack.)
  247. * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
  248. * formatted printing of %lx for example (double divides I think)
  249. *
  250. * o Enable CPU profiling hooks.
  251. */
  252. int __init init_per_cpu(int cpunum)
  253. {
  254. int ret;
  255. struct pdc_coproc_cfg coproc_cfg;
  256. set_firmware_width();
  257. ret = pdc_coproc_cfg(&coproc_cfg);
  258. if(ret >= 0 && coproc_cfg.ccr_functional) {
  259. mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
  260. /* FWIW, FP rev/model is a more accurate way to determine
  261. ** CPU type. CPU rev/model has some ambiguous cases.
  262. */
  263. cpu_data[cpunum].fp_rev = coproc_cfg.revision;
  264. cpu_data[cpunum].fp_model = coproc_cfg.model;
  265. printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
  266. cpunum, coproc_cfg.revision, coproc_cfg.model);
  267. /*
  268. ** store status register to stack (hopefully aligned)
  269. ** and clear the T-bit.
  270. */
  271. asm volatile ("fstd %fr0,8(%sp)");
  272. } else {
  273. printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
  274. " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
  275. #ifdef CONFIG_64BIT
  276. "Halting Machine - FP required\n"
  277. #endif
  278. , coproc_cfg.ccr_functional);
  279. #ifdef CONFIG_64BIT
  280. mdelay(100); /* previous chars get pushed to console */
  281. panic("FP CoProc not reported");
  282. #endif
  283. }
  284. /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
  285. init_percpu_prof(cpunum);
  286. return ret;
  287. }
  288. /*
  289. * Display CPU info for all CPUs.
  290. */
  291. int
  292. show_cpuinfo (struct seq_file *m, void *v)
  293. {
  294. int n;
  295. for(n=0; n<boot_cpu_data.cpu_count; n++) {
  296. #ifdef CONFIG_SMP
  297. if (0 == cpu_data[n].hpa)
  298. continue;
  299. #endif
  300. seq_printf(m, "processor\t: %d\n"
  301. "cpu family\t: PA-RISC %s\n",
  302. n, boot_cpu_data.family_name);
  303. seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
  304. /* cpu MHz */
  305. seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
  306. boot_cpu_data.cpu_hz / 1000000,
  307. boot_cpu_data.cpu_hz % 1000000 );
  308. seq_printf(m, "model\t\t: %s\n"
  309. "model name\t: %s\n",
  310. boot_cpu_data.pdc.sys_model_name,
  311. cpu_data[n].dev ?
  312. cpu_data[n].dev->name : "Unknown" );
  313. seq_printf(m, "hversion\t: 0x%08x\n"
  314. "sversion\t: 0x%08x\n",
  315. boot_cpu_data.hversion,
  316. boot_cpu_data.sversion );
  317. /* print cachesize info */
  318. show_cache_info(m);
  319. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  320. cpu_data[n].loops_per_jiffy / (500000 / HZ),
  321. (cpu_data[n].loops_per_jiffy / (5000 / HZ)) % 100);
  322. seq_printf(m, "software id\t: %ld\n\n",
  323. boot_cpu_data.pdc.model.sw_id);
  324. }
  325. return 0;
  326. }
  327. static const struct parisc_device_id processor_tbl[] = {
  328. { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
  329. { 0, }
  330. };
  331. static struct parisc_driver cpu_driver = {
  332. .name = "CPU",
  333. .id_table = processor_tbl,
  334. .probe = processor_probe
  335. };
  336. /**
  337. * processor_init - Processor initialization procedure.
  338. *
  339. * Register this driver.
  340. */
  341. void __init processor_init(void)
  342. {
  343. register_parisc_driver(&cpu_driver);
  344. }