process.c 22 KB

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  1. /*
  2. * Architecture-specific setup.
  3. *
  4. * Copyright (C) 1998-2003 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
  7. *
  8. * 2005-10-07 Keith Owens <kaos@sgi.com>
  9. * Add notify_die() hooks.
  10. */
  11. #include <linux/cpu.h>
  12. #include <linux/pm.h>
  13. #include <linux/elf.h>
  14. #include <linux/errno.h>
  15. #include <linux/kallsyms.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mm.h>
  18. #include <linux/module.h>
  19. #include <linux/notifier.h>
  20. #include <linux/personality.h>
  21. #include <linux/sched.h>
  22. #include <linux/slab.h>
  23. #include <linux/stddef.h>
  24. #include <linux/thread_info.h>
  25. #include <linux/unistd.h>
  26. #include <linux/efi.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/delay.h>
  29. #include <linux/kdebug.h>
  30. #include <asm/cpu.h>
  31. #include <asm/delay.h>
  32. #include <asm/elf.h>
  33. #include <asm/ia32.h>
  34. #include <asm/irq.h>
  35. #include <asm/kexec.h>
  36. #include <asm/pgalloc.h>
  37. #include <asm/processor.h>
  38. #include <asm/sal.h>
  39. #include <asm/tlbflush.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/unwind.h>
  42. #include <asm/user.h>
  43. #include "entry.h"
  44. #ifdef CONFIG_PERFMON
  45. # include <asm/perfmon.h>
  46. #endif
  47. #include "sigframe.h"
  48. void (*ia64_mark_idle)(int);
  49. static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
  50. unsigned long boot_option_idle_override = 0;
  51. EXPORT_SYMBOL(boot_option_idle_override);
  52. void
  53. ia64_do_show_stack (struct unw_frame_info *info, void *arg)
  54. {
  55. unsigned long ip, sp, bsp;
  56. char buf[128]; /* don't make it so big that it overflows the stack! */
  57. printk("\nCall Trace:\n");
  58. do {
  59. unw_get_ip(info, &ip);
  60. if (ip == 0)
  61. break;
  62. unw_get_sp(info, &sp);
  63. unw_get_bsp(info, &bsp);
  64. snprintf(buf, sizeof(buf),
  65. " [<%016lx>] %%s\n"
  66. " sp=%016lx bsp=%016lx\n",
  67. ip, sp, bsp);
  68. print_symbol(buf, ip);
  69. } while (unw_unwind(info) >= 0);
  70. }
  71. void
  72. show_stack (struct task_struct *task, unsigned long *sp)
  73. {
  74. if (!task)
  75. unw_init_running(ia64_do_show_stack, NULL);
  76. else {
  77. struct unw_frame_info info;
  78. unw_init_from_blocked_task(&info, task);
  79. ia64_do_show_stack(&info, NULL);
  80. }
  81. }
  82. void
  83. dump_stack (void)
  84. {
  85. show_stack(NULL, NULL);
  86. }
  87. EXPORT_SYMBOL(dump_stack);
  88. void
  89. show_regs (struct pt_regs *regs)
  90. {
  91. unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
  92. print_modules();
  93. printk("\nPid: %d, CPU %d, comm: %20s\n", task_pid_nr(current),
  94. smp_processor_id(), current->comm);
  95. printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
  96. regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
  97. print_symbol("ip is at %s\n", ip);
  98. printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
  99. regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
  100. printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
  101. regs->ar_rnat, regs->ar_bspstore, regs->pr);
  102. printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
  103. regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
  104. printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
  105. printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
  106. printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
  107. regs->f6.u.bits[1], regs->f6.u.bits[0],
  108. regs->f7.u.bits[1], regs->f7.u.bits[0]);
  109. printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
  110. regs->f8.u.bits[1], regs->f8.u.bits[0],
  111. regs->f9.u.bits[1], regs->f9.u.bits[0]);
  112. printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
  113. regs->f10.u.bits[1], regs->f10.u.bits[0],
  114. regs->f11.u.bits[1], regs->f11.u.bits[0]);
  115. printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
  116. printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
  117. printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
  118. printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
  119. printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
  120. printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
  121. printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
  122. printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
  123. printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
  124. if (user_mode(regs)) {
  125. /* print the stacked registers */
  126. unsigned long val, *bsp, ndirty;
  127. int i, sof, is_nat = 0;
  128. sof = regs->cr_ifs & 0x7f; /* size of frame */
  129. ndirty = (regs->loadrs >> 19);
  130. bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
  131. for (i = 0; i < sof; ++i) {
  132. get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
  133. printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
  134. ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
  135. }
  136. } else
  137. show_stack(NULL, NULL);
  138. }
  139. void
  140. do_notify_resume_user (sigset_t *unused, struct sigscratch *scr, long in_syscall)
  141. {
  142. if (fsys_mode(current, &scr->pt)) {
  143. /* defer signal-handling etc. until we return to privilege-level 0. */
  144. if (!ia64_psr(&scr->pt)->lp)
  145. ia64_psr(&scr->pt)->lp = 1;
  146. return;
  147. }
  148. #ifdef CONFIG_PERFMON
  149. if (current->thread.pfm_needs_checking)
  150. pfm_handle_work();
  151. #endif
  152. /* deal with pending signal delivery */
  153. if (test_thread_flag(TIF_SIGPENDING)||test_thread_flag(TIF_RESTORE_SIGMASK))
  154. ia64_do_signal(scr, in_syscall);
  155. }
  156. static int pal_halt = 1;
  157. static int can_do_pal_halt = 1;
  158. static int __init nohalt_setup(char * str)
  159. {
  160. pal_halt = can_do_pal_halt = 0;
  161. return 1;
  162. }
  163. __setup("nohalt", nohalt_setup);
  164. void
  165. update_pal_halt_status(int status)
  166. {
  167. can_do_pal_halt = pal_halt && status;
  168. }
  169. /*
  170. * We use this if we don't have any better idle routine..
  171. */
  172. void
  173. default_idle (void)
  174. {
  175. local_irq_enable();
  176. while (!need_resched()) {
  177. if (can_do_pal_halt) {
  178. local_irq_disable();
  179. if (!need_resched()) {
  180. safe_halt();
  181. }
  182. local_irq_enable();
  183. } else
  184. cpu_relax();
  185. }
  186. }
  187. #ifdef CONFIG_HOTPLUG_CPU
  188. /* We don't actually take CPU down, just spin without interrupts. */
  189. static inline void play_dead(void)
  190. {
  191. extern void ia64_cpu_local_tick (void);
  192. unsigned int this_cpu = smp_processor_id();
  193. /* Ack it */
  194. __get_cpu_var(cpu_state) = CPU_DEAD;
  195. max_xtp();
  196. local_irq_disable();
  197. idle_task_exit();
  198. ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
  199. /*
  200. * The above is a point of no-return, the processor is
  201. * expected to be in SAL loop now.
  202. */
  203. BUG();
  204. }
  205. #else
  206. static inline void play_dead(void)
  207. {
  208. BUG();
  209. }
  210. #endif /* CONFIG_HOTPLUG_CPU */
  211. void cpu_idle_wait(void)
  212. {
  213. unsigned int cpu, this_cpu = get_cpu();
  214. cpumask_t map;
  215. cpumask_t tmp = current->cpus_allowed;
  216. set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
  217. put_cpu();
  218. cpus_clear(map);
  219. for_each_online_cpu(cpu) {
  220. per_cpu(cpu_idle_state, cpu) = 1;
  221. cpu_set(cpu, map);
  222. }
  223. __get_cpu_var(cpu_idle_state) = 0;
  224. wmb();
  225. do {
  226. ssleep(1);
  227. for_each_online_cpu(cpu) {
  228. if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
  229. cpu_clear(cpu, map);
  230. }
  231. cpus_and(map, map, cpu_online_map);
  232. } while (!cpus_empty(map));
  233. set_cpus_allowed(current, tmp);
  234. }
  235. EXPORT_SYMBOL_GPL(cpu_idle_wait);
  236. void __attribute__((noreturn))
  237. cpu_idle (void)
  238. {
  239. void (*mark_idle)(int) = ia64_mark_idle;
  240. int cpu = smp_processor_id();
  241. /* endless idle loop with no priority at all */
  242. while (1) {
  243. if (can_do_pal_halt) {
  244. current_thread_info()->status &= ~TS_POLLING;
  245. /*
  246. * TS_POLLING-cleared state must be visible before we
  247. * test NEED_RESCHED:
  248. */
  249. smp_mb();
  250. } else {
  251. current_thread_info()->status |= TS_POLLING;
  252. }
  253. if (!need_resched()) {
  254. void (*idle)(void);
  255. #ifdef CONFIG_SMP
  256. min_xtp();
  257. #endif
  258. if (__get_cpu_var(cpu_idle_state))
  259. __get_cpu_var(cpu_idle_state) = 0;
  260. rmb();
  261. if (mark_idle)
  262. (*mark_idle)(1);
  263. idle = pm_idle;
  264. if (!idle)
  265. idle = default_idle;
  266. (*idle)();
  267. if (mark_idle)
  268. (*mark_idle)(0);
  269. #ifdef CONFIG_SMP
  270. normal_xtp();
  271. #endif
  272. }
  273. preempt_enable_no_resched();
  274. schedule();
  275. preempt_disable();
  276. check_pgt_cache();
  277. if (cpu_is_offline(cpu))
  278. play_dead();
  279. }
  280. }
  281. void
  282. ia64_save_extra (struct task_struct *task)
  283. {
  284. #ifdef CONFIG_PERFMON
  285. unsigned long info;
  286. #endif
  287. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  288. ia64_save_debug_regs(&task->thread.dbr[0]);
  289. #ifdef CONFIG_PERFMON
  290. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  291. pfm_save_regs(task);
  292. info = __get_cpu_var(pfm_syst_info);
  293. if (info & PFM_CPUINFO_SYST_WIDE)
  294. pfm_syst_wide_update_task(task, info, 0);
  295. #endif
  296. #ifdef CONFIG_IA32_SUPPORT
  297. if (IS_IA32_PROCESS(task_pt_regs(task)))
  298. ia32_save_state(task);
  299. #endif
  300. }
  301. void
  302. ia64_load_extra (struct task_struct *task)
  303. {
  304. #ifdef CONFIG_PERFMON
  305. unsigned long info;
  306. #endif
  307. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  308. ia64_load_debug_regs(&task->thread.dbr[0]);
  309. #ifdef CONFIG_PERFMON
  310. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  311. pfm_load_regs(task);
  312. info = __get_cpu_var(pfm_syst_info);
  313. if (info & PFM_CPUINFO_SYST_WIDE)
  314. pfm_syst_wide_update_task(task, info, 1);
  315. #endif
  316. #ifdef CONFIG_IA32_SUPPORT
  317. if (IS_IA32_PROCESS(task_pt_regs(task)))
  318. ia32_load_state(task);
  319. #endif
  320. }
  321. /*
  322. * Copy the state of an ia-64 thread.
  323. *
  324. * We get here through the following call chain:
  325. *
  326. * from user-level: from kernel:
  327. *
  328. * <clone syscall> <some kernel call frames>
  329. * sys_clone :
  330. * do_fork do_fork
  331. * copy_thread copy_thread
  332. *
  333. * This means that the stack layout is as follows:
  334. *
  335. * +---------------------+ (highest addr)
  336. * | struct pt_regs |
  337. * +---------------------+
  338. * | struct switch_stack |
  339. * +---------------------+
  340. * | |
  341. * | memory stack |
  342. * | | <-- sp (lowest addr)
  343. * +---------------------+
  344. *
  345. * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
  346. * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
  347. * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
  348. * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
  349. * the stack is page aligned and the page size is at least 4KB, this is always the case,
  350. * so there is nothing to worry about.
  351. */
  352. int
  353. copy_thread (int nr, unsigned long clone_flags,
  354. unsigned long user_stack_base, unsigned long user_stack_size,
  355. struct task_struct *p, struct pt_regs *regs)
  356. {
  357. extern char ia64_ret_from_clone, ia32_ret_from_clone;
  358. struct switch_stack *child_stack, *stack;
  359. unsigned long rbs, child_rbs, rbs_size;
  360. struct pt_regs *child_ptregs;
  361. int retval = 0;
  362. #ifdef CONFIG_SMP
  363. /*
  364. * For SMP idle threads, fork_by_hand() calls do_fork with
  365. * NULL regs.
  366. */
  367. if (!regs)
  368. return 0;
  369. #endif
  370. stack = ((struct switch_stack *) regs) - 1;
  371. child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
  372. child_stack = (struct switch_stack *) child_ptregs - 1;
  373. /* copy parent's switch_stack & pt_regs to child: */
  374. memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
  375. rbs = (unsigned long) current + IA64_RBS_OFFSET;
  376. child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
  377. rbs_size = stack->ar_bspstore - rbs;
  378. /* copy the parent's register backing store to the child: */
  379. memcpy((void *) child_rbs, (void *) rbs, rbs_size);
  380. if (likely(user_mode(child_ptregs))) {
  381. if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
  382. child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
  383. if (user_stack_base) {
  384. child_ptregs->r12 = user_stack_base + user_stack_size - 16;
  385. child_ptregs->ar_bspstore = user_stack_base;
  386. child_ptregs->ar_rnat = 0;
  387. child_ptregs->loadrs = 0;
  388. }
  389. } else {
  390. /*
  391. * Note: we simply preserve the relative position of
  392. * the stack pointer here. There is no need to
  393. * allocate a scratch area here, since that will have
  394. * been taken care of by the caller of sys_clone()
  395. * already.
  396. */
  397. child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
  398. child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
  399. }
  400. child_stack->ar_bspstore = child_rbs + rbs_size;
  401. if (IS_IA32_PROCESS(regs))
  402. child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
  403. else
  404. child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
  405. /* copy parts of thread_struct: */
  406. p->thread.ksp = (unsigned long) child_stack - 16;
  407. /* stop some PSR bits from being inherited.
  408. * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
  409. * therefore we must specify them explicitly here and not include them in
  410. * IA64_PSR_BITS_TO_CLEAR.
  411. */
  412. child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
  413. & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
  414. /*
  415. * NOTE: The calling convention considers all floating point
  416. * registers in the high partition (fph) to be scratch. Since
  417. * the only way to get to this point is through a system call,
  418. * we know that the values in fph are all dead. Hence, there
  419. * is no need to inherit the fph state from the parent to the
  420. * child and all we have to do is to make sure that
  421. * IA64_THREAD_FPH_VALID is cleared in the child.
  422. *
  423. * XXX We could push this optimization a bit further by
  424. * clearing IA64_THREAD_FPH_VALID on ANY system call.
  425. * However, it's not clear this is worth doing. Also, it
  426. * would be a slight deviation from the normal Linux system
  427. * call behavior where scratch registers are preserved across
  428. * system calls (unless used by the system call itself).
  429. */
  430. # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
  431. | IA64_THREAD_PM_VALID)
  432. # define THREAD_FLAGS_TO_SET 0
  433. p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
  434. | THREAD_FLAGS_TO_SET);
  435. ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
  436. #ifdef CONFIG_IA32_SUPPORT
  437. /*
  438. * If we're cloning an IA32 task then save the IA32 extra
  439. * state from the current task to the new task
  440. */
  441. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  442. ia32_save_state(p);
  443. if (clone_flags & CLONE_SETTLS)
  444. retval = ia32_clone_tls(p, child_ptregs);
  445. /* Copy partially mapped page list */
  446. if (!retval)
  447. retval = ia32_copy_ia64_partial_page_list(p,
  448. clone_flags);
  449. }
  450. #endif
  451. #ifdef CONFIG_PERFMON
  452. if (current->thread.pfm_context)
  453. pfm_inherit(p, child_ptregs);
  454. #endif
  455. return retval;
  456. }
  457. static void
  458. do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
  459. {
  460. unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
  461. unsigned long uninitialized_var(ip); /* GCC be quiet */
  462. elf_greg_t *dst = arg;
  463. struct pt_regs *pt;
  464. char nat;
  465. int i;
  466. memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
  467. if (unw_unwind_to_user(info) < 0)
  468. return;
  469. unw_get_sp(info, &sp);
  470. pt = (struct pt_regs *) (sp + 16);
  471. urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
  472. if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
  473. return;
  474. ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
  475. &ar_rnat);
  476. /*
  477. * coredump format:
  478. * r0-r31
  479. * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
  480. * predicate registers (p0-p63)
  481. * b0-b7
  482. * ip cfm user-mask
  483. * ar.rsc ar.bsp ar.bspstore ar.rnat
  484. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
  485. */
  486. /* r0 is zero */
  487. for (i = 1, mask = (1UL << i); i < 32; ++i) {
  488. unw_get_gr(info, i, &dst[i], &nat);
  489. if (nat)
  490. nat_bits |= mask;
  491. mask <<= 1;
  492. }
  493. dst[32] = nat_bits;
  494. unw_get_pr(info, &dst[33]);
  495. for (i = 0; i < 8; ++i)
  496. unw_get_br(info, i, &dst[34 + i]);
  497. unw_get_rp(info, &ip);
  498. dst[42] = ip + ia64_psr(pt)->ri;
  499. dst[43] = cfm;
  500. dst[44] = pt->cr_ipsr & IA64_PSR_UM;
  501. unw_get_ar(info, UNW_AR_RSC, &dst[45]);
  502. /*
  503. * For bsp and bspstore, unw_get_ar() would return the kernel
  504. * addresses, but we need the user-level addresses instead:
  505. */
  506. dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
  507. dst[47] = pt->ar_bspstore;
  508. dst[48] = ar_rnat;
  509. unw_get_ar(info, UNW_AR_CCV, &dst[49]);
  510. unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
  511. unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
  512. dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
  513. unw_get_ar(info, UNW_AR_LC, &dst[53]);
  514. unw_get_ar(info, UNW_AR_EC, &dst[54]);
  515. unw_get_ar(info, UNW_AR_CSD, &dst[55]);
  516. unw_get_ar(info, UNW_AR_SSD, &dst[56]);
  517. }
  518. void
  519. do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
  520. {
  521. elf_fpreg_t *dst = arg;
  522. int i;
  523. memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
  524. if (unw_unwind_to_user(info) < 0)
  525. return;
  526. /* f0 is 0.0, f1 is 1.0 */
  527. for (i = 2; i < 32; ++i)
  528. unw_get_fr(info, i, dst + i);
  529. ia64_flush_fph(task);
  530. if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
  531. memcpy(dst + 32, task->thread.fph, 96*16);
  532. }
  533. void
  534. do_copy_regs (struct unw_frame_info *info, void *arg)
  535. {
  536. do_copy_task_regs(current, info, arg);
  537. }
  538. void
  539. do_dump_fpu (struct unw_frame_info *info, void *arg)
  540. {
  541. do_dump_task_fpu(current, info, arg);
  542. }
  543. int
  544. dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
  545. {
  546. struct unw_frame_info tcore_info;
  547. if (current == task) {
  548. unw_init_running(do_copy_regs, regs);
  549. } else {
  550. memset(&tcore_info, 0, sizeof(tcore_info));
  551. unw_init_from_blocked_task(&tcore_info, task);
  552. do_copy_task_regs(task, &tcore_info, regs);
  553. }
  554. return 1;
  555. }
  556. void
  557. ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
  558. {
  559. unw_init_running(do_copy_regs, dst);
  560. }
  561. int
  562. dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
  563. {
  564. struct unw_frame_info tcore_info;
  565. if (current == task) {
  566. unw_init_running(do_dump_fpu, dst);
  567. } else {
  568. memset(&tcore_info, 0, sizeof(tcore_info));
  569. unw_init_from_blocked_task(&tcore_info, task);
  570. do_dump_task_fpu(task, &tcore_info, dst);
  571. }
  572. return 1;
  573. }
  574. int
  575. dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
  576. {
  577. unw_init_running(do_dump_fpu, dst);
  578. return 1; /* f0-f31 are always valid so we always return 1 */
  579. }
  580. long
  581. sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
  582. struct pt_regs *regs)
  583. {
  584. char *fname;
  585. int error;
  586. fname = getname(filename);
  587. error = PTR_ERR(fname);
  588. if (IS_ERR(fname))
  589. goto out;
  590. error = do_execve(fname, argv, envp, regs);
  591. putname(fname);
  592. out:
  593. return error;
  594. }
  595. pid_t
  596. kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
  597. {
  598. extern void start_kernel_thread (void);
  599. unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
  600. struct {
  601. struct switch_stack sw;
  602. struct pt_regs pt;
  603. } regs;
  604. memset(&regs, 0, sizeof(regs));
  605. regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
  606. regs.pt.r1 = helper_fptr[1]; /* set GP */
  607. regs.pt.r9 = (unsigned long) fn; /* 1st argument */
  608. regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
  609. /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
  610. regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
  611. regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
  612. regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
  613. regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
  614. regs.sw.pr = (1 << PRED_KERNEL_STACK);
  615. return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
  616. }
  617. EXPORT_SYMBOL(kernel_thread);
  618. /* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
  619. int
  620. kernel_thread_helper (int (*fn)(void *), void *arg)
  621. {
  622. #ifdef CONFIG_IA32_SUPPORT
  623. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  624. /* A kernel thread is always a 64-bit process. */
  625. current->thread.map_base = DEFAULT_MAP_BASE;
  626. current->thread.task_size = DEFAULT_TASK_SIZE;
  627. ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
  628. ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
  629. }
  630. #endif
  631. return (*fn)(arg);
  632. }
  633. /*
  634. * Flush thread state. This is called when a thread does an execve().
  635. */
  636. void
  637. flush_thread (void)
  638. {
  639. /* drop floating-point and debug-register state if it exists: */
  640. current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
  641. ia64_drop_fpu(current);
  642. #ifdef CONFIG_IA32_SUPPORT
  643. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  644. ia32_drop_ia64_partial_page_list(current);
  645. current->thread.task_size = IA32_PAGE_OFFSET;
  646. set_fs(USER_DS);
  647. }
  648. #endif
  649. }
  650. /*
  651. * Clean up state associated with current thread. This is called when
  652. * the thread calls exit().
  653. */
  654. void
  655. exit_thread (void)
  656. {
  657. ia64_drop_fpu(current);
  658. #ifdef CONFIG_PERFMON
  659. /* if needed, stop monitoring and flush state to perfmon context */
  660. if (current->thread.pfm_context)
  661. pfm_exit_thread(current);
  662. /* free debug register resources */
  663. if (current->thread.flags & IA64_THREAD_DBG_VALID)
  664. pfm_release_debug_registers(current);
  665. #endif
  666. if (IS_IA32_PROCESS(task_pt_regs(current)))
  667. ia32_drop_ia64_partial_page_list(current);
  668. }
  669. unsigned long
  670. get_wchan (struct task_struct *p)
  671. {
  672. struct unw_frame_info info;
  673. unsigned long ip;
  674. int count = 0;
  675. if (!p || p == current || p->state == TASK_RUNNING)
  676. return 0;
  677. /*
  678. * Note: p may not be a blocked task (it could be current or
  679. * another process running on some other CPU. Rather than
  680. * trying to determine if p is really blocked, we just assume
  681. * it's blocked and rely on the unwind routines to fail
  682. * gracefully if the process wasn't really blocked after all.
  683. * --davidm 99/12/15
  684. */
  685. unw_init_from_blocked_task(&info, p);
  686. do {
  687. if (p->state == TASK_RUNNING)
  688. return 0;
  689. if (unw_unwind(&info) < 0)
  690. return 0;
  691. unw_get_ip(&info, &ip);
  692. if (!in_sched_functions(ip))
  693. return ip;
  694. } while (count++ < 16);
  695. return 0;
  696. }
  697. void
  698. cpu_halt (void)
  699. {
  700. pal_power_mgmt_info_u_t power_info[8];
  701. unsigned long min_power;
  702. int i, min_power_state;
  703. if (ia64_pal_halt_info(power_info) != 0)
  704. return;
  705. min_power_state = 0;
  706. min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
  707. for (i = 1; i < 8; ++i)
  708. if (power_info[i].pal_power_mgmt_info_s.im
  709. && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
  710. min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
  711. min_power_state = i;
  712. }
  713. while (1)
  714. ia64_pal_halt(min_power_state);
  715. }
  716. void machine_shutdown(void)
  717. {
  718. #ifdef CONFIG_HOTPLUG_CPU
  719. int cpu;
  720. for_each_online_cpu(cpu) {
  721. if (cpu != smp_processor_id())
  722. cpu_down(cpu);
  723. }
  724. #endif
  725. #ifdef CONFIG_KEXEC
  726. kexec_disable_iosapic();
  727. #endif
  728. }
  729. void
  730. machine_restart (char *restart_cmd)
  731. {
  732. (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
  733. (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
  734. }
  735. void
  736. machine_halt (void)
  737. {
  738. (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
  739. cpu_halt();
  740. }
  741. void
  742. machine_power_off (void)
  743. {
  744. if (pm_power_off)
  745. pm_power_off();
  746. machine_halt();
  747. }