Kconfig.cpu 11 KB

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  1. # Put here option for CPU selection and depending optimization
  2. if !X86_ELAN
  3. choice
  4. prompt "Processor family"
  5. default M686
  6. config M386
  7. bool "386"
  8. depends on !UML
  9. ---help---
  10. This is the processor type of your CPU. This information is used for
  11. optimizing purposes. In order to compile a kernel that can run on
  12. all x86 CPU types (albeit not optimally fast), you can specify
  13. "386" here.
  14. The kernel will not necessarily run on earlier architectures than
  15. the one you have chosen, e.g. a Pentium optimized kernel will run on
  16. a PPro, but not necessarily on a i486.
  17. Here are the settings recommended for greatest speed:
  18. - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
  19. 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
  20. will run on a 386 class machine.
  21. - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
  22. SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
  23. - "586" for generic Pentium CPUs lacking the TSC
  24. (time stamp counter) register.
  25. - "Pentium-Classic" for the Intel Pentium.
  26. - "Pentium-MMX" for the Intel Pentium MMX.
  27. - "Pentium-Pro" for the Intel Pentium Pro.
  28. - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
  29. - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
  30. - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
  31. - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
  32. - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
  33. - "Crusoe" for the Transmeta Crusoe series.
  34. - "Efficeon" for the Transmeta Efficeon series.
  35. - "Winchip-C6" for original IDT Winchip.
  36. - "Winchip-2" for IDT Winchip 2.
  37. - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
  38. - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
  39. - "Geode GX/LX" For AMD Geode GX and LX processors.
  40. - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
  41. - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
  42. - "VIA C7" for VIA C7.
  43. If you don't know what to do, choose "386".
  44. config M486
  45. bool "486"
  46. help
  47. Select this for a 486 series processor, either Intel or one of the
  48. compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
  49. DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
  50. U5S.
  51. config M586
  52. bool "586/K5/5x86/6x86/6x86MX"
  53. help
  54. Select this for an 586 or 686 series processor such as the AMD K5,
  55. the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
  56. assume the RDTSC (Read Time Stamp Counter) instruction.
  57. config M586TSC
  58. bool "Pentium-Classic"
  59. help
  60. Select this for a Pentium Classic processor with the RDTSC (Read
  61. Time Stamp Counter) instruction for benchmarking.
  62. config M586MMX
  63. bool "Pentium-MMX"
  64. help
  65. Select this for a Pentium with the MMX graphics/multimedia
  66. extended instructions.
  67. config M686
  68. bool "Pentium-Pro"
  69. help
  70. Select this for Intel Pentium Pro chips. This enables the use of
  71. Pentium Pro extended instructions, and disables the init-time guard
  72. against the f00f bug found in earlier Pentiums.
  73. config MPENTIUMII
  74. bool "Pentium-II/Celeron(pre-Coppermine)"
  75. help
  76. Select this for Intel chips based on the Pentium-II and
  77. pre-Coppermine Celeron core. This option enables an unaligned
  78. copy optimization, compiles the kernel with optimization flags
  79. tailored for the chip, and applies any applicable Pentium Pro
  80. optimizations.
  81. config MPENTIUMIII
  82. bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
  83. help
  84. Select this for Intel chips based on the Pentium-III and
  85. Celeron-Coppermine core. This option enables use of some
  86. extended prefetch instructions in addition to the Pentium II
  87. extensions.
  88. config MPENTIUMM
  89. bool "Pentium M"
  90. help
  91. Select this for Intel Pentium M (not Pentium-4 M)
  92. notebook chips.
  93. config MCORE2
  94. bool "Core 2/newer Xeon"
  95. help
  96. Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
  97. CPUs. You can distinguish newer from older Xeons by the CPU family
  98. in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)
  99. config MPENTIUM4
  100. bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
  101. help
  102. Select this for Intel Pentium 4 chips. This includes the
  103. Pentium 4, Pentium D, P4-based Celeron and Xeon, and
  104. Pentium-4 M (not Pentium M) chips. This option enables compile
  105. flags optimized for the chip, uses the correct cache line size, and
  106. applies any applicable optimizations.
  107. CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
  108. Select this for:
  109. Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
  110. -Willamette
  111. -Northwood
  112. -Mobile Pentium 4
  113. -Mobile Pentium 4 M
  114. -Extreme Edition (Gallatin)
  115. -Prescott
  116. -Prescott 2M
  117. -Cedar Mill
  118. -Presler
  119. -Smithfiled
  120. Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
  121. -Foster
  122. -Prestonia
  123. -Gallatin
  124. -Nocona
  125. -Irwindale
  126. -Cranford
  127. -Potomac
  128. -Paxville
  129. -Dempsey
  130. config MK6
  131. bool "K6/K6-II/K6-III"
  132. help
  133. Select this for an AMD K6-family processor. Enables use of
  134. some extended instructions, and passes appropriate optimization
  135. flags to GCC.
  136. config MK7
  137. bool "Athlon/Duron/K7"
  138. help
  139. Select this for an AMD Athlon K7-family processor. Enables use of
  140. some extended instructions, and passes appropriate optimization
  141. flags to GCC.
  142. config MK8
  143. bool "Opteron/Athlon64/Hammer/K8"
  144. help
  145. Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
  146. use of some extended instructions, and passes appropriate optimization
  147. flags to GCC.
  148. config MCRUSOE
  149. bool "Crusoe"
  150. help
  151. Select this for a Transmeta Crusoe processor. Treats the processor
  152. like a 586 with TSC, and sets some GCC optimization flags (like a
  153. Pentium Pro with no alignment requirements).
  154. config MEFFICEON
  155. bool "Efficeon"
  156. help
  157. Select this for a Transmeta Efficeon processor.
  158. config MWINCHIPC6
  159. bool "Winchip-C6"
  160. help
  161. Select this for an IDT Winchip C6 chip. Linux and GCC
  162. treat this chip as a 586TSC with some extended instructions
  163. and alignment requirements.
  164. config MWINCHIP2
  165. bool "Winchip-2"
  166. help
  167. Select this for an IDT Winchip-2. Linux and GCC
  168. treat this chip as a 586TSC with some extended instructions
  169. and alignment requirements.
  170. config MWINCHIP3D
  171. bool "Winchip-2A/Winchip-3"
  172. help
  173. Select this for an IDT Winchip-2A or 3. Linux and GCC
  174. treat this chip as a 586TSC with some extended instructions
  175. and alignment requirements. Also enable out of order memory
  176. stores for this CPU, which can increase performance of some
  177. operations.
  178. config MGEODEGX1
  179. bool "GeodeGX1"
  180. help
  181. Select this for a Geode GX1 (Cyrix MediaGX) chip.
  182. config MGEODE_LX
  183. bool "Geode GX/LX"
  184. help
  185. Select this for AMD Geode GX and LX processors.
  186. config MCYRIXIII
  187. bool "CyrixIII/VIA-C3"
  188. help
  189. Select this for a Cyrix III or C3 chip. Presently Linux and GCC
  190. treat this chip as a generic 586. Whilst the CPU is 686 class,
  191. it lacks the cmov extension which gcc assumes is present when
  192. generating 686 code.
  193. Note that Nehemiah (Model 9) and above will not boot with this
  194. kernel due to them lacking the 3DNow! instructions used in earlier
  195. incarnations of the CPU.
  196. config MVIAC3_2
  197. bool "VIA C3-2 (Nehemiah)"
  198. help
  199. Select this for a VIA C3 "Nehemiah". Selecting this enables usage
  200. of SSE and tells gcc to treat the CPU as a 686.
  201. Note, this kernel will not boot on older (pre model 9) C3s.
  202. config MVIAC7
  203. bool "VIA C7"
  204. help
  205. Select this for a VIA C7. Selecting this uses the correct cache
  206. shift and tells gcc to treat the CPU as a 686.
  207. endchoice
  208. config X86_GENERIC
  209. bool "Generic x86 support"
  210. help
  211. Instead of just including optimizations for the selected
  212. x86 variant (e.g. PII, Crusoe or Athlon), include some more
  213. generic optimizations as well. This will make the kernel
  214. perform better on x86 CPUs other than that selected.
  215. This is really intended for distributors who need more
  216. generic optimizations.
  217. endif
  218. #
  219. # Define implied options from the CPU selection here
  220. #
  221. config X86_CMPXCHG
  222. bool
  223. depends on !M386
  224. default y
  225. config X86_L1_CACHE_SHIFT
  226. int
  227. default "7" if MPENTIUM4 || X86_GENERIC
  228. default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
  229. default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
  230. default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7
  231. config X86_XADD
  232. bool
  233. depends on !M386
  234. default y
  235. config RWSEM_GENERIC_SPINLOCK
  236. bool
  237. depends on !X86_XADD
  238. default y
  239. config RWSEM_XCHGADD_ALGORITHM
  240. bool
  241. depends on X86_XADD
  242. default y
  243. config ARCH_HAS_ILOG2_U32
  244. bool
  245. default n
  246. config ARCH_HAS_ILOG2_U64
  247. bool
  248. default n
  249. config GENERIC_CALIBRATE_DELAY
  250. bool
  251. default y
  252. config X86_PPRO_FENCE
  253. bool
  254. depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
  255. default y
  256. config X86_F00F_BUG
  257. bool
  258. depends on M586MMX || M586TSC || M586 || M486 || M386
  259. default y
  260. config X86_WP_WORKS_OK
  261. bool
  262. depends on !M386
  263. default y
  264. config X86_INVLPG
  265. bool
  266. depends on !M386
  267. default y
  268. config X86_BSWAP
  269. bool
  270. depends on !M386
  271. default y
  272. config X86_POPAD_OK
  273. bool
  274. depends on !M386
  275. default y
  276. config X86_ALIGNMENT_16
  277. bool
  278. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
  279. default y
  280. config X86_GOOD_APIC
  281. bool
  282. depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7
  283. default y
  284. config X86_INTEL_USERCOPY
  285. bool
  286. depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
  287. default y
  288. config X86_USE_PPRO_CHECKSUM
  289. bool
  290. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2
  291. default y
  292. config X86_USE_3DNOW
  293. bool
  294. depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
  295. default y
  296. config X86_OOSTORE
  297. bool
  298. depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
  299. default y
  300. config X86_TSC
  301. bool
  302. depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ
  303. default y
  304. # this should be set for all -march=.. options where the compiler
  305. # generates cmov.
  306. config X86_CMOV
  307. bool
  308. depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7)
  309. default y
  310. config X86_MINIMUM_CPU_FAMILY
  311. int
  312. default "4" if X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK
  313. default "3"