cm_bf561.c 9.1 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf561.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2006
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #include <linux/usb_isp1362.h>
  36. #include <linux/pata_platform.h>
  37. #include <linux/irq.h>
  38. #include <asm/dma.h>
  39. #include <asm/bfin5xx_spi.h>
  40. /*
  41. * Name the Board for the /proc/cpuinfo
  42. */
  43. char *bfin_board_name = "Bluetechnix CM BF561";
  44. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  45. /* all SPI peripherals info goes here */
  46. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  47. static struct mtd_partition bfin_spi_flash_partitions[] = {
  48. {
  49. .name = "bootloader",
  50. .size = 0x00020000,
  51. .offset = 0,
  52. .mask_flags = MTD_CAP_ROM
  53. }, {
  54. .name = "kernel",
  55. .size = 0xe0000,
  56. .offset = 0x20000
  57. }, {
  58. .name = "file system",
  59. .size = 0x700000,
  60. .offset = 0x00100000,
  61. }
  62. };
  63. static struct flash_platform_data bfin_spi_flash_data = {
  64. .name = "m25p80",
  65. .parts = bfin_spi_flash_partitions,
  66. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  67. .type = "m25p64",
  68. };
  69. /* SPI flash chip (m25p64) */
  70. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  71. .enable_dma = 0, /* use dma transfer with this chip*/
  72. .bits_per_word = 8,
  73. };
  74. #endif
  75. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  76. /* SPI ADC chip */
  77. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  78. .enable_dma = 1, /* use dma transfer with this chip*/
  79. .bits_per_word = 16,
  80. };
  81. #endif
  82. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  83. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  84. .enable_dma = 0,
  85. .bits_per_word = 16,
  86. };
  87. #endif
  88. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  89. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  90. .enable_dma = 0,
  91. .bits_per_word = 16,
  92. };
  93. #endif
  94. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  95. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  96. .enable_dma = 1,
  97. .bits_per_word = 8,
  98. };
  99. #endif
  100. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  101. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  102. {
  103. /* the modalias must be the same as spi device driver name */
  104. .modalias = "m25p80", /* Name of spi_driver for this device */
  105. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  106. .bus_num = 0, /* Framework bus number */
  107. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  108. .platform_data = &bfin_spi_flash_data,
  109. .controller_data = &spi_flash_chip_info,
  110. .mode = SPI_MODE_3,
  111. },
  112. #endif
  113. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  114. {
  115. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  116. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  117. .bus_num = 0, /* Framework bus number */
  118. .chip_select = 1, /* Framework chip select. */
  119. .platform_data = NULL, /* No spi_driver specific config */
  120. .controller_data = &spi_adc_chip_info,
  121. },
  122. #endif
  123. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  124. {
  125. .modalias = "ad1836-spi",
  126. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  127. .bus_num = 0,
  128. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  129. .controller_data = &ad1836_spi_chip_info,
  130. },
  131. #endif
  132. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  133. {
  134. .modalias = "ad9960-spi",
  135. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  136. .bus_num = 0,
  137. .chip_select = 1,
  138. .controller_data = &ad9960_spi_chip_info,
  139. },
  140. #endif
  141. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  142. {
  143. .modalias = "spi_mmc",
  144. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  145. .bus_num = 0,
  146. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  147. .platform_data = NULL,
  148. .controller_data = &spi_mmc_chip_info,
  149. .mode = SPI_MODE_3,
  150. },
  151. #endif
  152. };
  153. /* SPI (0) */
  154. static struct resource bfin_spi0_resource[] = {
  155. [0] = {
  156. .start = SPI0_REGBASE,
  157. .end = SPI0_REGBASE + 0xFF,
  158. .flags = IORESOURCE_MEM,
  159. },
  160. [1] = {
  161. .start = CH_SPI,
  162. .end = CH_SPI,
  163. .flags = IORESOURCE_IRQ,
  164. }
  165. };
  166. /* SPI controller data */
  167. static struct bfin5xx_spi_master bfin_spi0_info = {
  168. .num_chipselect = 8,
  169. .enable_dma = 1, /* master has the ability to do dma transfer */
  170. };
  171. static struct platform_device bfin_spi0_device = {
  172. .name = "bfin-spi",
  173. .id = 0, /* Bus number */
  174. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  175. .resource = bfin_spi0_resource,
  176. .dev = {
  177. .platform_data = &bfin_spi0_info, /* Passed to driver */
  178. },
  179. };
  180. #endif /* spi master and devices */
  181. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  182. static struct resource smc91x_resources[] = {
  183. {
  184. .name = "smc91x-regs",
  185. .start = 0x28000300,
  186. .end = 0x28000300 + 16,
  187. .flags = IORESOURCE_MEM,
  188. }, {
  189. .start = IRQ_PF0,
  190. .end = IRQ_PF0,
  191. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  192. },
  193. };
  194. static struct platform_device smc91x_device = {
  195. .name = "smc91x",
  196. .id = 0,
  197. .num_resources = ARRAY_SIZE(smc91x_resources),
  198. .resource = smc91x_resources,
  199. };
  200. #endif
  201. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  202. static struct resource isp1362_hcd_resources[] = {
  203. {
  204. .start = 0x24008000,
  205. .end = 0x24008000,
  206. .flags = IORESOURCE_MEM,
  207. }, {
  208. .start = 0x24008004,
  209. .end = 0x24008004,
  210. .flags = IORESOURCE_MEM,
  211. }, {
  212. .start = IRQ_PF47,
  213. .end = IRQ_PF47,
  214. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  215. },
  216. };
  217. static struct isp1362_platform_data isp1362_priv = {
  218. .sel15Kres = 1,
  219. .clknotstop = 0,
  220. .oc_enable = 0,
  221. .int_act_high = 0,
  222. .int_edge_triggered = 0,
  223. .remote_wakeup_connected = 0,
  224. .no_power_switching = 1,
  225. .power_switching_mode = 0,
  226. };
  227. static struct platform_device isp1362_hcd_device = {
  228. .name = "isp1362-hcd",
  229. .id = 0,
  230. .dev = {
  231. .platform_data = &isp1362_priv,
  232. },
  233. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  234. .resource = isp1362_hcd_resources,
  235. };
  236. #endif
  237. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  238. static struct resource bfin_uart_resources[] = {
  239. {
  240. .start = 0xFFC00400,
  241. .end = 0xFFC004FF,
  242. .flags = IORESOURCE_MEM,
  243. },
  244. };
  245. static struct platform_device bfin_uart_device = {
  246. .name = "bfin-uart",
  247. .id = 1,
  248. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  249. .resource = bfin_uart_resources,
  250. };
  251. #endif
  252. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  253. #define PATA_INT 119
  254. static struct pata_platform_info bfin_pata_platform_data = {
  255. .ioport_shift = 2,
  256. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  257. };
  258. static struct resource bfin_pata_resources[] = {
  259. {
  260. .start = 0x2400C000,
  261. .end = 0x2400C001F,
  262. .flags = IORESOURCE_MEM,
  263. },
  264. {
  265. .start = 0x2400D018,
  266. .end = 0x2400D01B,
  267. .flags = IORESOURCE_MEM,
  268. },
  269. {
  270. .start = PATA_INT,
  271. .end = PATA_INT,
  272. .flags = IORESOURCE_IRQ,
  273. },
  274. };
  275. static struct platform_device bfin_pata_device = {
  276. .name = "pata_platform",
  277. .id = -1,
  278. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  279. .resource = bfin_pata_resources,
  280. .dev = {
  281. .platform_data = &bfin_pata_platform_data,
  282. }
  283. };
  284. #endif
  285. static struct platform_device *cm_bf561_devices[] __initdata = {
  286. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  287. &bfin_uart_device,
  288. #endif
  289. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  290. &isp1362_hcd_device,
  291. #endif
  292. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  293. &smc91x_device,
  294. #endif
  295. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  296. &bfin_spi0_device,
  297. #endif
  298. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  299. &bfin_pata_device,
  300. #endif
  301. };
  302. static int __init cm_bf561_init(void)
  303. {
  304. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  305. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  306. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  307. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  308. #endif
  309. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  310. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  311. #endif
  312. return 0;
  313. }
  314. arch_initcall(cm_bf561_init);