cm_bf537.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427
  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #include <linux/usb_isp1362.h>
  37. #include <linux/pata_platform.h>
  38. #include <linux/irq.h>
  39. #include <asm/dma.h>
  40. #include <asm/bfin5xx_spi.h>
  41. /*
  42. * Name the Board for the /proc/cpuinfo
  43. */
  44. char *bfin_board_name = "Bluetechnix CM BF537";
  45. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  46. /* all SPI peripherals info goes here */
  47. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  48. static struct mtd_partition bfin_spi_flash_partitions[] = {
  49. {
  50. .name = "bootloader",
  51. .size = 0x00020000,
  52. .offset = 0,
  53. .mask_flags = MTD_CAP_ROM
  54. }, {
  55. .name = "kernel",
  56. .size = 0xe0000,
  57. .offset = 0x20000
  58. }, {
  59. .name = "file system",
  60. .size = 0x700000,
  61. .offset = 0x00100000,
  62. }
  63. };
  64. static struct flash_platform_data bfin_spi_flash_data = {
  65. .name = "m25p80",
  66. .parts = bfin_spi_flash_partitions,
  67. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  68. .type = "m25p64",
  69. };
  70. /* SPI flash chip (m25p64) */
  71. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  72. .enable_dma = 0, /* use dma transfer with this chip*/
  73. .bits_per_word = 8,
  74. };
  75. #endif
  76. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  77. /* SPI ADC chip */
  78. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  79. .enable_dma = 1, /* use dma transfer with this chip*/
  80. .bits_per_word = 16,
  81. };
  82. #endif
  83. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  84. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  85. .enable_dma = 0,
  86. .bits_per_word = 16,
  87. };
  88. #endif
  89. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  90. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  91. .enable_dma = 0,
  92. .bits_per_word = 16,
  93. };
  94. #endif
  95. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  96. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  97. .enable_dma = 1,
  98. .bits_per_word = 8,
  99. };
  100. #endif
  101. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  102. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  103. {
  104. /* the modalias must be the same as spi device driver name */
  105. .modalias = "m25p80", /* Name of spi_driver for this device */
  106. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  107. .bus_num = 0, /* Framework bus number */
  108. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  109. .platform_data = &bfin_spi_flash_data,
  110. .controller_data = &spi_flash_chip_info,
  111. .mode = SPI_MODE_3,
  112. },
  113. #endif
  114. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  115. {
  116. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  117. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  118. .bus_num = 0, /* Framework bus number */
  119. .chip_select = 1, /* Framework chip select. */
  120. .platform_data = NULL, /* No spi_driver specific config */
  121. .controller_data = &spi_adc_chip_info,
  122. },
  123. #endif
  124. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  125. {
  126. .modalias = "ad1836-spi",
  127. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  128. .bus_num = 0,
  129. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  130. .controller_data = &ad1836_spi_chip_info,
  131. },
  132. #endif
  133. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  134. {
  135. .modalias = "ad9960-spi",
  136. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  137. .bus_num = 0,
  138. .chip_select = 1,
  139. .controller_data = &ad9960_spi_chip_info,
  140. },
  141. #endif
  142. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  143. {
  144. .modalias = "spi_mmc_dummy",
  145. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  146. .bus_num = 0,
  147. .chip_select = 7,
  148. .platform_data = NULL,
  149. .controller_data = &spi_mmc_chip_info,
  150. .mode = SPI_MODE_3,
  151. },
  152. {
  153. .modalias = "spi_mmc",
  154. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  155. .bus_num = 0,
  156. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  157. .platform_data = NULL,
  158. .controller_data = &spi_mmc_chip_info,
  159. .mode = SPI_MODE_3,
  160. },
  161. #endif
  162. };
  163. /* SPI (0) */
  164. static struct resource bfin_spi0_resource[] = {
  165. [0] = {
  166. .start = SPI0_REGBASE,
  167. .end = SPI0_REGBASE + 0xFF,
  168. .flags = IORESOURCE_MEM,
  169. },
  170. [1] = {
  171. .start = CH_SPI,
  172. .end = CH_SPI,
  173. .flags = IORESOURCE_IRQ,
  174. }
  175. };
  176. /* SPI controller data */
  177. static struct bfin5xx_spi_master bfin_spi0_info = {
  178. .num_chipselect = 8,
  179. .enable_dma = 1, /* master has the ability to do dma transfer */
  180. };
  181. static struct platform_device bfin_spi0_device = {
  182. .name = "bfin-spi",
  183. .id = 0, /* Bus number */
  184. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  185. .resource = bfin_spi0_resource,
  186. .dev = {
  187. .platform_data = &bfin_spi0_info, /* Passed to driver */
  188. },
  189. };
  190. #endif /* spi master and devices */
  191. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  192. static struct platform_device rtc_device = {
  193. .name = "rtc-bfin",
  194. .id = -1,
  195. };
  196. #endif
  197. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  198. static struct resource smc91x_resources[] = {
  199. {
  200. .start = 0x20200300,
  201. .end = 0x20200300 + 16,
  202. .flags = IORESOURCE_MEM,
  203. }, {
  204. .start = IRQ_PF14,
  205. .end = IRQ_PF14,
  206. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  207. },
  208. };
  209. static struct platform_device smc91x_device = {
  210. .name = "smc91x",
  211. .id = 0,
  212. .num_resources = ARRAY_SIZE(smc91x_resources),
  213. .resource = smc91x_resources,
  214. };
  215. #endif
  216. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  217. static struct resource isp1362_hcd_resources[] = {
  218. {
  219. .start = 0x20308000,
  220. .end = 0x20308000,
  221. .flags = IORESOURCE_MEM,
  222. }, {
  223. .start = 0x20308004,
  224. .end = 0x20308004,
  225. .flags = IORESOURCE_MEM,
  226. }, {
  227. .start = IRQ_PG15,
  228. .end = IRQ_PG15,
  229. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  230. },
  231. };
  232. static struct isp1362_platform_data isp1362_priv = {
  233. .sel15Kres = 1,
  234. .clknotstop = 0,
  235. .oc_enable = 0,
  236. .int_act_high = 0,
  237. .int_edge_triggered = 0,
  238. .remote_wakeup_connected = 0,
  239. .no_power_switching = 1,
  240. .power_switching_mode = 0,
  241. };
  242. static struct platform_device isp1362_hcd_device = {
  243. .name = "isp1362-hcd",
  244. .id = 0,
  245. .dev = {
  246. .platform_data = &isp1362_priv,
  247. },
  248. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  249. .resource = isp1362_hcd_resources,
  250. };
  251. #endif
  252. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  253. static struct resource net2272_bfin_resources[] = {
  254. {
  255. .start = 0x20200000,
  256. .end = 0x20200000 + 0x100,
  257. .flags = IORESOURCE_MEM,
  258. }, {
  259. .start = IRQ_PF7,
  260. .end = IRQ_PF7,
  261. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  262. },
  263. };
  264. static struct platform_device net2272_bfin_device = {
  265. .name = "net2272",
  266. .id = -1,
  267. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  268. .resource = net2272_bfin_resources,
  269. };
  270. #endif
  271. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  272. static struct resource bfin_uart_resources[] = {
  273. {
  274. .start = 0xFFC00400,
  275. .end = 0xFFC004FF,
  276. .flags = IORESOURCE_MEM,
  277. }, {
  278. .start = 0xFFC02000,
  279. .end = 0xFFC020FF,
  280. .flags = IORESOURCE_MEM,
  281. },
  282. };
  283. static struct platform_device bfin_uart_device = {
  284. .name = "bfin-uart",
  285. .id = 1,
  286. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  287. .resource = bfin_uart_resources,
  288. };
  289. #endif
  290. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  291. static struct platform_device bfin_sport0_uart_device = {
  292. .name = "bfin-sport-uart",
  293. .id = 0,
  294. };
  295. static struct platform_device bfin_sport1_uart_device = {
  296. .name = "bfin-sport-uart",
  297. .id = 1,
  298. };
  299. #endif
  300. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  301. static struct platform_device bfin_mac_device = {
  302. .name = "bfin_mac",
  303. };
  304. #endif
  305. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  306. #define PATA_INT 64
  307. static struct pata_platform_info bfin_pata_platform_data = {
  308. .ioport_shift = 2,
  309. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  310. };
  311. static struct resource bfin_pata_resources[] = {
  312. {
  313. .start = 0x2030C000,
  314. .end = 0x2030C01F,
  315. .flags = IORESOURCE_MEM,
  316. },
  317. {
  318. .start = 0x2030D018,
  319. .end = 0x2030D01B,
  320. .flags = IORESOURCE_MEM,
  321. },
  322. {
  323. .start = PATA_INT,
  324. .end = PATA_INT,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. };
  328. static struct platform_device bfin_pata_device = {
  329. .name = "pata_platform",
  330. .id = -1,
  331. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  332. .resource = bfin_pata_resources,
  333. .dev = {
  334. .platform_data = &bfin_pata_platform_data,
  335. }
  336. };
  337. #endif
  338. static struct platform_device *cm_bf537_devices[] __initdata = {
  339. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  340. &rtc_device,
  341. #endif
  342. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  343. &bfin_uart_device,
  344. #endif
  345. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  346. &bfin_sport0_uart_device,
  347. &bfin_sport1_uart_device,
  348. #endif
  349. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  350. &isp1362_hcd_device,
  351. #endif
  352. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  353. &smc91x_device,
  354. #endif
  355. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  356. &bfin_mac_device,
  357. #endif
  358. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  359. &net2272_bfin_device,
  360. #endif
  361. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  362. &bfin_spi0_device,
  363. #endif
  364. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  365. &bfin_pata_device,
  366. #endif
  367. };
  368. static int __init cm_bf537_init(void)
  369. {
  370. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  371. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  372. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  373. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  374. #endif
  375. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  376. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  377. #endif
  378. return 0;
  379. }
  380. arch_initcall(cm_bf537_init);