stamp.c 11 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board Info File for the BF533-STAMP
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37. #include <linux/usb_isp1362.h>
  38. #endif
  39. #include <linux/pata_platform.h>
  40. #include <linux/irq.h>
  41. #include <asm/dma.h>
  42. #include <asm/bfin5xx_spi.h>
  43. #include <asm/reboot.h>
  44. /*
  45. * Name the Board for the /proc/cpuinfo
  46. */
  47. char *bfin_board_name = "ADDS-BF533-STAMP";
  48. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  49. static struct platform_device rtc_device = {
  50. .name = "rtc-bfin",
  51. .id = -1,
  52. };
  53. #endif
  54. /*
  55. * Driver needs to know address, irq and flag pin.
  56. */
  57. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  58. static struct resource smc91x_resources[] = {
  59. {
  60. .name = "smc91x-regs",
  61. .start = 0x20300300,
  62. .end = 0x20300300 + 16,
  63. .flags = IORESOURCE_MEM,
  64. }, {
  65. .start = IRQ_PF7,
  66. .end = IRQ_PF7,
  67. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  68. },
  69. };
  70. static struct platform_device smc91x_device = {
  71. .name = "smc91x",
  72. .id = 0,
  73. .num_resources = ARRAY_SIZE(smc91x_resources),
  74. .resource = smc91x_resources,
  75. };
  76. #endif
  77. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  78. static struct platform_device bfin_fb_adv7393_device = {
  79. .name = "bfin-adv7393",
  80. };
  81. #endif
  82. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  83. static struct resource net2272_bfin_resources[] = {
  84. {
  85. .start = 0x20300000,
  86. .end = 0x20300000 + 0x100,
  87. .flags = IORESOURCE_MEM,
  88. }, {
  89. .start = IRQ_PF10,
  90. .end = IRQ_PF10,
  91. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  92. },
  93. };
  94. static struct platform_device net2272_bfin_device = {
  95. .name = "net2272",
  96. .id = -1,
  97. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  98. .resource = net2272_bfin_resources,
  99. };
  100. #endif
  101. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  102. /* all SPI peripherals info goes here */
  103. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  104. static struct mtd_partition bfin_spi_flash_partitions[] = {
  105. {
  106. .name = "bootloader",
  107. .size = 0x00020000,
  108. .offset = 0,
  109. .mask_flags = MTD_CAP_ROM
  110. }, {
  111. .name = "kernel",
  112. .size = 0xe0000,
  113. .offset = 0x20000
  114. }, {
  115. .name = "file system",
  116. .size = 0x700000,
  117. .offset = 0x00100000,
  118. }
  119. };
  120. static struct flash_platform_data bfin_spi_flash_data = {
  121. .name = "m25p80",
  122. .parts = bfin_spi_flash_partitions,
  123. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  124. .type = "m25p64",
  125. };
  126. /* SPI flash chip (m25p64) */
  127. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  128. .enable_dma = 0, /* use dma transfer with this chip*/
  129. .bits_per_word = 8,
  130. };
  131. #endif
  132. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  133. /* SPI ADC chip */
  134. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  135. .enable_dma = 1, /* use dma transfer with this chip*/
  136. .bits_per_word = 16,
  137. };
  138. #endif
  139. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  140. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  141. .enable_dma = 0,
  142. .bits_per_word = 16,
  143. };
  144. #endif
  145. #if defined(CONFIG_PBX)
  146. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  147. .ctl_reg = 0x4, /* send zero */
  148. .enable_dma = 0,
  149. .bits_per_word = 8,
  150. .cs_change_per_word = 1,
  151. };
  152. #endif
  153. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  154. static struct bfin5xx_spi_chip ad5304_chip_info = {
  155. .enable_dma = 0,
  156. .bits_per_word = 16,
  157. };
  158. #endif
  159. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  160. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  161. .enable_dma = 1,
  162. .bits_per_word = 8,
  163. };
  164. #endif
  165. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  166. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  167. {
  168. /* the modalias must be the same as spi device driver name */
  169. .modalias = "m25p80", /* Name of spi_driver for this device */
  170. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  171. .bus_num = 0, /* Framework bus number */
  172. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  173. .platform_data = &bfin_spi_flash_data,
  174. .controller_data = &spi_flash_chip_info,
  175. .mode = SPI_MODE_3,
  176. },
  177. #endif
  178. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  179. {
  180. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  181. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  182. .bus_num = 0, /* Framework bus number */
  183. .chip_select = 1, /* Framework chip select. */
  184. .platform_data = NULL, /* No spi_driver specific config */
  185. .controller_data = &spi_adc_chip_info,
  186. },
  187. #endif
  188. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  189. {
  190. .modalias = "ad1836-spi",
  191. .max_speed_hz = 31250000, /* max spi clock (SCK) speed in HZ */
  192. .bus_num = 0,
  193. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  194. .controller_data = &ad1836_spi_chip_info,
  195. },
  196. #endif
  197. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  198. {
  199. .modalias = "spi_mmc_dummy",
  200. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  201. .bus_num = 0,
  202. .chip_select = 0,
  203. .platform_data = NULL,
  204. .controller_data = &spi_mmc_chip_info,
  205. .mode = SPI_MODE_3,
  206. },
  207. {
  208. .modalias = "spi_mmc",
  209. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  210. .bus_num = 0,
  211. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  212. .platform_data = NULL,
  213. .controller_data = &spi_mmc_chip_info,
  214. .mode = SPI_MODE_3,
  215. },
  216. #endif
  217. #if defined(CONFIG_PBX)
  218. {
  219. .modalias = "fxs-spi",
  220. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  221. .bus_num = 0,
  222. .chip_select = 8 - CONFIG_J11_JUMPER,
  223. .controller_data = &spi_si3xxx_chip_info,
  224. .mode = SPI_MODE_3,
  225. },
  226. {
  227. .modalias = "fxo-spi",
  228. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  229. .bus_num = 0,
  230. .chip_select = 8 - CONFIG_J19_JUMPER,
  231. .controller_data = &spi_si3xxx_chip_info,
  232. .mode = SPI_MODE_3,
  233. },
  234. #endif
  235. #if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
  236. {
  237. .modalias = "ad5304_spi",
  238. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  239. .bus_num = 0,
  240. .chip_select = 2,
  241. .platform_data = NULL,
  242. .controller_data = &ad5304_chip_info,
  243. .mode = SPI_MODE_2,
  244. },
  245. #endif
  246. };
  247. /* SPI (0) */
  248. static struct resource bfin_spi0_resource[] = {
  249. [0] = {
  250. .start = SPI0_REGBASE,
  251. .end = SPI0_REGBASE + 0xFF,
  252. .flags = IORESOURCE_MEM,
  253. },
  254. [1] = {
  255. .start = CH_SPI,
  256. .end = CH_SPI,
  257. .flags = IORESOURCE_IRQ,
  258. }
  259. };
  260. /* SPI controller data */
  261. static struct bfin5xx_spi_master bfin_spi0_info = {
  262. .num_chipselect = 8,
  263. .enable_dma = 1, /* master has the ability to do dma transfer */
  264. };
  265. static struct platform_device bfin_spi0_device = {
  266. .name = "bfin-spi",
  267. .id = 0, /* Bus number */
  268. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  269. .resource = bfin_spi0_resource,
  270. .dev = {
  271. .platform_data = &bfin_spi0_info, /* Passed to driver */
  272. },
  273. };
  274. #endif /* spi master and devices */
  275. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  276. static struct platform_device bfin_fb_device = {
  277. .name = "bf537-fb",
  278. };
  279. #endif
  280. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  281. static struct resource bfin_uart_resources[] = {
  282. {
  283. .start = 0xFFC00400,
  284. .end = 0xFFC004FF,
  285. .flags = IORESOURCE_MEM,
  286. },
  287. };
  288. static struct platform_device bfin_uart_device = {
  289. .name = "bfin-uart",
  290. .id = 1,
  291. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  292. .resource = bfin_uart_resources,
  293. };
  294. #endif
  295. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  296. static struct platform_device bfin_sport0_uart_device = {
  297. .name = "bfin-sport-uart",
  298. .id = 0,
  299. };
  300. static struct platform_device bfin_sport1_uart_device = {
  301. .name = "bfin-sport-uart",
  302. .id = 1,
  303. };
  304. #endif
  305. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  306. #define PATA_INT 55
  307. static struct pata_platform_info bfin_pata_platform_data = {
  308. .ioport_shift = 1,
  309. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  310. };
  311. static struct resource bfin_pata_resources[] = {
  312. {
  313. .start = 0x20314020,
  314. .end = 0x2031403F,
  315. .flags = IORESOURCE_MEM,
  316. },
  317. {
  318. .start = 0x2031401C,
  319. .end = 0x2031401F,
  320. .flags = IORESOURCE_MEM,
  321. },
  322. {
  323. .start = PATA_INT,
  324. .end = PATA_INT,
  325. .flags = IORESOURCE_IRQ,
  326. },
  327. };
  328. static struct platform_device bfin_pata_device = {
  329. .name = "pata_platform",
  330. .id = -1,
  331. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  332. .resource = bfin_pata_resources,
  333. .dev = {
  334. .platform_data = &bfin_pata_platform_data,
  335. }
  336. };
  337. #endif
  338. static struct platform_device *stamp_devices[] __initdata = {
  339. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  340. &rtc_device,
  341. #endif
  342. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  343. &smc91x_device,
  344. #endif
  345. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  346. &bfin_fb_adv7393_device,
  347. #endif
  348. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  349. &net2272_bfin_device,
  350. #endif
  351. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  352. &bfin_spi0_device,
  353. #endif
  354. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  355. &bfin_uart_device,
  356. #endif
  357. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  358. &bfin_sport0_uart_device,
  359. &bfin_sport1_uart_device,
  360. #endif
  361. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  362. &bfin_pata_device,
  363. #endif
  364. };
  365. static int __init stamp_init(void)
  366. {
  367. int ret;
  368. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  369. ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  370. if (ret < 0)
  371. return ret;
  372. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  373. # if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
  374. /* setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC */
  375. bfin_write_FIO_DIR(bfin_read_FIO_DIR() | (1 << CONFIG_ENET_FLASH_PIN));
  376. bfin_write_FIO_FLAG_S(1 << CONFIG_ENET_FLASH_PIN);
  377. SSYNC();
  378. # endif
  379. #endif
  380. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  381. spi_register_board_info(bfin_spi_board_info,
  382. ARRAY_SIZE(bfin_spi_board_info));
  383. #endif
  384. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  385. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  386. #endif
  387. return 0;
  388. }
  389. arch_initcall(stamp_init);
  390. void native_machine_restart(char *cmd)
  391. {
  392. #if defined(CONFIG_BFIN_SHARED_FLASH_ENET)
  393. # define BIT_TO_SET (1 << CONFIG_ENET_FLASH_PIN)
  394. bfin_write_FIO_INEN(~BIT_TO_SET);
  395. bfin_write_FIO_DIR(BIT_TO_SET);
  396. bfin_write_FIO_FLAG_C(BIT_TO_SET);
  397. #endif
  398. }