cm_bf533.c 8.5 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf533/boards/cm_bf533.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/mtd/mtd.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/spi/flash.h>
  35. #include <linux/usb_isp1362.h>
  36. #include <linux/pata_platform.h>
  37. #include <linux/irq.h>
  38. #include <asm/dma.h>
  39. #include <asm/bfin5xx_spi.h>
  40. /*
  41. * Name the Board for the /proc/cpuinfo
  42. */
  43. char *bfin_board_name = "Bluetechnix CM BF533";
  44. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  45. /* all SPI peripherals info goes here */
  46. static struct mtd_partition bfin_spi_flash_partitions[] = {
  47. {
  48. .name = "bootloader",
  49. .size = 0x00020000,
  50. .offset = 0,
  51. .mask_flags = MTD_CAP_ROM
  52. }, {
  53. .name = "kernel",
  54. .size = 0xe0000,
  55. .offset = 0x20000
  56. }, {
  57. .name = "file system",
  58. .size = 0x700000,
  59. .offset = 0x00100000,
  60. }
  61. };
  62. static struct flash_platform_data bfin_spi_flash_data = {
  63. .name = "m25p80",
  64. .parts = bfin_spi_flash_partitions,
  65. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  66. .type = "m25p64",
  67. };
  68. /* SPI flash chip (m25p64) */
  69. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  70. .enable_dma = 0, /* use dma transfer with this chip*/
  71. .bits_per_word = 8,
  72. };
  73. /* SPI ADC chip */
  74. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  75. .enable_dma = 1, /* use dma transfer with this chip*/
  76. .bits_per_word = 16,
  77. };
  78. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  79. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  80. .enable_dma = 0,
  81. .bits_per_word = 16,
  82. };
  83. #endif
  84. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  85. {
  86. /* the modalias must be the same as spi device driver name */
  87. .modalias = "m25p80", /* Name of spi_driver for this device */
  88. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  89. .bus_num = 0, /* Framework bus number */
  90. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  91. .platform_data = &bfin_spi_flash_data,
  92. .controller_data = &spi_flash_chip_info,
  93. .mode = SPI_MODE_3,
  94. }, {
  95. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  96. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  97. .bus_num = 0, /* Framework bus number */
  98. .chip_select = 2, /* Framework chip select. */
  99. .platform_data = NULL, /* No spi_driver specific config */
  100. .controller_data = &spi_adc_chip_info,
  101. },
  102. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  103. {
  104. .modalias = "ad1836-spi",
  105. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  106. .bus_num = 0,
  107. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  108. .controller_data = &ad1836_spi_chip_info,
  109. },
  110. #endif
  111. };
  112. /* SPI (0) */
  113. static struct resource bfin_spi0_resource[] = {
  114. [0] = {
  115. .start = SPI0_REGBASE,
  116. .end = SPI0_REGBASE + 0xFF,
  117. .flags = IORESOURCE_MEM,
  118. },
  119. [1] = {
  120. .start = CH_SPI,
  121. .end = CH_SPI,
  122. .flags = IORESOURCE_IRQ,
  123. }
  124. };
  125. /* SPI controller data */
  126. static struct bfin5xx_spi_master bfin_spi0_info = {
  127. .num_chipselect = 8,
  128. .enable_dma = 1, /* master has the ability to do dma transfer */
  129. };
  130. static struct platform_device bfin_spi0_device = {
  131. .name = "bfin-spi",
  132. .id = 0, /* Bus number */
  133. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  134. .resource = bfin_spi0_resource,
  135. .dev = {
  136. .platform_data = &bfin_spi0_info, /* Passed to driver */
  137. },
  138. };
  139. #endif /* spi master and devices */
  140. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  141. static struct platform_device rtc_device = {
  142. .name = "rtc-bfin",
  143. .id = -1,
  144. };
  145. #endif
  146. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  147. static struct resource smc91x_resources[] = {
  148. {
  149. .start = 0x20200300,
  150. .end = 0x20200300 + 16,
  151. .flags = IORESOURCE_MEM,
  152. }, {
  153. .start = IRQ_PF0,
  154. .end = IRQ_PF0,
  155. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  156. },
  157. };
  158. static struct platform_device smc91x_device = {
  159. .name = "smc91x",
  160. .id = 0,
  161. .num_resources = ARRAY_SIZE(smc91x_resources),
  162. .resource = smc91x_resources,
  163. };
  164. #endif
  165. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  166. static struct resource bfin_uart_resources[] = {
  167. {
  168. .start = 0xFFC00400,
  169. .end = 0xFFC004FF,
  170. .flags = IORESOURCE_MEM,
  171. },
  172. };
  173. static struct platform_device bfin_uart_device = {
  174. .name = "bfin-uart",
  175. .id = 1,
  176. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  177. .resource = bfin_uart_resources,
  178. };
  179. #endif
  180. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  181. static struct platform_device bfin_sport0_uart_device = {
  182. .name = "bfin-sport-uart",
  183. .id = 0,
  184. };
  185. static struct platform_device bfin_sport1_uart_device = {
  186. .name = "bfin-sport-uart",
  187. .id = 1,
  188. };
  189. #endif
  190. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  191. static struct resource isp1362_hcd_resources[] = {
  192. {
  193. .start = 0x20308000,
  194. .end = 0x20308000,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = 0x20308004,
  198. .end = 0x20308004,
  199. .flags = IORESOURCE_MEM,
  200. }, {
  201. .start = IRQ_PF4,
  202. .end = IRQ_PF4,
  203. .flags = IORESOURCE_IRQ,
  204. },
  205. };
  206. static struct isp1362_platform_data isp1362_priv = {
  207. .sel15Kres = 1,
  208. .clknotstop = 0,
  209. .oc_enable = 0,
  210. .int_act_high = 0,
  211. .int_edge_triggered = 0,
  212. .remote_wakeup_connected = 0,
  213. .no_power_switching = 1,
  214. .power_switching_mode = 0,
  215. };
  216. static struct platform_device isp1362_hcd_device = {
  217. .name = "isp1362-hcd",
  218. .id = 0,
  219. .dev = {
  220. .platform_data = &isp1362_priv,
  221. },
  222. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  223. .resource = isp1362_hcd_resources,
  224. };
  225. #endif
  226. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  227. #define PATA_INT 38
  228. static struct pata_platform_info bfin_pata_platform_data = {
  229. .ioport_shift = 2,
  230. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  231. };
  232. static struct resource bfin_pata_resources[] = {
  233. {
  234. .start = 0x2030C000,
  235. .end = 0x2030C01F,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. {
  239. .start = 0x2030D018,
  240. .end = 0x2030D01B,
  241. .flags = IORESOURCE_MEM,
  242. },
  243. {
  244. .start = PATA_INT,
  245. .end = PATA_INT,
  246. .flags = IORESOURCE_IRQ,
  247. },
  248. };
  249. static struct platform_device bfin_pata_device = {
  250. .name = "pata_platform",
  251. .id = -1,
  252. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  253. .resource = bfin_pata_resources,
  254. .dev = {
  255. .platform_data = &bfin_pata_platform_data,
  256. }
  257. };
  258. #endif
  259. static struct platform_device *cm_bf533_devices[] __initdata = {
  260. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  261. &bfin_uart_device,
  262. #endif
  263. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  264. &bfin_sport0_uart_device,
  265. &bfin_sport1_uart_device,
  266. #endif
  267. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  268. &rtc_device,
  269. #endif
  270. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  271. &isp1362_hcd_device,
  272. #endif
  273. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  274. &smc91x_device,
  275. #endif
  276. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  277. &bfin_spi0_device,
  278. #endif
  279. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  280. &bfin_pata_device,
  281. #endif
  282. };
  283. static int __init cm_bf533_init(void)
  284. {
  285. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  286. platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
  287. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  288. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  289. #endif
  290. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  291. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  292. #endif
  293. return 0;
  294. }
  295. arch_initcall(cm_bf533_init);