time.c 4.9 KB

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  1. /*
  2. * linux/arch/arm/mach-imx/time.c
  3. *
  4. * Copyright (C) 2000-2001 Deep Blue Solutions
  5. * Copyright (C) 2002 Shane Nay (shane@minirl.com)
  6. * Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/init.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/time.h>
  18. #include <linux/clocksource.h>
  19. #include <linux/clockchips.h>
  20. #include <asm/hardware.h>
  21. #include <asm/io.h>
  22. #include <asm/leds.h>
  23. #include <asm/irq.h>
  24. #include <asm/mach/time.h>
  25. /* Use timer 1 as system timer */
  26. #define TIMER_BASE IMX_TIM1_BASE
  27. static struct clock_event_device clockevent_imx;
  28. static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
  29. /*
  30. * IRQ handler for the timer
  31. */
  32. static irqreturn_t
  33. imx_timer_interrupt(int irq, void *dev_id)
  34. {
  35. struct clock_event_device *evt = &clockevent_imx;
  36. uint32_t tstat;
  37. irqreturn_t ret = IRQ_NONE;
  38. /* clear the interrupt */
  39. tstat = IMX_TSTAT(TIMER_BASE);
  40. IMX_TSTAT(TIMER_BASE) = 0;
  41. if (tstat & TSTAT_COMP) {
  42. evt->event_handler(evt);
  43. ret = IRQ_HANDLED;
  44. }
  45. return ret;
  46. }
  47. static struct irqaction imx_timer_irq = {
  48. .name = "i.MX Timer Tick",
  49. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  50. .handler = imx_timer_interrupt,
  51. };
  52. /*
  53. * Set up timer hardware into expected mode and state.
  54. */
  55. static void __init imx_timer_hardware_init(void)
  56. {
  57. /*
  58. * Initialise to a known state (all timers off, and timing reset)
  59. */
  60. IMX_TCTL(TIMER_BASE) = 0;
  61. IMX_TPRER(TIMER_BASE) = 0;
  62. IMX_TCTL(TIMER_BASE) = TCTL_FRR | TCTL_CLK_PCLK1 | TCTL_TEN;
  63. }
  64. cycle_t imx_get_cycles(void)
  65. {
  66. return IMX_TCN(TIMER_BASE);
  67. }
  68. static struct clocksource clocksource_imx = {
  69. .name = "imx_timer1",
  70. .rating = 200,
  71. .read = imx_get_cycles,
  72. .mask = 0xFFFFFFFF,
  73. .shift = 20,
  74. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  75. };
  76. static int __init imx_clocksource_init(void)
  77. {
  78. clocksource_imx.mult =
  79. clocksource_hz2mult(imx_get_perclk1(), clocksource_imx.shift);
  80. clocksource_register(&clocksource_imx);
  81. return 0;
  82. }
  83. static int imx_set_next_event(unsigned long evt,
  84. struct clock_event_device *unused)
  85. {
  86. unsigned long tcmp;
  87. tcmp = IMX_TCN(TIMER_BASE) + evt;
  88. IMX_TCMP(TIMER_BASE) = tcmp;
  89. return (int32_t)(tcmp - IMX_TCN(TIMER_BASE)) < 0 ? -ETIME : 0;
  90. }
  91. #ifdef DEBUG
  92. static const char *clock_event_mode_label[]={
  93. [CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC",
  94. [CLOCK_EVT_MODE_ONESHOT] = "CLOCK_EVT_MODE_ONESHOT",
  95. [CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN",
  96. [CLOCK_EVT_MODE_UNUSED] = "CLOCK_EVT_MODE_UNUSED"
  97. };
  98. #endif /*DEBUG*/
  99. static void imx_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
  100. {
  101. unsigned long flags;
  102. /*
  103. * The timer interrupt generation is disabled at least
  104. * for enough time to call imx_set_next_event()
  105. */
  106. local_irq_save(flags);
  107. /* Disable interrupt in GPT module */
  108. IMX_TCTL(TIMER_BASE) &= ~TCTL_IRQEN;
  109. if (mode != clockevent_mode) {
  110. /* Set event time into far-far future */
  111. IMX_TCMP(TIMER_BASE) = IMX_TCN(TIMER_BASE) - 3;
  112. /* Clear pending interrupt */
  113. IMX_TSTAT(TIMER_BASE) &= ~TSTAT_COMP;
  114. }
  115. #ifdef DEBUG
  116. printk(KERN_INFO "imx_set_mode: changing mode from %s to %s\n",
  117. clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]);
  118. #endif /*DEBUG*/
  119. /* Remember timer mode */
  120. clockevent_mode = mode;
  121. local_irq_restore(flags);
  122. switch (mode) {
  123. case CLOCK_EVT_MODE_PERIODIC:
  124. printk(KERN_ERR "imx_set_mode: Periodic mode is not supported for i.MX\n");
  125. break;
  126. case CLOCK_EVT_MODE_ONESHOT:
  127. /*
  128. * Do not put overhead of interrupt enable/disable into
  129. * imx_set_next_event(), the core has about 4 minutes
  130. * to call imx_set_next_event() or shutdown clock after
  131. * mode switching
  132. */
  133. local_irq_save(flags);
  134. IMX_TCTL(TIMER_BASE) |= TCTL_IRQEN;
  135. local_irq_restore(flags);
  136. break;
  137. case CLOCK_EVT_MODE_SHUTDOWN:
  138. case CLOCK_EVT_MODE_UNUSED:
  139. case CLOCK_EVT_MODE_RESUME:
  140. /* Left event sources disabled, no more interrupts appears */
  141. break;
  142. }
  143. }
  144. static struct clock_event_device clockevent_imx = {
  145. .name = "imx_timer1",
  146. .features = CLOCK_EVT_FEAT_ONESHOT,
  147. .shift = 32,
  148. .set_mode = imx_set_mode,
  149. .set_next_event = imx_set_next_event,
  150. .rating = 200,
  151. };
  152. static int __init imx_clockevent_init(void)
  153. {
  154. clockevent_imx.mult = div_sc(imx_get_perclk1(), NSEC_PER_SEC,
  155. clockevent_imx.shift);
  156. clockevent_imx.max_delta_ns =
  157. clockevent_delta2ns(0xfffffffe, &clockevent_imx);
  158. clockevent_imx.min_delta_ns =
  159. clockevent_delta2ns(0xf, &clockevent_imx);
  160. clockevent_imx.cpumask = cpumask_of_cpu(0);
  161. clockevents_register_device(&clockevent_imx);
  162. return 0;
  163. }
  164. static void __init imx_timer_init(void)
  165. {
  166. imx_timer_hardware_init();
  167. imx_clocksource_init();
  168. imx_clockevent_init();
  169. /*
  170. * Make irqs happen for the system timer
  171. */
  172. setup_irq(TIM1_INT, &imx_timer_irq);
  173. }
  174. struct sys_timer imx_timer = {
  175. .init = imx_timer_init,
  176. };