tifm_ms.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682
  1. /*
  2. * TI FlashMedia driver
  3. *
  4. * Copyright (C) 2007 Alex Dubov <oakad@yahoo.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Special thanks to Carlos Corbacho for providing various MemoryStick cards
  11. * that made this driver possible.
  12. *
  13. */
  14. #include <linux/tifm.h>
  15. #include <linux/memstick.h>
  16. #include <linux/highmem.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/log2.h>
  19. #include <asm/io.h>
  20. #define DRIVER_NAME "tifm_ms"
  21. static int no_dma;
  22. module_param(no_dma, bool, 0644);
  23. #define TIFM_MS_TIMEOUT 0x00100
  24. #define TIFM_MS_BADCRC 0x00200
  25. #define TIFM_MS_EOTPC 0x01000
  26. #define TIFM_MS_INT 0x02000
  27. /* The meaning of the bit majority in this constant is unknown. */
  28. #define TIFM_MS_SERIAL 0x04010
  29. #define TIFM_MS_SYS_LATCH 0x00100
  30. #define TIFM_MS_SYS_NOT_RDY 0x00800
  31. #define TIFM_MS_SYS_DATA 0x10000
  32. /* Hardware flags */
  33. enum {
  34. CMD_READY = 0x0001,
  35. FIFO_READY = 0x0002,
  36. CARD_READY = 0x0004,
  37. DATA_CARRY = 0x0008
  38. };
  39. struct tifm_ms {
  40. struct tifm_dev *dev;
  41. unsigned short eject:1,
  42. no_dma:1;
  43. unsigned short cmd_flags;
  44. unsigned int mode_mask;
  45. unsigned int block_pos;
  46. unsigned long timeout_jiffies;
  47. struct timer_list timer;
  48. struct memstick_request *req;
  49. unsigned int io_word;
  50. };
  51. static void tifm_ms_read_fifo(struct tifm_ms *host, unsigned int fifo_offset,
  52. struct page *pg, unsigned int page_off,
  53. unsigned int length)
  54. {
  55. struct tifm_dev *sock = host->dev;
  56. unsigned int cnt = 0, off = 0;
  57. unsigned char *buf = kmap_atomic(pg, KM_BIO_DST_IRQ) + page_off;
  58. if (host->cmd_flags & DATA_CARRY) {
  59. while ((fifo_offset & 3) && length) {
  60. buf[off++] = host->io_word & 0xff;
  61. host->io_word >>= 8;
  62. length--;
  63. fifo_offset++;
  64. }
  65. if (!(fifo_offset & 3))
  66. host->cmd_flags &= ~DATA_CARRY;
  67. if (!length)
  68. return;
  69. }
  70. do {
  71. host->io_word = readl(sock->addr + SOCK_FIFO_ACCESS
  72. + fifo_offset);
  73. cnt = 4;
  74. while (length && cnt) {
  75. buf[off++] = (host->io_word >> 8) & 0xff;
  76. cnt--;
  77. length--;
  78. }
  79. fifo_offset += 4 - cnt;
  80. } while (length);
  81. if (cnt)
  82. host->cmd_flags |= DATA_CARRY;
  83. kunmap_atomic(buf - page_off, KM_BIO_DST_IRQ);
  84. }
  85. static void tifm_ms_write_fifo(struct tifm_ms *host, unsigned int fifo_offset,
  86. struct page *pg, unsigned int page_off,
  87. unsigned int length)
  88. {
  89. struct tifm_dev *sock = host->dev;
  90. unsigned int cnt = 0, off = 0;
  91. unsigned char *buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + page_off;
  92. if (host->cmd_flags & DATA_CARRY) {
  93. while (fifo_offset & 3) {
  94. host->io_word |= buf[off++] << (8 * (fifo_offset & 3));
  95. length--;
  96. fifo_offset++;
  97. }
  98. if (!(fifo_offset & 3)) {
  99. writel(host->io_word, sock->addr + SOCK_FIFO_ACCESS
  100. + fifo_offset - 4);
  101. host->cmd_flags &= ~DATA_CARRY;
  102. }
  103. if (!length)
  104. return;
  105. }
  106. do {
  107. cnt = 4;
  108. host->io_word = 0;
  109. while (length && cnt) {
  110. host->io_word |= buf[off++] << (4 - cnt);
  111. cnt--;
  112. length--;
  113. }
  114. fifo_offset += 4 - cnt;
  115. if (!cnt)
  116. writel(host->io_word, sock->addr + SOCK_FIFO_ACCESS
  117. + fifo_offset - 4);
  118. } while (length);
  119. if (cnt)
  120. host->cmd_flags |= DATA_CARRY;
  121. kunmap_atomic(buf - page_off, KM_BIO_SRC_IRQ);
  122. }
  123. static void tifm_ms_move_block(struct tifm_ms *host, unsigned int length)
  124. {
  125. unsigned int t_size;
  126. unsigned int off = host->req->sg.offset + host->block_pos;
  127. unsigned int p_off, p_cnt;
  128. struct page *pg;
  129. unsigned long flags;
  130. dev_dbg(&host->dev->dev, "moving block\n");
  131. local_irq_save(flags);
  132. t_size = length;
  133. while (t_size) {
  134. pg = nth_page(sg_page(&host->req->sg), off >> PAGE_SHIFT);
  135. p_off = offset_in_page(off);
  136. p_cnt = PAGE_SIZE - p_off;
  137. p_cnt = min(p_cnt, t_size);
  138. if (host->req->data_dir == WRITE)
  139. tifm_ms_write_fifo(host, length - t_size,
  140. pg, p_off, p_cnt);
  141. else
  142. tifm_ms_read_fifo(host, length - t_size,
  143. pg, p_off, p_cnt);
  144. t_size -= p_cnt;
  145. }
  146. local_irq_restore(flags);
  147. }
  148. static int tifm_ms_transfer_data(struct tifm_ms *host, int skip)
  149. {
  150. struct tifm_dev *sock = host->dev;
  151. unsigned int length = host->req->sg.length - host->block_pos;
  152. if (!length)
  153. return 1;
  154. if (length > TIFM_FIFO_SIZE)
  155. length = TIFM_FIFO_SIZE;
  156. if (!skip) {
  157. tifm_ms_move_block(host, length);
  158. host->block_pos += length;
  159. }
  160. if ((host->req->data_dir == READ)
  161. && (host->block_pos == host->req->sg.length))
  162. return 1;
  163. writel(ilog2(length) - 2, sock->addr + SOCK_FIFO_PAGE_SIZE);
  164. if (host->req->data_dir == WRITE)
  165. writel((1 << 8) | TIFM_DMA_TX, sock->addr + SOCK_DMA_CONTROL);
  166. else
  167. writel((1 << 8), sock->addr + SOCK_DMA_CONTROL);
  168. return 0;
  169. }
  170. static int tifm_ms_issue_cmd(struct tifm_ms *host)
  171. {
  172. struct tifm_dev *sock = host->dev;
  173. unsigned char *data;
  174. unsigned int data_len = 0, cmd = 0, cmd_mask = 0, cnt, tval = 0;
  175. host->cmd_flags = 0;
  176. if (host->req->long_data) {
  177. if (!host->no_dma) {
  178. if (1 != tifm_map_sg(sock, &host->req->sg, 1,
  179. host->req->data_dir == READ
  180. ? PCI_DMA_FROMDEVICE
  181. : PCI_DMA_TODEVICE)) {
  182. host->req->error = -ENOMEM;
  183. return host->req->error;
  184. }
  185. data_len = sg_dma_len(&host->req->sg);
  186. } else
  187. data_len = host->req->sg.length;
  188. writel(TIFM_FIFO_INT_SETALL,
  189. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  190. writel(TIFM_FIFO_ENABLE,
  191. sock->addr + SOCK_FIFO_CONTROL);
  192. writel(TIFM_FIFO_INTMASK,
  193. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  194. if (!host->no_dma) {
  195. writel(ilog2(data_len) - 2,
  196. sock->addr + SOCK_FIFO_PAGE_SIZE);
  197. writel(sg_dma_address(&host->req->sg),
  198. sock->addr + SOCK_DMA_ADDRESS);
  199. if (host->req->data_dir == WRITE)
  200. writel((1 << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
  201. sock->addr + SOCK_DMA_CONTROL);
  202. else
  203. writel((1 << 8) | TIFM_DMA_EN,
  204. sock->addr + SOCK_DMA_CONTROL);
  205. } else {
  206. tifm_ms_transfer_data(host,
  207. host->req->data_dir == READ);
  208. }
  209. cmd_mask = readl(sock->addr + SOCK_MS_SYSTEM);
  210. cmd_mask |= TIFM_MS_SYS_DATA | TIFM_MS_SYS_NOT_RDY;
  211. writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM);
  212. } else {
  213. data = host->req->data;
  214. data_len = host->req->data_len;
  215. cmd_mask = host->mode_mask | 0x2607; /* unknown constant */
  216. if (host->req->data_dir == WRITE) {
  217. cmd_mask |= TIFM_MS_SYS_LATCH;
  218. writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM);
  219. for (cnt = 0; (data_len - cnt) >= 4; cnt += 4) {
  220. writel(TIFM_MS_SYS_LATCH
  221. | readl(sock->addr + SOCK_MS_SYSTEM),
  222. sock->addr + SOCK_MS_SYSTEM);
  223. __raw_writel(*(unsigned int *)(data + cnt),
  224. sock->addr + SOCK_MS_DATA);
  225. dev_dbg(&sock->dev, "writing %x\n",
  226. *(int *)(data + cnt));
  227. }
  228. switch (data_len - cnt) {
  229. case 3:
  230. tval |= data[cnt + 2] << 16;
  231. case 2:
  232. tval |= data[cnt + 1] << 8;
  233. case 1:
  234. tval |= data[cnt];
  235. writel(TIFM_MS_SYS_LATCH
  236. | readl(sock->addr + SOCK_MS_SYSTEM),
  237. sock->addr + SOCK_MS_SYSTEM);
  238. writel(tval, sock->addr + SOCK_MS_DATA);
  239. dev_dbg(&sock->dev, "writing %x\n", tval);
  240. }
  241. writel(TIFM_MS_SYS_LATCH
  242. | readl(sock->addr + SOCK_MS_SYSTEM),
  243. sock->addr + SOCK_MS_SYSTEM);
  244. writel(0, sock->addr + SOCK_MS_DATA);
  245. dev_dbg(&sock->dev, "writing %x\n", 0);
  246. } else
  247. writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM);
  248. cmd_mask = readl(sock->addr + SOCK_MS_SYSTEM);
  249. cmd_mask &= ~TIFM_MS_SYS_DATA;
  250. cmd_mask |= TIFM_MS_SYS_NOT_RDY;
  251. dev_dbg(&sock->dev, "mask %x\n", cmd_mask);
  252. writel(cmd_mask, sock->addr + SOCK_MS_SYSTEM);
  253. }
  254. mod_timer(&host->timer, jiffies + host->timeout_jiffies);
  255. writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
  256. sock->addr + SOCK_CONTROL);
  257. host->req->error = 0;
  258. cmd = (host->req->tpc & 0xf) << 12;
  259. cmd |= data_len;
  260. writel(cmd, sock->addr + SOCK_MS_COMMAND);
  261. dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, cmd_mask);
  262. return 0;
  263. }
  264. static void tifm_ms_complete_cmd(struct tifm_ms *host)
  265. {
  266. struct tifm_dev *sock = host->dev;
  267. struct memstick_host *msh = tifm_get_drvdata(sock);
  268. unsigned int tval = 0, data_len;
  269. unsigned char *data;
  270. int rc;
  271. del_timer(&host->timer);
  272. if (host->req->long_data) {
  273. if (!host->no_dma)
  274. tifm_unmap_sg(sock, &host->req->sg, 1,
  275. host->req->data_dir == READ
  276. ? PCI_DMA_FROMDEVICE
  277. : PCI_DMA_TODEVICE);
  278. } else {
  279. writel(~TIFM_MS_SYS_DATA & readl(sock->addr + SOCK_MS_SYSTEM),
  280. sock->addr + SOCK_MS_SYSTEM);
  281. data = host->req->data;
  282. data_len = host->req->data_len;
  283. if (host->req->data_dir == READ) {
  284. for (rc = 0; (data_len - rc) >= 4; rc += 4)
  285. *(int *)(data + rc)
  286. = __raw_readl(sock->addr
  287. + SOCK_MS_DATA);
  288. if (data_len - rc)
  289. tval = readl(sock->addr + SOCK_MS_DATA);
  290. switch (data_len - rc) {
  291. case 3:
  292. data[rc + 2] = (tval >> 16) & 0xff;
  293. case 2:
  294. data[rc + 1] = (tval >> 8) & 0xff;
  295. case 1:
  296. data[rc] = tval & 0xff;
  297. }
  298. readl(sock->addr + SOCK_MS_DATA);
  299. }
  300. }
  301. writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
  302. sock->addr + SOCK_CONTROL);
  303. do {
  304. rc = memstick_next_req(msh, &host->req);
  305. } while (!rc && tifm_ms_issue_cmd(host));
  306. }
  307. static int tifm_ms_check_status(struct tifm_ms *host)
  308. {
  309. if (!host->req->error) {
  310. if (!(host->cmd_flags & CMD_READY))
  311. return 1;
  312. if (host->req->long_data
  313. && !(host->cmd_flags & FIFO_READY))
  314. return 1;
  315. if (host->req->need_card_int
  316. && !(host->cmd_flags & CARD_READY))
  317. return 1;
  318. }
  319. return 0;
  320. }
  321. /* Called from interrupt handler */
  322. static void tifm_ms_data_event(struct tifm_dev *sock)
  323. {
  324. struct tifm_ms *host;
  325. unsigned int fifo_status = 0;
  326. int rc = 1;
  327. spin_lock(&sock->lock);
  328. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  329. fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
  330. dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n",
  331. fifo_status, host->cmd_flags);
  332. if (host->req) {
  333. if (fifo_status & TIFM_FIFO_READY) {
  334. if (!host->no_dma || tifm_ms_transfer_data(host, 0)) {
  335. host->cmd_flags |= FIFO_READY;
  336. rc = tifm_ms_check_status(host);
  337. }
  338. }
  339. }
  340. writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
  341. if (!rc)
  342. tifm_ms_complete_cmd(host);
  343. spin_unlock(&sock->lock);
  344. }
  345. /* Called from interrupt handler */
  346. static void tifm_ms_card_event(struct tifm_dev *sock)
  347. {
  348. struct tifm_ms *host;
  349. unsigned int host_status = 0;
  350. int rc = 1;
  351. spin_lock(&sock->lock);
  352. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  353. host_status = readl(sock->addr + SOCK_MS_STATUS);
  354. dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
  355. host_status, host->cmd_flags);
  356. if (host->req) {
  357. if (host_status & TIFM_MS_TIMEOUT)
  358. host->req->error = -ETIME;
  359. else if (host_status & TIFM_MS_BADCRC)
  360. host->req->error = -EILSEQ;
  361. if (host->req->error) {
  362. writel(TIFM_FIFO_INT_SETALL,
  363. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  364. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  365. }
  366. if (host_status & TIFM_MS_EOTPC)
  367. host->cmd_flags |= CMD_READY;
  368. if (host_status & TIFM_MS_INT)
  369. host->cmd_flags |= CARD_READY;
  370. rc = tifm_ms_check_status(host);
  371. }
  372. writel(TIFM_MS_SYS_NOT_RDY | readl(sock->addr + SOCK_MS_SYSTEM),
  373. sock->addr + SOCK_MS_SYSTEM);
  374. writel((~TIFM_MS_SYS_DATA) & readl(sock->addr + SOCK_MS_SYSTEM),
  375. sock->addr + SOCK_MS_SYSTEM);
  376. if (!rc)
  377. tifm_ms_complete_cmd(host);
  378. spin_unlock(&sock->lock);
  379. return;
  380. }
  381. static void tifm_ms_request(struct memstick_host *msh)
  382. {
  383. struct tifm_ms *host = memstick_priv(msh);
  384. struct tifm_dev *sock = host->dev;
  385. unsigned long flags;
  386. int rc;
  387. spin_lock_irqsave(&sock->lock, flags);
  388. if (host->req) {
  389. printk(KERN_ERR "%s : unfinished request detected\n",
  390. sock->dev.bus_id);
  391. spin_unlock_irqrestore(&sock->lock, flags);
  392. tifm_eject(host->dev);
  393. return;
  394. }
  395. if (host->eject) {
  396. do {
  397. rc = memstick_next_req(msh, &host->req);
  398. if (!rc)
  399. host->req->error = -ETIME;
  400. } while (!rc);
  401. spin_unlock_irqrestore(&sock->lock, flags);
  402. return;
  403. }
  404. do {
  405. rc = memstick_next_req(msh, &host->req);
  406. } while (!rc && tifm_ms_issue_cmd(host));
  407. spin_unlock_irqrestore(&sock->lock, flags);
  408. return;
  409. }
  410. static void tifm_ms_set_param(struct memstick_host *msh,
  411. enum memstick_param param,
  412. int value)
  413. {
  414. struct tifm_ms *host = memstick_priv(msh);
  415. struct tifm_dev *sock = host->dev;
  416. unsigned long flags;
  417. spin_lock_irqsave(&sock->lock, flags);
  418. switch (param) {
  419. case MEMSTICK_POWER:
  420. /* this is set by card detection mechanism */
  421. break;
  422. case MEMSTICK_INTERFACE:
  423. if (value == MEMSTICK_SERIAL) {
  424. host->mode_mask = TIFM_MS_SERIAL;
  425. writel((~TIFM_CTRL_FAST_CLK)
  426. & readl(sock->addr + SOCK_CONTROL),
  427. sock->addr + SOCK_CONTROL);
  428. } else if (value == MEMSTICK_PAR4) {
  429. host->mode_mask = 0;
  430. writel(TIFM_CTRL_FAST_CLK
  431. | readl(sock->addr + SOCK_CONTROL),
  432. sock->addr + SOCK_CONTROL);
  433. }
  434. break;
  435. };
  436. spin_unlock_irqrestore(&sock->lock, flags);
  437. }
  438. static void tifm_ms_abort(unsigned long data)
  439. {
  440. struct tifm_ms *host = (struct tifm_ms *)data;
  441. dev_dbg(&host->dev->dev, "status %x\n",
  442. readl(host->dev->addr + SOCK_MS_STATUS));
  443. printk(KERN_ERR
  444. "%s : card failed to respond for a long period of time "
  445. "(%x, %x)\n",
  446. host->dev->dev.bus_id, host->req ? host->req->tpc : 0,
  447. host->cmd_flags);
  448. tifm_eject(host->dev);
  449. }
  450. static int tifm_ms_initialize_host(struct tifm_ms *host)
  451. {
  452. struct tifm_dev *sock = host->dev;
  453. struct memstick_host *msh = tifm_get_drvdata(sock);
  454. host->mode_mask = TIFM_MS_SERIAL;
  455. writel(0x8000, sock->addr + SOCK_MS_SYSTEM);
  456. writel(0x0200 | TIFM_MS_SYS_NOT_RDY, sock->addr + SOCK_MS_SYSTEM);
  457. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  458. if (tifm_has_ms_pif(sock))
  459. msh->caps |= MEMSTICK_CAP_PAR4;
  460. return 0;
  461. }
  462. static int tifm_ms_probe(struct tifm_dev *sock)
  463. {
  464. struct memstick_host *msh;
  465. struct tifm_ms *host;
  466. int rc = -EIO;
  467. if (!(TIFM_SOCK_STATE_OCCUPIED
  468. & readl(sock->addr + SOCK_PRESENT_STATE))) {
  469. printk(KERN_WARNING "%s : card gone, unexpectedly\n",
  470. sock->dev.bus_id);
  471. return rc;
  472. }
  473. msh = memstick_alloc_host(sizeof(struct tifm_ms), &sock->dev);
  474. if (!msh)
  475. return -ENOMEM;
  476. host = memstick_priv(msh);
  477. tifm_set_drvdata(sock, msh);
  478. host->dev = sock;
  479. host->timeout_jiffies = msecs_to_jiffies(1000);
  480. host->no_dma = no_dma;
  481. setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host);
  482. msh->request = tifm_ms_request;
  483. msh->set_param = tifm_ms_set_param;
  484. sock->card_event = tifm_ms_card_event;
  485. sock->data_event = tifm_ms_data_event;
  486. rc = tifm_ms_initialize_host(host);
  487. if (!rc)
  488. rc = memstick_add_host(msh);
  489. if (!rc)
  490. return 0;
  491. memstick_free_host(msh);
  492. return rc;
  493. }
  494. static void tifm_ms_remove(struct tifm_dev *sock)
  495. {
  496. struct memstick_host *msh = tifm_get_drvdata(sock);
  497. struct tifm_ms *host = memstick_priv(msh);
  498. int rc = 0;
  499. unsigned long flags;
  500. spin_lock_irqsave(&sock->lock, flags);
  501. host->eject = 1;
  502. if (host->req) {
  503. del_timer(&host->timer);
  504. writel(TIFM_FIFO_INT_SETALL,
  505. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  506. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  507. if (host->req->long_data && !host->no_dma)
  508. tifm_unmap_sg(sock, &host->req->sg, 1,
  509. host->req->data_dir == READ
  510. ? PCI_DMA_TODEVICE
  511. : PCI_DMA_FROMDEVICE);
  512. host->req->error = -ETIME;
  513. do {
  514. rc = memstick_next_req(msh, &host->req);
  515. if (!rc)
  516. host->req->error = -ETIME;
  517. } while (!rc);
  518. }
  519. spin_unlock_irqrestore(&sock->lock, flags);
  520. memstick_remove_host(msh);
  521. writel(0x0200 | TIFM_MS_SYS_NOT_RDY, sock->addr + SOCK_MS_SYSTEM);
  522. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  523. memstick_free_host(msh);
  524. }
  525. #ifdef CONFIG_PM
  526. static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state)
  527. {
  528. struct memstick_host *msh = tifm_get_drvdata(sock);
  529. memstick_suspend_host(msh);
  530. return 0;
  531. }
  532. static int tifm_ms_resume(struct tifm_dev *sock)
  533. {
  534. struct memstick_host *msh = tifm_get_drvdata(sock);
  535. memstick_resume_host(msh);
  536. return 0;
  537. }
  538. #else
  539. #define tifm_ms_suspend NULL
  540. #define tifm_ms_resume NULL
  541. #endif /* CONFIG_PM */
  542. static struct tifm_device_id tifm_ms_id_tbl[] = {
  543. { TIFM_TYPE_MS }, { 0 }
  544. };
  545. static struct tifm_driver tifm_ms_driver = {
  546. .driver = {
  547. .name = DRIVER_NAME,
  548. .owner = THIS_MODULE
  549. },
  550. .id_table = tifm_ms_id_tbl,
  551. .probe = tifm_ms_probe,
  552. .remove = tifm_ms_remove,
  553. .suspend = tifm_ms_suspend,
  554. .resume = tifm_ms_resume
  555. };
  556. static int __init tifm_ms_init(void)
  557. {
  558. return tifm_register_driver(&tifm_ms_driver);
  559. }
  560. static void __exit tifm_ms_exit(void)
  561. {
  562. tifm_unregister_driver(&tifm_ms_driver);
  563. }
  564. MODULE_AUTHOR("Alex Dubov");
  565. MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver");
  566. MODULE_LICENSE("GPL");
  567. MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl);
  568. module_init(tifm_ms_init);
  569. module_exit(tifm_ms_exit);