lpar.c 16 KB

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  1. /*
  2. * pSeries_lpar.c
  3. * Copyright (C) 2001 Todd Inglett, IBM Corporation
  4. *
  5. * pSeries LPAR support.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. /* Enables debugging of low-level hash table routines - careful! */
  22. #undef DEBUG
  23. #include <linux/kernel.h>
  24. #include <linux/dma-mapping.h>
  25. #include <linux/console.h>
  26. #include <linux/export.h>
  27. #include <asm/processor.h>
  28. #include <asm/mmu.h>
  29. #include <asm/page.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/machdep.h>
  32. #include <asm/abs_addr.h>
  33. #include <asm/mmu_context.h>
  34. #include <asm/iommu.h>
  35. #include <asm/tlbflush.h>
  36. #include <asm/tlb.h>
  37. #include <asm/prom.h>
  38. #include <asm/cputable.h>
  39. #include <asm/udbg.h>
  40. #include <asm/smp.h>
  41. #include <asm/trace.h>
  42. #include <asm/firmware.h>
  43. #include "plpar_wrappers.h"
  44. #include "pseries.h"
  45. /* in hvCall.S */
  46. EXPORT_SYMBOL(plpar_hcall);
  47. EXPORT_SYMBOL(plpar_hcall9);
  48. EXPORT_SYMBOL(plpar_hcall_norets);
  49. extern void pSeries_find_serial_port(void);
  50. void vpa_init(int cpu)
  51. {
  52. int hwcpu = get_hard_smp_processor_id(cpu);
  53. unsigned long addr;
  54. long ret;
  55. struct paca_struct *pp;
  56. struct dtl_entry *dtl;
  57. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  58. lppaca_of(cpu).vmxregs_in_use = 1;
  59. addr = __pa(&lppaca_of(cpu));
  60. ret = register_vpa(hwcpu, addr);
  61. if (ret) {
  62. pr_err("WARNING: VPA registration for cpu %d (hw %d) of area "
  63. "%lx failed with %ld\n", cpu, hwcpu, addr, ret);
  64. return;
  65. }
  66. /*
  67. * PAPR says this feature is SLB-Buffer but firmware never
  68. * reports that. All SPLPAR support SLB shadow buffer.
  69. */
  70. addr = __pa(&slb_shadow[cpu]);
  71. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  72. ret = register_slb_shadow(hwcpu, addr);
  73. if (ret)
  74. pr_err("WARNING: SLB shadow buffer registration for "
  75. "cpu %d (hw %d) of area %lx failed with %ld\n",
  76. cpu, hwcpu, addr, ret);
  77. }
  78. /*
  79. * Register dispatch trace log, if one has been allocated.
  80. */
  81. pp = &paca[cpu];
  82. dtl = pp->dispatch_log;
  83. if (dtl) {
  84. pp->dtl_ridx = 0;
  85. pp->dtl_curr = dtl;
  86. lppaca_of(cpu).dtl_idx = 0;
  87. /* hypervisor reads buffer length from this field */
  88. dtl->enqueue_to_dispatch_time = DISPATCH_LOG_BYTES;
  89. ret = register_dtl(hwcpu, __pa(dtl));
  90. if (ret)
  91. pr_err("WARNING: DTL registration of cpu %d (hw %d) "
  92. "failed with %ld\n", smp_processor_id(),
  93. hwcpu, ret);
  94. lppaca_of(cpu).dtl_enable_mask = 2;
  95. }
  96. }
  97. static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
  98. unsigned long va, unsigned long pa,
  99. unsigned long rflags, unsigned long vflags,
  100. int psize, int ssize)
  101. {
  102. unsigned long lpar_rc;
  103. unsigned long flags;
  104. unsigned long slot;
  105. unsigned long hpte_v, hpte_r;
  106. if (!(vflags & HPTE_V_BOLTED))
  107. pr_devel("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
  108. "rflags=%lx, vflags=%lx, psize=%d)\n",
  109. hpte_group, va, pa, rflags, vflags, psize);
  110. hpte_v = hpte_encode_v(va, psize, ssize) | vflags | HPTE_V_VALID;
  111. hpte_r = hpte_encode_r(pa, psize) | rflags;
  112. if (!(vflags & HPTE_V_BOLTED))
  113. pr_devel(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
  114. /* Now fill in the actual HPTE */
  115. /* Set CEC cookie to 0 */
  116. /* Zero page = 0 */
  117. /* I-cache Invalidate = 0 */
  118. /* I-cache synchronize = 0 */
  119. /* Exact = 0 */
  120. flags = 0;
  121. /* Make pHyp happy */
  122. if ((rflags & _PAGE_NO_CACHE) & !(rflags & _PAGE_WRITETHRU))
  123. hpte_r &= ~_PAGE_COHERENT;
  124. if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
  125. flags |= H_COALESCE_CAND;
  126. lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
  127. if (unlikely(lpar_rc == H_PTEG_FULL)) {
  128. if (!(vflags & HPTE_V_BOLTED))
  129. pr_devel(" full\n");
  130. return -1;
  131. }
  132. /*
  133. * Since we try and ioremap PHBs we don't own, the pte insert
  134. * will fail. However we must catch the failure in hash_page
  135. * or we will loop forever, so return -2 in this case.
  136. */
  137. if (unlikely(lpar_rc != H_SUCCESS)) {
  138. if (!(vflags & HPTE_V_BOLTED))
  139. pr_devel(" lpar err %lu\n", lpar_rc);
  140. return -2;
  141. }
  142. if (!(vflags & HPTE_V_BOLTED))
  143. pr_devel(" -> slot: %lu\n", slot & 7);
  144. /* Because of iSeries, we have to pass down the secondary
  145. * bucket bit here as well
  146. */
  147. return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);
  148. }
  149. static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock);
  150. static long pSeries_lpar_hpte_remove(unsigned long hpte_group)
  151. {
  152. unsigned long slot_offset;
  153. unsigned long lpar_rc;
  154. int i;
  155. unsigned long dummy1, dummy2;
  156. /* pick a random slot to start at */
  157. slot_offset = mftb() & 0x7;
  158. for (i = 0; i < HPTES_PER_GROUP; i++) {
  159. /* don't remove a bolted entry */
  160. lpar_rc = plpar_pte_remove(H_ANDCOND, hpte_group + slot_offset,
  161. (0x1UL << 4), &dummy1, &dummy2);
  162. if (lpar_rc == H_SUCCESS)
  163. return i;
  164. BUG_ON(lpar_rc != H_NOT_FOUND);
  165. slot_offset++;
  166. slot_offset &= 0x7;
  167. }
  168. return -1;
  169. }
  170. static void pSeries_lpar_hptab_clear(void)
  171. {
  172. unsigned long size_bytes = 1UL << ppc64_pft_size;
  173. unsigned long hpte_count = size_bytes >> 4;
  174. struct {
  175. unsigned long pteh;
  176. unsigned long ptel;
  177. } ptes[4];
  178. long lpar_rc;
  179. unsigned long i, j;
  180. /* Read in batches of 4,
  181. * invalidate only valid entries not in the VRMA
  182. * hpte_count will be a multiple of 4
  183. */
  184. for (i = 0; i < hpte_count; i += 4) {
  185. lpar_rc = plpar_pte_read_4_raw(0, i, (void *)ptes);
  186. if (lpar_rc != H_SUCCESS)
  187. continue;
  188. for (j = 0; j < 4; j++){
  189. if ((ptes[j].pteh & HPTE_V_VRMA_MASK) ==
  190. HPTE_V_VRMA_MASK)
  191. continue;
  192. if (ptes[j].pteh & HPTE_V_VALID)
  193. plpar_pte_remove_raw(0, i + j, 0,
  194. &(ptes[j].pteh), &(ptes[j].ptel));
  195. }
  196. }
  197. }
  198. /*
  199. * This computes the AVPN and B fields of the first dword of a HPTE,
  200. * for use when we want to match an existing PTE. The bottom 7 bits
  201. * of the returned value are zero.
  202. */
  203. static inline unsigned long hpte_encode_avpn(unsigned long va, int psize,
  204. int ssize)
  205. {
  206. unsigned long v;
  207. v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
  208. v <<= HPTE_V_AVPN_SHIFT;
  209. v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT;
  210. return v;
  211. }
  212. /*
  213. * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
  214. * the low 3 bits of flags happen to line up. So no transform is needed.
  215. * We can probably optimize here and assume the high bits of newpp are
  216. * already zero. For now I am paranoid.
  217. */
  218. static long pSeries_lpar_hpte_updatepp(unsigned long slot,
  219. unsigned long newpp,
  220. unsigned long va,
  221. int psize, int ssize, int local)
  222. {
  223. unsigned long lpar_rc;
  224. unsigned long flags = (newpp & 7) | H_AVPN;
  225. unsigned long want_v;
  226. want_v = hpte_encode_avpn(va, psize, ssize);
  227. pr_devel(" update: avpnv=%016lx, hash=%016lx, f=%lx, psize: %d ...",
  228. want_v, slot, flags, psize);
  229. lpar_rc = plpar_pte_protect(flags, slot, want_v);
  230. if (lpar_rc == H_NOT_FOUND) {
  231. pr_devel("not found !\n");
  232. return -1;
  233. }
  234. pr_devel("ok\n");
  235. BUG_ON(lpar_rc != H_SUCCESS);
  236. return 0;
  237. }
  238. static unsigned long pSeries_lpar_hpte_getword0(unsigned long slot)
  239. {
  240. unsigned long dword0;
  241. unsigned long lpar_rc;
  242. unsigned long dummy_word1;
  243. unsigned long flags;
  244. /* Read 1 pte at a time */
  245. /* Do not need RPN to logical page translation */
  246. /* No cross CEC PFT access */
  247. flags = 0;
  248. lpar_rc = plpar_pte_read(flags, slot, &dword0, &dummy_word1);
  249. BUG_ON(lpar_rc != H_SUCCESS);
  250. return dword0;
  251. }
  252. static long pSeries_lpar_hpte_find(unsigned long va, int psize, int ssize)
  253. {
  254. unsigned long hash;
  255. unsigned long i;
  256. long slot;
  257. unsigned long want_v, hpte_v;
  258. hash = hpt_hash(va, mmu_psize_defs[psize].shift, ssize);
  259. want_v = hpte_encode_avpn(va, psize, ssize);
  260. /* Bolted entries are always in the primary group */
  261. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  262. for (i = 0; i < HPTES_PER_GROUP; i++) {
  263. hpte_v = pSeries_lpar_hpte_getword0(slot);
  264. if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID))
  265. /* HPTE matches */
  266. return slot;
  267. ++slot;
  268. }
  269. return -1;
  270. }
  271. static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,
  272. unsigned long ea,
  273. int psize, int ssize)
  274. {
  275. unsigned long lpar_rc, slot, vsid, va, flags;
  276. vsid = get_kernel_vsid(ea, ssize);
  277. va = hpt_va(ea, vsid, ssize);
  278. slot = pSeries_lpar_hpte_find(va, psize, ssize);
  279. BUG_ON(slot == -1);
  280. flags = newpp & 7;
  281. lpar_rc = plpar_pte_protect(flags, slot, 0);
  282. BUG_ON(lpar_rc != H_SUCCESS);
  283. }
  284. static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
  285. int psize, int ssize, int local)
  286. {
  287. unsigned long want_v;
  288. unsigned long lpar_rc;
  289. unsigned long dummy1, dummy2;
  290. pr_devel(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
  291. slot, va, psize, local);
  292. want_v = hpte_encode_avpn(va, psize, ssize);
  293. lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v, &dummy1, &dummy2);
  294. if (lpar_rc == H_NOT_FOUND)
  295. return;
  296. BUG_ON(lpar_rc != H_SUCCESS);
  297. }
  298. static void pSeries_lpar_hpte_removebolted(unsigned long ea,
  299. int psize, int ssize)
  300. {
  301. unsigned long slot, vsid, va;
  302. vsid = get_kernel_vsid(ea, ssize);
  303. va = hpt_va(ea, vsid, ssize);
  304. slot = pSeries_lpar_hpte_find(va, psize, ssize);
  305. BUG_ON(slot == -1);
  306. pSeries_lpar_hpte_invalidate(slot, va, psize, ssize, 0);
  307. }
  308. /* Flag bits for H_BULK_REMOVE */
  309. #define HBR_REQUEST 0x4000000000000000UL
  310. #define HBR_RESPONSE 0x8000000000000000UL
  311. #define HBR_END 0xc000000000000000UL
  312. #define HBR_AVPN 0x0200000000000000UL
  313. #define HBR_ANDCOND 0x0100000000000000UL
  314. /*
  315. * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
  316. * lock.
  317. */
  318. static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
  319. {
  320. unsigned long i, pix, rc;
  321. unsigned long flags = 0;
  322. struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
  323. int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
  324. unsigned long param[9];
  325. unsigned long va;
  326. unsigned long hash, index, shift, hidx, slot;
  327. real_pte_t pte;
  328. int psize, ssize;
  329. if (lock_tlbie)
  330. spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
  331. psize = batch->psize;
  332. ssize = batch->ssize;
  333. pix = 0;
  334. for (i = 0; i < number; i++) {
  335. va = batch->vaddr[i];
  336. pte = batch->pte[i];
  337. pte_iterate_hashed_subpages(pte, psize, va, index, shift) {
  338. hash = hpt_hash(va, shift, ssize);
  339. hidx = __rpte_to_hidx(pte, index);
  340. if (hidx & _PTEIDX_SECONDARY)
  341. hash = ~hash;
  342. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  343. slot += hidx & _PTEIDX_GROUP_IX;
  344. if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
  345. pSeries_lpar_hpte_invalidate(slot, va, psize,
  346. ssize, local);
  347. } else {
  348. param[pix] = HBR_REQUEST | HBR_AVPN | slot;
  349. param[pix+1] = hpte_encode_avpn(va, psize,
  350. ssize);
  351. pix += 2;
  352. if (pix == 8) {
  353. rc = plpar_hcall9(H_BULK_REMOVE, param,
  354. param[0], param[1], param[2],
  355. param[3], param[4], param[5],
  356. param[6], param[7]);
  357. BUG_ON(rc != H_SUCCESS);
  358. pix = 0;
  359. }
  360. }
  361. } pte_iterate_hashed_end();
  362. }
  363. if (pix) {
  364. param[pix] = HBR_END;
  365. rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
  366. param[2], param[3], param[4], param[5],
  367. param[6], param[7]);
  368. BUG_ON(rc != H_SUCCESS);
  369. }
  370. if (lock_tlbie)
  371. spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
  372. }
  373. static int __init disable_bulk_remove(char *str)
  374. {
  375. if (strcmp(str, "off") == 0 &&
  376. firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
  377. printk(KERN_INFO "Disabling BULK_REMOVE firmware feature");
  378. powerpc_firmware_features &= ~FW_FEATURE_BULK_REMOVE;
  379. }
  380. return 1;
  381. }
  382. __setup("bulk_remove=", disable_bulk_remove);
  383. void __init hpte_init_lpar(void)
  384. {
  385. ppc_md.hpte_invalidate = pSeries_lpar_hpte_invalidate;
  386. ppc_md.hpte_updatepp = pSeries_lpar_hpte_updatepp;
  387. ppc_md.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp;
  388. ppc_md.hpte_insert = pSeries_lpar_hpte_insert;
  389. ppc_md.hpte_remove = pSeries_lpar_hpte_remove;
  390. ppc_md.hpte_removebolted = pSeries_lpar_hpte_removebolted;
  391. ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range;
  392. ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear;
  393. }
  394. #ifdef CONFIG_PPC_SMLPAR
  395. #define CMO_FREE_HINT_DEFAULT 1
  396. static int cmo_free_hint_flag = CMO_FREE_HINT_DEFAULT;
  397. static int __init cmo_free_hint(char *str)
  398. {
  399. char *parm;
  400. parm = strstrip(str);
  401. if (strcasecmp(parm, "no") == 0 || strcasecmp(parm, "off") == 0) {
  402. printk(KERN_INFO "cmo_free_hint: CMO free page hinting is not active.\n");
  403. cmo_free_hint_flag = 0;
  404. return 1;
  405. }
  406. cmo_free_hint_flag = 1;
  407. printk(KERN_INFO "cmo_free_hint: CMO free page hinting is active.\n");
  408. if (strcasecmp(parm, "yes") == 0 || strcasecmp(parm, "on") == 0)
  409. return 1;
  410. return 0;
  411. }
  412. __setup("cmo_free_hint=", cmo_free_hint);
  413. static void pSeries_set_page_state(struct page *page, int order,
  414. unsigned long state)
  415. {
  416. int i, j;
  417. unsigned long cmo_page_sz, addr;
  418. cmo_page_sz = cmo_get_page_size();
  419. addr = __pa((unsigned long)page_address(page));
  420. for (i = 0; i < (1 << order); i++, addr += PAGE_SIZE) {
  421. for (j = 0; j < PAGE_SIZE; j += cmo_page_sz)
  422. plpar_hcall_norets(H_PAGE_INIT, state, addr + j, 0);
  423. }
  424. }
  425. void arch_free_page(struct page *page, int order)
  426. {
  427. if (!cmo_free_hint_flag || !firmware_has_feature(FW_FEATURE_CMO))
  428. return;
  429. pSeries_set_page_state(page, order, H_PAGE_SET_UNUSED);
  430. }
  431. EXPORT_SYMBOL(arch_free_page);
  432. #endif
  433. #ifdef CONFIG_TRACEPOINTS
  434. /*
  435. * We optimise our hcall path by placing hcall_tracepoint_refcount
  436. * directly in the TOC so we can check if the hcall tracepoints are
  437. * enabled via a single load.
  438. */
  439. /* NB: reg/unreg are called while guarded with the tracepoints_mutex */
  440. extern long hcall_tracepoint_refcount;
  441. /*
  442. * Since the tracing code might execute hcalls we need to guard against
  443. * recursion. One example of this are spinlocks calling H_YIELD on
  444. * shared processor partitions.
  445. */
  446. static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
  447. void hcall_tracepoint_regfunc(void)
  448. {
  449. hcall_tracepoint_refcount++;
  450. }
  451. void hcall_tracepoint_unregfunc(void)
  452. {
  453. hcall_tracepoint_refcount--;
  454. }
  455. void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
  456. {
  457. unsigned long flags;
  458. unsigned int *depth;
  459. /*
  460. * We cannot call tracepoints inside RCU idle regions which
  461. * means we must not trace H_CEDE.
  462. */
  463. if (opcode == H_CEDE)
  464. return;
  465. local_irq_save(flags);
  466. depth = &__get_cpu_var(hcall_trace_depth);
  467. if (*depth)
  468. goto out;
  469. (*depth)++;
  470. preempt_disable();
  471. trace_hcall_entry(opcode, args);
  472. (*depth)--;
  473. out:
  474. local_irq_restore(flags);
  475. }
  476. void __trace_hcall_exit(long opcode, unsigned long retval,
  477. unsigned long *retbuf)
  478. {
  479. unsigned long flags;
  480. unsigned int *depth;
  481. if (opcode == H_CEDE)
  482. return;
  483. local_irq_save(flags);
  484. depth = &__get_cpu_var(hcall_trace_depth);
  485. if (*depth)
  486. goto out;
  487. (*depth)++;
  488. trace_hcall_exit(opcode, retval, retbuf);
  489. preempt_enable();
  490. (*depth)--;
  491. out:
  492. local_irq_restore(flags);
  493. }
  494. #endif
  495. /**
  496. * h_get_mpp
  497. * H_GET_MPP hcall returns info in 7 parms
  498. */
  499. int h_get_mpp(struct hvcall_mpp_data *mpp_data)
  500. {
  501. int rc;
  502. unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
  503. rc = plpar_hcall9(H_GET_MPP, retbuf);
  504. mpp_data->entitled_mem = retbuf[0];
  505. mpp_data->mapped_mem = retbuf[1];
  506. mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff;
  507. mpp_data->pool_num = retbuf[2] & 0xffff;
  508. mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
  509. mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
  510. mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffff;
  511. mpp_data->pool_size = retbuf[4];
  512. mpp_data->loan_request = retbuf[5];
  513. mpp_data->backing_mem = retbuf[6];
  514. return rc;
  515. }
  516. EXPORT_SYMBOL(h_get_mpp);
  517. int h_get_mpp_x(struct hvcall_mpp_x_data *mpp_x_data)
  518. {
  519. int rc;
  520. unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = { 0 };
  521. rc = plpar_hcall9(H_GET_MPP_X, retbuf);
  522. mpp_x_data->coalesced_bytes = retbuf[0];
  523. mpp_x_data->pool_coalesced_bytes = retbuf[1];
  524. mpp_x_data->pool_purr_cycles = retbuf[2];
  525. mpp_x_data->pool_spurr_cycles = retbuf[3];
  526. return rc;
  527. }