sysfs.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667
  1. #include <linux/device.h>
  2. #include <linux/cpu.h>
  3. #include <linux/smp.h>
  4. #include <linux/percpu.h>
  5. #include <linux/init.h>
  6. #include <linux/sched.h>
  7. #include <linux/export.h>
  8. #include <linux/nodemask.h>
  9. #include <linux/cpumask.h>
  10. #include <linux/notifier.h>
  11. #include <asm/current.h>
  12. #include <asm/processor.h>
  13. #include <asm/cputable.h>
  14. #include <asm/hvcall.h>
  15. #include <asm/prom.h>
  16. #include <asm/machdep.h>
  17. #include <asm/smp.h>
  18. #include <asm/pmc.h>
  19. #include <asm/system.h>
  20. #include "cacheinfo.h"
  21. #ifdef CONFIG_PPC64
  22. #include <asm/paca.h>
  23. #include <asm/lppaca.h>
  24. #endif
  25. static DEFINE_PER_CPU(struct cpu, cpu_devices);
  26. /*
  27. * SMT snooze delay stuff, 64-bit only for now
  28. */
  29. #ifdef CONFIG_PPC64
  30. /* Time in microseconds we delay before sleeping in the idle loop */
  31. DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
  32. static ssize_t store_smt_snooze_delay(struct device *dev,
  33. struct device_attribute *attr,
  34. const char *buf,
  35. size_t count)
  36. {
  37. struct cpu *cpu = container_of(dev, struct cpu, dev);
  38. ssize_t ret;
  39. long snooze;
  40. ret = sscanf(buf, "%ld", &snooze);
  41. if (ret != 1)
  42. return -EINVAL;
  43. per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
  44. update_smt_snooze_delay(snooze);
  45. return count;
  46. }
  47. static ssize_t show_smt_snooze_delay(struct device *dev,
  48. struct device_attribute *attr,
  49. char *buf)
  50. {
  51. struct cpu *cpu = container_of(dev, struct cpu, dev);
  52. return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
  53. }
  54. static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
  55. store_smt_snooze_delay);
  56. static int __init setup_smt_snooze_delay(char *str)
  57. {
  58. unsigned int cpu;
  59. long snooze;
  60. if (!cpu_has_feature(CPU_FTR_SMT))
  61. return 1;
  62. snooze = simple_strtol(str, NULL, 10);
  63. for_each_possible_cpu(cpu)
  64. per_cpu(smt_snooze_delay, cpu) = snooze;
  65. return 1;
  66. }
  67. __setup("smt-snooze-delay=", setup_smt_snooze_delay);
  68. #endif /* CONFIG_PPC64 */
  69. /*
  70. * Enabling PMCs will slow partition context switch times so we only do
  71. * it the first time we write to the PMCs.
  72. */
  73. static DEFINE_PER_CPU(char, pmcs_enabled);
  74. void ppc_enable_pmcs(void)
  75. {
  76. ppc_set_pmu_inuse(1);
  77. /* Only need to enable them once */
  78. if (__get_cpu_var(pmcs_enabled))
  79. return;
  80. __get_cpu_var(pmcs_enabled) = 1;
  81. if (ppc_md.enable_pmcs)
  82. ppc_md.enable_pmcs();
  83. }
  84. EXPORT_SYMBOL(ppc_enable_pmcs);
  85. #define SYSFS_PMCSETUP(NAME, ADDRESS) \
  86. static void read_##NAME(void *val) \
  87. { \
  88. *(unsigned long *)val = mfspr(ADDRESS); \
  89. } \
  90. static void write_##NAME(void *val) \
  91. { \
  92. ppc_enable_pmcs(); \
  93. mtspr(ADDRESS, *(unsigned long *)val); \
  94. } \
  95. static ssize_t show_##NAME(struct device *dev, \
  96. struct device_attribute *attr, \
  97. char *buf) \
  98. { \
  99. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  100. unsigned long val; \
  101. smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
  102. return sprintf(buf, "%lx\n", val); \
  103. } \
  104. static ssize_t __used \
  105. store_##NAME(struct device *dev, struct device_attribute *attr, \
  106. const char *buf, size_t count) \
  107. { \
  108. struct cpu *cpu = container_of(dev, struct cpu, dev); \
  109. unsigned long val; \
  110. int ret = sscanf(buf, "%lx", &val); \
  111. if (ret != 1) \
  112. return -EINVAL; \
  113. smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
  114. return count; \
  115. }
  116. /* Let's define all possible registers, we'll only hook up the ones
  117. * that are implemented on the current processor
  118. */
  119. #if defined(CONFIG_PPC64)
  120. #define HAS_PPC_PMC_CLASSIC 1
  121. #define HAS_PPC_PMC_IBM 1
  122. #define HAS_PPC_PMC_PA6T 1
  123. #elif defined(CONFIG_6xx)
  124. #define HAS_PPC_PMC_CLASSIC 1
  125. #define HAS_PPC_PMC_IBM 1
  126. #define HAS_PPC_PMC_G4 1
  127. #endif
  128. #ifdef HAS_PPC_PMC_CLASSIC
  129. SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
  130. SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
  131. SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
  132. SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
  133. SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
  134. SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
  135. SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
  136. SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
  137. #ifdef HAS_PPC_PMC_G4
  138. SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
  139. #endif
  140. #ifdef CONFIG_PPC64
  141. SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
  142. SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
  143. SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
  144. SYSFS_PMCSETUP(purr, SPRN_PURR);
  145. SYSFS_PMCSETUP(spurr, SPRN_SPURR);
  146. SYSFS_PMCSETUP(dscr, SPRN_DSCR);
  147. SYSFS_PMCSETUP(pir, SPRN_PIR);
  148. static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
  149. static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
  150. static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
  151. static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
  152. static DEVICE_ATTR(pir, 0400, show_pir, NULL);
  153. unsigned long dscr_default = 0;
  154. EXPORT_SYMBOL(dscr_default);
  155. static ssize_t show_dscr_default(struct device *dev,
  156. struct device_attribute *attr, char *buf)
  157. {
  158. return sprintf(buf, "%lx\n", dscr_default);
  159. }
  160. static ssize_t __used store_dscr_default(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. unsigned long val;
  165. int ret = 0;
  166. ret = sscanf(buf, "%lx", &val);
  167. if (ret != 1)
  168. return -EINVAL;
  169. dscr_default = val;
  170. return count;
  171. }
  172. static DEVICE_ATTR(dscr_default, 0600,
  173. show_dscr_default, store_dscr_default);
  174. static void sysfs_create_dscr_default(void)
  175. {
  176. int err = 0;
  177. if (cpu_has_feature(CPU_FTR_DSCR))
  178. err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
  179. }
  180. #endif /* CONFIG_PPC64 */
  181. #ifdef HAS_PPC_PMC_PA6T
  182. SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
  183. SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
  184. SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
  185. SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
  186. SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
  187. SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
  188. #ifdef CONFIG_DEBUG_KERNEL
  189. SYSFS_PMCSETUP(hid0, SPRN_HID0);
  190. SYSFS_PMCSETUP(hid1, SPRN_HID1);
  191. SYSFS_PMCSETUP(hid4, SPRN_HID4);
  192. SYSFS_PMCSETUP(hid5, SPRN_HID5);
  193. SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
  194. SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
  195. SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
  196. SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
  197. SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
  198. SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
  199. SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
  200. SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
  201. SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
  202. SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
  203. SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
  204. SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
  205. SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
  206. SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
  207. SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
  208. SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
  209. SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
  210. SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
  211. SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
  212. SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
  213. SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
  214. SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
  215. SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
  216. SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
  217. #endif /* CONFIG_DEBUG_KERNEL */
  218. #endif /* HAS_PPC_PMC_PA6T */
  219. #ifdef HAS_PPC_PMC_IBM
  220. static struct device_attribute ibm_common_attrs[] = {
  221. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  222. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  223. };
  224. #endif /* HAS_PPC_PMC_G4 */
  225. #ifdef HAS_PPC_PMC_G4
  226. static struct device_attribute g4_common_attrs[] = {
  227. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  228. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  229. __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
  230. };
  231. #endif /* HAS_PPC_PMC_G4 */
  232. static struct device_attribute classic_pmc_attrs[] = {
  233. __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
  234. __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
  235. __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
  236. __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
  237. __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
  238. __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
  239. #ifdef CONFIG_PPC64
  240. __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
  241. __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
  242. #endif
  243. };
  244. #ifdef HAS_PPC_PMC_PA6T
  245. static struct device_attribute pa6t_attrs[] = {
  246. __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
  247. __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
  248. __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
  249. __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
  250. __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
  251. __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
  252. __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
  253. __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
  254. #ifdef CONFIG_DEBUG_KERNEL
  255. __ATTR(hid0, 0600, show_hid0, store_hid0),
  256. __ATTR(hid1, 0600, show_hid1, store_hid1),
  257. __ATTR(hid4, 0600, show_hid4, store_hid4),
  258. __ATTR(hid5, 0600, show_hid5, store_hid5),
  259. __ATTR(ima0, 0600, show_ima0, store_ima0),
  260. __ATTR(ima1, 0600, show_ima1, store_ima1),
  261. __ATTR(ima2, 0600, show_ima2, store_ima2),
  262. __ATTR(ima3, 0600, show_ima3, store_ima3),
  263. __ATTR(ima4, 0600, show_ima4, store_ima4),
  264. __ATTR(ima5, 0600, show_ima5, store_ima5),
  265. __ATTR(ima6, 0600, show_ima6, store_ima6),
  266. __ATTR(ima7, 0600, show_ima7, store_ima7),
  267. __ATTR(ima8, 0600, show_ima8, store_ima8),
  268. __ATTR(ima9, 0600, show_ima9, store_ima9),
  269. __ATTR(imaat, 0600, show_imaat, store_imaat),
  270. __ATTR(btcr, 0600, show_btcr, store_btcr),
  271. __ATTR(pccr, 0600, show_pccr, store_pccr),
  272. __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
  273. __ATTR(der, 0600, show_der, store_der),
  274. __ATTR(mer, 0600, show_mer, store_mer),
  275. __ATTR(ber, 0600, show_ber, store_ber),
  276. __ATTR(ier, 0600, show_ier, store_ier),
  277. __ATTR(sier, 0600, show_sier, store_sier),
  278. __ATTR(siar, 0600, show_siar, store_siar),
  279. __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
  280. __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
  281. __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
  282. __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
  283. #endif /* CONFIG_DEBUG_KERNEL */
  284. };
  285. #endif /* HAS_PPC_PMC_PA6T */
  286. #endif /* HAS_PPC_PMC_CLASSIC */
  287. static void __cpuinit register_cpu_online(unsigned int cpu)
  288. {
  289. struct cpu *c = &per_cpu(cpu_devices, cpu);
  290. struct device *s = &c->dev;
  291. struct device_attribute *attrs, *pmc_attrs;
  292. int i, nattrs;
  293. #ifdef CONFIG_PPC64
  294. if (cpu_has_feature(CPU_FTR_SMT))
  295. device_create_file(s, &dev_attr_smt_snooze_delay);
  296. #endif
  297. /* PMC stuff */
  298. switch (cur_cpu_spec->pmc_type) {
  299. #ifdef HAS_PPC_PMC_IBM
  300. case PPC_PMC_IBM:
  301. attrs = ibm_common_attrs;
  302. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  303. pmc_attrs = classic_pmc_attrs;
  304. break;
  305. #endif /* HAS_PPC_PMC_IBM */
  306. #ifdef HAS_PPC_PMC_G4
  307. case PPC_PMC_G4:
  308. attrs = g4_common_attrs;
  309. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  310. pmc_attrs = classic_pmc_attrs;
  311. break;
  312. #endif /* HAS_PPC_PMC_G4 */
  313. #ifdef HAS_PPC_PMC_PA6T
  314. case PPC_PMC_PA6T:
  315. /* PA Semi starts counting at PMC0 */
  316. attrs = pa6t_attrs;
  317. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  318. pmc_attrs = NULL;
  319. break;
  320. #endif /* HAS_PPC_PMC_PA6T */
  321. default:
  322. attrs = NULL;
  323. nattrs = 0;
  324. pmc_attrs = NULL;
  325. }
  326. for (i = 0; i < nattrs; i++)
  327. device_create_file(s, &attrs[i]);
  328. if (pmc_attrs)
  329. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  330. device_create_file(s, &pmc_attrs[i]);
  331. #ifdef CONFIG_PPC64
  332. if (cpu_has_feature(CPU_FTR_MMCRA))
  333. device_create_file(s, &dev_attr_mmcra);
  334. if (cpu_has_feature(CPU_FTR_PURR))
  335. device_create_file(s, &dev_attr_purr);
  336. if (cpu_has_feature(CPU_FTR_SPURR))
  337. device_create_file(s, &dev_attr_spurr);
  338. if (cpu_has_feature(CPU_FTR_DSCR))
  339. device_create_file(s, &dev_attr_dscr);
  340. if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
  341. device_create_file(s, &dev_attr_pir);
  342. #endif /* CONFIG_PPC64 */
  343. cacheinfo_cpu_online(cpu);
  344. }
  345. #ifdef CONFIG_HOTPLUG_CPU
  346. static void unregister_cpu_online(unsigned int cpu)
  347. {
  348. struct cpu *c = &per_cpu(cpu_devices, cpu);
  349. struct device *s = &c->dev;
  350. struct device_attribute *attrs, *pmc_attrs;
  351. int i, nattrs;
  352. BUG_ON(!c->hotpluggable);
  353. #ifdef CONFIG_PPC64
  354. if (cpu_has_feature(CPU_FTR_SMT))
  355. device_remove_file(s, &dev_attr_smt_snooze_delay);
  356. #endif
  357. /* PMC stuff */
  358. switch (cur_cpu_spec->pmc_type) {
  359. #ifdef HAS_PPC_PMC_IBM
  360. case PPC_PMC_IBM:
  361. attrs = ibm_common_attrs;
  362. nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
  363. pmc_attrs = classic_pmc_attrs;
  364. break;
  365. #endif /* HAS_PPC_PMC_IBM */
  366. #ifdef HAS_PPC_PMC_G4
  367. case PPC_PMC_G4:
  368. attrs = g4_common_attrs;
  369. nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
  370. pmc_attrs = classic_pmc_attrs;
  371. break;
  372. #endif /* HAS_PPC_PMC_G4 */
  373. #ifdef HAS_PPC_PMC_PA6T
  374. case PPC_PMC_PA6T:
  375. /* PA Semi starts counting at PMC0 */
  376. attrs = pa6t_attrs;
  377. nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
  378. pmc_attrs = NULL;
  379. break;
  380. #endif /* HAS_PPC_PMC_PA6T */
  381. default:
  382. attrs = NULL;
  383. nattrs = 0;
  384. pmc_attrs = NULL;
  385. }
  386. for (i = 0; i < nattrs; i++)
  387. device_remove_file(s, &attrs[i]);
  388. if (pmc_attrs)
  389. for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
  390. device_remove_file(s, &pmc_attrs[i]);
  391. #ifdef CONFIG_PPC64
  392. if (cpu_has_feature(CPU_FTR_MMCRA))
  393. device_remove_file(s, &dev_attr_mmcra);
  394. if (cpu_has_feature(CPU_FTR_PURR))
  395. device_remove_file(s, &dev_attr_purr);
  396. if (cpu_has_feature(CPU_FTR_SPURR))
  397. device_remove_file(s, &dev_attr_spurr);
  398. if (cpu_has_feature(CPU_FTR_DSCR))
  399. device_remove_file(s, &dev_attr_dscr);
  400. if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
  401. device_remove_file(s, &dev_attr_pir);
  402. #endif /* CONFIG_PPC64 */
  403. cacheinfo_cpu_offline(cpu);
  404. }
  405. #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
  406. ssize_t arch_cpu_probe(const char *buf, size_t count)
  407. {
  408. if (ppc_md.cpu_probe)
  409. return ppc_md.cpu_probe(buf, count);
  410. return -EINVAL;
  411. }
  412. ssize_t arch_cpu_release(const char *buf, size_t count)
  413. {
  414. if (ppc_md.cpu_release)
  415. return ppc_md.cpu_release(buf, count);
  416. return -EINVAL;
  417. }
  418. #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
  419. #endif /* CONFIG_HOTPLUG_CPU */
  420. static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
  421. unsigned long action, void *hcpu)
  422. {
  423. unsigned int cpu = (unsigned int)(long)hcpu;
  424. switch (action) {
  425. case CPU_ONLINE:
  426. case CPU_ONLINE_FROZEN:
  427. register_cpu_online(cpu);
  428. break;
  429. #ifdef CONFIG_HOTPLUG_CPU
  430. case CPU_DEAD:
  431. case CPU_DEAD_FROZEN:
  432. unregister_cpu_online(cpu);
  433. break;
  434. #endif
  435. }
  436. return NOTIFY_OK;
  437. }
  438. static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
  439. .notifier_call = sysfs_cpu_notify,
  440. };
  441. static DEFINE_MUTEX(cpu_mutex);
  442. int cpu_add_dev_attr(struct device_attribute *attr)
  443. {
  444. int cpu;
  445. mutex_lock(&cpu_mutex);
  446. for_each_possible_cpu(cpu) {
  447. device_create_file(get_cpu_device(cpu), attr);
  448. }
  449. mutex_unlock(&cpu_mutex);
  450. return 0;
  451. }
  452. EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
  453. int cpu_add_dev_attr_group(struct attribute_group *attrs)
  454. {
  455. int cpu;
  456. struct device *dev;
  457. int ret;
  458. mutex_lock(&cpu_mutex);
  459. for_each_possible_cpu(cpu) {
  460. dev = get_cpu_device(cpu);
  461. ret = sysfs_create_group(&dev->kobj, attrs);
  462. WARN_ON(ret != 0);
  463. }
  464. mutex_unlock(&cpu_mutex);
  465. return 0;
  466. }
  467. EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
  468. void cpu_remove_dev_attr(struct device_attribute *attr)
  469. {
  470. int cpu;
  471. mutex_lock(&cpu_mutex);
  472. for_each_possible_cpu(cpu) {
  473. device_remove_file(get_cpu_device(cpu), attr);
  474. }
  475. mutex_unlock(&cpu_mutex);
  476. }
  477. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
  478. void cpu_remove_dev_attr_group(struct attribute_group *attrs)
  479. {
  480. int cpu;
  481. struct device *dev;
  482. mutex_lock(&cpu_mutex);
  483. for_each_possible_cpu(cpu) {
  484. dev = get_cpu_device(cpu);
  485. sysfs_remove_group(&dev->kobj, attrs);
  486. }
  487. mutex_unlock(&cpu_mutex);
  488. }
  489. EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
  490. /* NUMA stuff */
  491. #ifdef CONFIG_NUMA
  492. static void register_nodes(void)
  493. {
  494. int i;
  495. for (i = 0; i < MAX_NUMNODES; i++)
  496. register_one_node(i);
  497. }
  498. int sysfs_add_device_to_node(struct device *dev, int nid)
  499. {
  500. struct node *node = &node_devices[nid];
  501. return sysfs_create_link(&node->dev.kobj, &dev->kobj,
  502. kobject_name(&dev->kobj));
  503. }
  504. EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
  505. void sysfs_remove_device_from_node(struct device *dev, int nid)
  506. {
  507. struct node *node = &node_devices[nid];
  508. sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
  509. }
  510. EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
  511. #else
  512. static void register_nodes(void)
  513. {
  514. return;
  515. }
  516. #endif
  517. /* Only valid if CPU is present. */
  518. static ssize_t show_physical_id(struct device *dev,
  519. struct device_attribute *attr, char *buf)
  520. {
  521. struct cpu *cpu = container_of(dev, struct cpu, dev);
  522. return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
  523. }
  524. static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
  525. static int __init topology_init(void)
  526. {
  527. int cpu;
  528. register_nodes();
  529. register_cpu_notifier(&sysfs_cpu_nb);
  530. for_each_possible_cpu(cpu) {
  531. struct cpu *c = &per_cpu(cpu_devices, cpu);
  532. /*
  533. * For now, we just see if the system supports making
  534. * the RTAS calls for CPU hotplug. But, there may be a
  535. * more comprehensive way to do this for an individual
  536. * CPU. For instance, the boot cpu might never be valid
  537. * for hotplugging.
  538. */
  539. if (ppc_md.cpu_die)
  540. c->hotpluggable = 1;
  541. if (cpu_online(cpu) || c->hotpluggable) {
  542. register_cpu(c, cpu);
  543. device_create_file(&c->dev, &dev_attr_physical_id);
  544. }
  545. if (cpu_online(cpu))
  546. register_cpu_online(cpu);
  547. }
  548. #ifdef CONFIG_PPC64
  549. sysfs_create_dscr_default();
  550. #endif /* CONFIG_PPC64 */
  551. return 0;
  552. }
  553. subsys_initcall(topology_init);