process.c 33 KB

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  1. /*
  2. * Derived from "arch/i386/kernel/process.c"
  3. * Copyright (C) 1995 Linus Torvalds
  4. *
  5. * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
  6. * Paul Mackerras (paulus@cs.anu.edu.au)
  7. *
  8. * PowerPC version
  9. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/sched.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/smp.h>
  21. #include <linux/stddef.h>
  22. #include <linux/unistd.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/elf.h>
  27. #include <linux/init.h>
  28. #include <linux/prctl.h>
  29. #include <linux/init_task.h>
  30. #include <linux/export.h>
  31. #include <linux/kallsyms.h>
  32. #include <linux/mqueue.h>
  33. #include <linux/hardirq.h>
  34. #include <linux/utsname.h>
  35. #include <linux/ftrace.h>
  36. #include <linux/kernel_stat.h>
  37. #include <linux/personality.h>
  38. #include <linux/random.h>
  39. #include <linux/hw_breakpoint.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/uaccess.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <asm/processor.h>
  45. #include <asm/mmu.h>
  46. #include <asm/prom.h>
  47. #include <asm/machdep.h>
  48. #include <asm/time.h>
  49. #include <asm/syscalls.h>
  50. #ifdef CONFIG_PPC64
  51. #include <asm/firmware.h>
  52. #endif
  53. #include <linux/kprobes.h>
  54. #include <linux/kdebug.h>
  55. extern unsigned long _get_SP(void);
  56. #ifndef CONFIG_SMP
  57. struct task_struct *last_task_used_math = NULL;
  58. struct task_struct *last_task_used_altivec = NULL;
  59. struct task_struct *last_task_used_vsx = NULL;
  60. struct task_struct *last_task_used_spe = NULL;
  61. #endif
  62. /*
  63. * Make sure the floating-point register state in the
  64. * the thread_struct is up to date for task tsk.
  65. */
  66. void flush_fp_to_thread(struct task_struct *tsk)
  67. {
  68. if (tsk->thread.regs) {
  69. /*
  70. * We need to disable preemption here because if we didn't,
  71. * another process could get scheduled after the regs->msr
  72. * test but before we have finished saving the FP registers
  73. * to the thread_struct. That process could take over the
  74. * FPU, and then when we get scheduled again we would store
  75. * bogus values for the remaining FP registers.
  76. */
  77. preempt_disable();
  78. if (tsk->thread.regs->msr & MSR_FP) {
  79. #ifdef CONFIG_SMP
  80. /*
  81. * This should only ever be called for current or
  82. * for a stopped child process. Since we save away
  83. * the FP register state on context switch on SMP,
  84. * there is something wrong if a stopped child appears
  85. * to still have its FP state in the CPU registers.
  86. */
  87. BUG_ON(tsk != current);
  88. #endif
  89. giveup_fpu(tsk);
  90. }
  91. preempt_enable();
  92. }
  93. }
  94. EXPORT_SYMBOL_GPL(flush_fp_to_thread);
  95. void enable_kernel_fp(void)
  96. {
  97. WARN_ON(preemptible());
  98. #ifdef CONFIG_SMP
  99. if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
  100. giveup_fpu(current);
  101. else
  102. giveup_fpu(NULL); /* just enables FP for kernel */
  103. #else
  104. giveup_fpu(last_task_used_math);
  105. #endif /* CONFIG_SMP */
  106. }
  107. EXPORT_SYMBOL(enable_kernel_fp);
  108. #ifdef CONFIG_ALTIVEC
  109. void enable_kernel_altivec(void)
  110. {
  111. WARN_ON(preemptible());
  112. #ifdef CONFIG_SMP
  113. if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
  114. giveup_altivec(current);
  115. else
  116. giveup_altivec(NULL); /* just enable AltiVec for kernel - force */
  117. #else
  118. giveup_altivec(last_task_used_altivec);
  119. #endif /* CONFIG_SMP */
  120. }
  121. EXPORT_SYMBOL(enable_kernel_altivec);
  122. /*
  123. * Make sure the VMX/Altivec register state in the
  124. * the thread_struct is up to date for task tsk.
  125. */
  126. void flush_altivec_to_thread(struct task_struct *tsk)
  127. {
  128. if (tsk->thread.regs) {
  129. preempt_disable();
  130. if (tsk->thread.regs->msr & MSR_VEC) {
  131. #ifdef CONFIG_SMP
  132. BUG_ON(tsk != current);
  133. #endif
  134. giveup_altivec(tsk);
  135. }
  136. preempt_enable();
  137. }
  138. }
  139. EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
  140. #endif /* CONFIG_ALTIVEC */
  141. #ifdef CONFIG_VSX
  142. #if 0
  143. /* not currently used, but some crazy RAID module might want to later */
  144. void enable_kernel_vsx(void)
  145. {
  146. WARN_ON(preemptible());
  147. #ifdef CONFIG_SMP
  148. if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
  149. giveup_vsx(current);
  150. else
  151. giveup_vsx(NULL); /* just enable vsx for kernel - force */
  152. #else
  153. giveup_vsx(last_task_used_vsx);
  154. #endif /* CONFIG_SMP */
  155. }
  156. EXPORT_SYMBOL(enable_kernel_vsx);
  157. #endif
  158. void giveup_vsx(struct task_struct *tsk)
  159. {
  160. giveup_fpu(tsk);
  161. giveup_altivec(tsk);
  162. __giveup_vsx(tsk);
  163. }
  164. void flush_vsx_to_thread(struct task_struct *tsk)
  165. {
  166. if (tsk->thread.regs) {
  167. preempt_disable();
  168. if (tsk->thread.regs->msr & MSR_VSX) {
  169. #ifdef CONFIG_SMP
  170. BUG_ON(tsk != current);
  171. #endif
  172. giveup_vsx(tsk);
  173. }
  174. preempt_enable();
  175. }
  176. }
  177. EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
  178. #endif /* CONFIG_VSX */
  179. #ifdef CONFIG_SPE
  180. void enable_kernel_spe(void)
  181. {
  182. WARN_ON(preemptible());
  183. #ifdef CONFIG_SMP
  184. if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
  185. giveup_spe(current);
  186. else
  187. giveup_spe(NULL); /* just enable SPE for kernel - force */
  188. #else
  189. giveup_spe(last_task_used_spe);
  190. #endif /* __SMP __ */
  191. }
  192. EXPORT_SYMBOL(enable_kernel_spe);
  193. void flush_spe_to_thread(struct task_struct *tsk)
  194. {
  195. if (tsk->thread.regs) {
  196. preempt_disable();
  197. if (tsk->thread.regs->msr & MSR_SPE) {
  198. #ifdef CONFIG_SMP
  199. BUG_ON(tsk != current);
  200. #endif
  201. tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
  202. giveup_spe(tsk);
  203. }
  204. preempt_enable();
  205. }
  206. }
  207. #endif /* CONFIG_SPE */
  208. #ifndef CONFIG_SMP
  209. /*
  210. * If we are doing lazy switching of CPU state (FP, altivec or SPE),
  211. * and the current task has some state, discard it.
  212. */
  213. void discard_lazy_cpu_state(void)
  214. {
  215. preempt_disable();
  216. if (last_task_used_math == current)
  217. last_task_used_math = NULL;
  218. #ifdef CONFIG_ALTIVEC
  219. if (last_task_used_altivec == current)
  220. last_task_used_altivec = NULL;
  221. #endif /* CONFIG_ALTIVEC */
  222. #ifdef CONFIG_VSX
  223. if (last_task_used_vsx == current)
  224. last_task_used_vsx = NULL;
  225. #endif /* CONFIG_VSX */
  226. #ifdef CONFIG_SPE
  227. if (last_task_used_spe == current)
  228. last_task_used_spe = NULL;
  229. #endif
  230. preempt_enable();
  231. }
  232. #endif /* CONFIG_SMP */
  233. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  234. void do_send_trap(struct pt_regs *regs, unsigned long address,
  235. unsigned long error_code, int signal_code, int breakpt)
  236. {
  237. siginfo_t info;
  238. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  239. 11, SIGSEGV) == NOTIFY_STOP)
  240. return;
  241. /* Deliver the signal to userspace */
  242. info.si_signo = SIGTRAP;
  243. info.si_errno = breakpt; /* breakpoint or watchpoint id */
  244. info.si_code = signal_code;
  245. info.si_addr = (void __user *)address;
  246. force_sig_info(SIGTRAP, &info, current);
  247. }
  248. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  249. void do_dabr(struct pt_regs *regs, unsigned long address,
  250. unsigned long error_code)
  251. {
  252. siginfo_t info;
  253. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  254. 11, SIGSEGV) == NOTIFY_STOP)
  255. return;
  256. if (debugger_dabr_match(regs))
  257. return;
  258. /* Clear the DABR */
  259. set_dabr(0);
  260. /* Deliver the signal to userspace */
  261. info.si_signo = SIGTRAP;
  262. info.si_errno = 0;
  263. info.si_code = TRAP_HWBKPT;
  264. info.si_addr = (void __user *)address;
  265. force_sig_info(SIGTRAP, &info, current);
  266. }
  267. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  268. static DEFINE_PER_CPU(unsigned long, current_dabr);
  269. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  270. /*
  271. * Set the debug registers back to their default "safe" values.
  272. */
  273. static void set_debug_reg_defaults(struct thread_struct *thread)
  274. {
  275. thread->iac1 = thread->iac2 = 0;
  276. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  277. thread->iac3 = thread->iac4 = 0;
  278. #endif
  279. thread->dac1 = thread->dac2 = 0;
  280. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  281. thread->dvc1 = thread->dvc2 = 0;
  282. #endif
  283. thread->dbcr0 = 0;
  284. #ifdef CONFIG_BOOKE
  285. /*
  286. * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
  287. */
  288. thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
  289. DBCR1_IAC3US | DBCR1_IAC4US;
  290. /*
  291. * Force Data Address Compare User/Supervisor bits to be User-only
  292. * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
  293. */
  294. thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
  295. #else
  296. thread->dbcr1 = 0;
  297. #endif
  298. }
  299. static void prime_debug_regs(struct thread_struct *thread)
  300. {
  301. mtspr(SPRN_IAC1, thread->iac1);
  302. mtspr(SPRN_IAC2, thread->iac2);
  303. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  304. mtspr(SPRN_IAC3, thread->iac3);
  305. mtspr(SPRN_IAC4, thread->iac4);
  306. #endif
  307. mtspr(SPRN_DAC1, thread->dac1);
  308. mtspr(SPRN_DAC2, thread->dac2);
  309. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  310. mtspr(SPRN_DVC1, thread->dvc1);
  311. mtspr(SPRN_DVC2, thread->dvc2);
  312. #endif
  313. mtspr(SPRN_DBCR0, thread->dbcr0);
  314. mtspr(SPRN_DBCR1, thread->dbcr1);
  315. #ifdef CONFIG_BOOKE
  316. mtspr(SPRN_DBCR2, thread->dbcr2);
  317. #endif
  318. }
  319. /*
  320. * Unless neither the old or new thread are making use of the
  321. * debug registers, set the debug registers from the values
  322. * stored in the new thread.
  323. */
  324. static void switch_booke_debug_regs(struct thread_struct *new_thread)
  325. {
  326. if ((current->thread.dbcr0 & DBCR0_IDM)
  327. || (new_thread->dbcr0 & DBCR0_IDM))
  328. prime_debug_regs(new_thread);
  329. }
  330. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  331. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  332. static void set_debug_reg_defaults(struct thread_struct *thread)
  333. {
  334. if (thread->dabr) {
  335. thread->dabr = 0;
  336. set_dabr(0);
  337. }
  338. }
  339. #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
  340. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  341. int set_dabr(unsigned long dabr)
  342. {
  343. __get_cpu_var(current_dabr) = dabr;
  344. if (ppc_md.set_dabr)
  345. return ppc_md.set_dabr(dabr);
  346. /* XXX should we have a CPU_FTR_HAS_DABR ? */
  347. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  348. mtspr(SPRN_DAC1, dabr);
  349. #ifdef CONFIG_PPC_47x
  350. isync();
  351. #endif
  352. #elif defined(CONFIG_PPC_BOOK3S)
  353. mtspr(SPRN_DABR, dabr);
  354. #endif
  355. return 0;
  356. }
  357. #ifdef CONFIG_PPC64
  358. DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
  359. #endif
  360. struct task_struct *__switch_to(struct task_struct *prev,
  361. struct task_struct *new)
  362. {
  363. struct thread_struct *new_thread, *old_thread;
  364. unsigned long flags;
  365. struct task_struct *last;
  366. #ifdef CONFIG_PPC_BOOK3S_64
  367. struct ppc64_tlb_batch *batch;
  368. #endif
  369. #ifdef CONFIG_SMP
  370. /* avoid complexity of lazy save/restore of fpu
  371. * by just saving it every time we switch out if
  372. * this task used the fpu during the last quantum.
  373. *
  374. * If it tries to use the fpu again, it'll trap and
  375. * reload its fp regs. So we don't have to do a restore
  376. * every switch, just a save.
  377. * -- Cort
  378. */
  379. if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
  380. giveup_fpu(prev);
  381. #ifdef CONFIG_ALTIVEC
  382. /*
  383. * If the previous thread used altivec in the last quantum
  384. * (thus changing altivec regs) then save them.
  385. * We used to check the VRSAVE register but not all apps
  386. * set it, so we don't rely on it now (and in fact we need
  387. * to save & restore VSCR even if VRSAVE == 0). -- paulus
  388. *
  389. * On SMP we always save/restore altivec regs just to avoid the
  390. * complexity of changing processors.
  391. * -- Cort
  392. */
  393. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
  394. giveup_altivec(prev);
  395. #endif /* CONFIG_ALTIVEC */
  396. #ifdef CONFIG_VSX
  397. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
  398. /* VMX and FPU registers are already save here */
  399. __giveup_vsx(prev);
  400. #endif /* CONFIG_VSX */
  401. #ifdef CONFIG_SPE
  402. /*
  403. * If the previous thread used spe in the last quantum
  404. * (thus changing spe regs) then save them.
  405. *
  406. * On SMP we always save/restore spe regs just to avoid the
  407. * complexity of changing processors.
  408. */
  409. if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
  410. giveup_spe(prev);
  411. #endif /* CONFIG_SPE */
  412. #else /* CONFIG_SMP */
  413. #ifdef CONFIG_ALTIVEC
  414. /* Avoid the trap. On smp this this never happens since
  415. * we don't set last_task_used_altivec -- Cort
  416. */
  417. if (new->thread.regs && last_task_used_altivec == new)
  418. new->thread.regs->msr |= MSR_VEC;
  419. #endif /* CONFIG_ALTIVEC */
  420. #ifdef CONFIG_VSX
  421. if (new->thread.regs && last_task_used_vsx == new)
  422. new->thread.regs->msr |= MSR_VSX;
  423. #endif /* CONFIG_VSX */
  424. #ifdef CONFIG_SPE
  425. /* Avoid the trap. On smp this this never happens since
  426. * we don't set last_task_used_spe
  427. */
  428. if (new->thread.regs && last_task_used_spe == new)
  429. new->thread.regs->msr |= MSR_SPE;
  430. #endif /* CONFIG_SPE */
  431. #endif /* CONFIG_SMP */
  432. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  433. switch_booke_debug_regs(&new->thread);
  434. #else
  435. /*
  436. * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
  437. * schedule DABR
  438. */
  439. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  440. if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
  441. set_dabr(new->thread.dabr);
  442. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  443. #endif
  444. new_thread = &new->thread;
  445. old_thread = &current->thread;
  446. #ifdef CONFIG_PPC64
  447. /*
  448. * Collect processor utilization data per process
  449. */
  450. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  451. struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
  452. long unsigned start_tb, current_tb;
  453. start_tb = old_thread->start_tb;
  454. cu->current_tb = current_tb = mfspr(SPRN_PURR);
  455. old_thread->accum_tb += (current_tb - start_tb);
  456. new_thread->start_tb = current_tb;
  457. }
  458. #endif /* CONFIG_PPC64 */
  459. #ifdef CONFIG_PPC_BOOK3S_64
  460. batch = &__get_cpu_var(ppc64_tlb_batch);
  461. if (batch->active) {
  462. current_thread_info()->local_flags |= _TLF_LAZY_MMU;
  463. if (batch->index)
  464. __flush_tlb_pending(batch);
  465. batch->active = 0;
  466. }
  467. #endif /* CONFIG_PPC_BOOK3S_64 */
  468. local_irq_save(flags);
  469. account_system_vtime(current);
  470. account_process_vtime(current);
  471. /*
  472. * We can't take a PMU exception inside _switch() since there is a
  473. * window where the kernel stack SLB and the kernel stack are out
  474. * of sync. Hard disable here.
  475. */
  476. hard_irq_disable();
  477. last = _switch(old_thread, new_thread);
  478. #ifdef CONFIG_PPC_BOOK3S_64
  479. if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
  480. current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
  481. batch = &__get_cpu_var(ppc64_tlb_batch);
  482. batch->active = 1;
  483. }
  484. #endif /* CONFIG_PPC_BOOK3S_64 */
  485. local_irq_restore(flags);
  486. return last;
  487. }
  488. static int instructions_to_print = 16;
  489. static void show_instructions(struct pt_regs *regs)
  490. {
  491. int i;
  492. unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
  493. sizeof(int));
  494. printk("Instruction dump:");
  495. for (i = 0; i < instructions_to_print; i++) {
  496. int instr;
  497. if (!(i % 8))
  498. printk("\n");
  499. #if !defined(CONFIG_BOOKE)
  500. /* If executing with the IMMU off, adjust pc rather
  501. * than print XXXXXXXX.
  502. */
  503. if (!(regs->msr & MSR_IR))
  504. pc = (unsigned long)phys_to_virt(pc);
  505. #endif
  506. /* We use __get_user here *only* to avoid an OOPS on a
  507. * bad address because the pc *should* only be a
  508. * kernel address.
  509. */
  510. if (!__kernel_text_address(pc) ||
  511. __get_user(instr, (unsigned int __user *)pc)) {
  512. printk(KERN_CONT "XXXXXXXX ");
  513. } else {
  514. if (regs->nip == pc)
  515. printk(KERN_CONT "<%08x> ", instr);
  516. else
  517. printk(KERN_CONT "%08x ", instr);
  518. }
  519. pc += sizeof(int);
  520. }
  521. printk("\n");
  522. }
  523. static struct regbit {
  524. unsigned long bit;
  525. const char *name;
  526. } msr_bits[] = {
  527. #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
  528. {MSR_SF, "SF"},
  529. {MSR_HV, "HV"},
  530. #endif
  531. {MSR_VEC, "VEC"},
  532. {MSR_VSX, "VSX"},
  533. #ifdef CONFIG_BOOKE
  534. {MSR_CE, "CE"},
  535. #endif
  536. {MSR_EE, "EE"},
  537. {MSR_PR, "PR"},
  538. {MSR_FP, "FP"},
  539. {MSR_ME, "ME"},
  540. #ifdef CONFIG_BOOKE
  541. {MSR_DE, "DE"},
  542. #else
  543. {MSR_SE, "SE"},
  544. {MSR_BE, "BE"},
  545. #endif
  546. {MSR_IR, "IR"},
  547. {MSR_DR, "DR"},
  548. {MSR_PMM, "PMM"},
  549. #ifndef CONFIG_BOOKE
  550. {MSR_RI, "RI"},
  551. {MSR_LE, "LE"},
  552. #endif
  553. {0, NULL}
  554. };
  555. static void printbits(unsigned long val, struct regbit *bits)
  556. {
  557. const char *sep = "";
  558. printk("<");
  559. for (; bits->bit; ++bits)
  560. if (val & bits->bit) {
  561. printk("%s%s", sep, bits->name);
  562. sep = ",";
  563. }
  564. printk(">");
  565. }
  566. #ifdef CONFIG_PPC64
  567. #define REG "%016lx"
  568. #define REGS_PER_LINE 4
  569. #define LAST_VOLATILE 13
  570. #else
  571. #define REG "%08lx"
  572. #define REGS_PER_LINE 8
  573. #define LAST_VOLATILE 12
  574. #endif
  575. void show_regs(struct pt_regs * regs)
  576. {
  577. int i, trap;
  578. printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
  579. regs->nip, regs->link, regs->ctr);
  580. printk("REGS: %p TRAP: %04lx %s (%s)\n",
  581. regs, regs->trap, print_tainted(), init_utsname()->release);
  582. printk("MSR: "REG" ", regs->msr);
  583. printbits(regs->msr, msr_bits);
  584. printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
  585. #ifdef CONFIG_PPC64
  586. printk("SOFTE: %ld\n", regs->softe);
  587. #endif
  588. trap = TRAP(regs);
  589. if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
  590. printk("CFAR: "REG"\n", regs->orig_gpr3);
  591. if (trap == 0x300 || trap == 0x600)
  592. #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
  593. printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
  594. #else
  595. printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
  596. #endif
  597. printk("TASK = %p[%d] '%s' THREAD: %p",
  598. current, task_pid_nr(current), current->comm, task_thread_info(current));
  599. #ifdef CONFIG_SMP
  600. printk(" CPU: %d", raw_smp_processor_id());
  601. #endif /* CONFIG_SMP */
  602. for (i = 0; i < 32; i++) {
  603. if ((i % REGS_PER_LINE) == 0)
  604. printk("\nGPR%02d: ", i);
  605. printk(REG " ", regs->gpr[i]);
  606. if (i == LAST_VOLATILE && !FULL_REGS(regs))
  607. break;
  608. }
  609. printk("\n");
  610. #ifdef CONFIG_KALLSYMS
  611. /*
  612. * Lookup NIP late so we have the best change of getting the
  613. * above info out without failing
  614. */
  615. printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
  616. printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
  617. #endif
  618. show_stack(current, (unsigned long *) regs->gpr[1]);
  619. if (!user_mode(regs))
  620. show_instructions(regs);
  621. }
  622. void exit_thread(void)
  623. {
  624. discard_lazy_cpu_state();
  625. }
  626. void flush_thread(void)
  627. {
  628. discard_lazy_cpu_state();
  629. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  630. flush_ptrace_hw_breakpoint(current);
  631. #else /* CONFIG_HAVE_HW_BREAKPOINT */
  632. set_debug_reg_defaults(&current->thread);
  633. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  634. }
  635. void
  636. release_thread(struct task_struct *t)
  637. {
  638. }
  639. /*
  640. * This gets called before we allocate a new thread and copy
  641. * the current task into it.
  642. */
  643. void prepare_to_copy(struct task_struct *tsk)
  644. {
  645. flush_fp_to_thread(current);
  646. flush_altivec_to_thread(current);
  647. flush_vsx_to_thread(current);
  648. flush_spe_to_thread(current);
  649. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  650. flush_ptrace_hw_breakpoint(tsk);
  651. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  652. }
  653. /*
  654. * Copy a thread..
  655. */
  656. extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
  657. int copy_thread(unsigned long clone_flags, unsigned long usp,
  658. unsigned long unused, struct task_struct *p,
  659. struct pt_regs *regs)
  660. {
  661. struct pt_regs *childregs, *kregs;
  662. extern void ret_from_fork(void);
  663. unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
  664. CHECK_FULL_REGS(regs);
  665. /* Copy registers */
  666. sp -= sizeof(struct pt_regs);
  667. childregs = (struct pt_regs *) sp;
  668. *childregs = *regs;
  669. if ((childregs->msr & MSR_PR) == 0) {
  670. /* for kernel thread, set `current' and stackptr in new task */
  671. childregs->gpr[1] = sp + sizeof(struct pt_regs);
  672. #ifdef CONFIG_PPC32
  673. childregs->gpr[2] = (unsigned long) p;
  674. #else
  675. clear_tsk_thread_flag(p, TIF_32BIT);
  676. #endif
  677. p->thread.regs = NULL; /* no user register state */
  678. } else {
  679. childregs->gpr[1] = usp;
  680. p->thread.regs = childregs;
  681. if (clone_flags & CLONE_SETTLS) {
  682. #ifdef CONFIG_PPC64
  683. if (!is_32bit_task())
  684. childregs->gpr[13] = childregs->gpr[6];
  685. else
  686. #endif
  687. childregs->gpr[2] = childregs->gpr[6];
  688. }
  689. }
  690. childregs->gpr[3] = 0; /* Result from fork() */
  691. sp -= STACK_FRAME_OVERHEAD;
  692. /*
  693. * The way this works is that at some point in the future
  694. * some task will call _switch to switch to the new task.
  695. * That will pop off the stack frame created below and start
  696. * the new task running at ret_from_fork. The new task will
  697. * do some house keeping and then return from the fork or clone
  698. * system call, using the stack frame created above.
  699. */
  700. sp -= sizeof(struct pt_regs);
  701. kregs = (struct pt_regs *) sp;
  702. sp -= STACK_FRAME_OVERHEAD;
  703. p->thread.ksp = sp;
  704. p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
  705. _ALIGN_UP(sizeof(struct thread_info), 16);
  706. #ifdef CONFIG_PPC_STD_MMU_64
  707. if (mmu_has_feature(MMU_FTR_SLB)) {
  708. unsigned long sp_vsid;
  709. unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
  710. if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
  711. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
  712. << SLB_VSID_SHIFT_1T;
  713. else
  714. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
  715. << SLB_VSID_SHIFT;
  716. sp_vsid |= SLB_VSID_KERNEL | llp;
  717. p->thread.ksp_vsid = sp_vsid;
  718. }
  719. #endif /* CONFIG_PPC_STD_MMU_64 */
  720. #ifdef CONFIG_PPC64
  721. if (cpu_has_feature(CPU_FTR_DSCR)) {
  722. if (current->thread.dscr_inherit) {
  723. p->thread.dscr_inherit = 1;
  724. p->thread.dscr = current->thread.dscr;
  725. } else if (0 != dscr_default) {
  726. p->thread.dscr_inherit = 1;
  727. p->thread.dscr = dscr_default;
  728. } else {
  729. p->thread.dscr_inherit = 0;
  730. p->thread.dscr = 0;
  731. }
  732. }
  733. #endif
  734. /*
  735. * The PPC64 ABI makes use of a TOC to contain function
  736. * pointers. The function (ret_from_except) is actually a pointer
  737. * to the TOC entry. The first entry is a pointer to the actual
  738. * function.
  739. */
  740. #ifdef CONFIG_PPC64
  741. kregs->nip = *((unsigned long *)ret_from_fork);
  742. #else
  743. kregs->nip = (unsigned long)ret_from_fork;
  744. #endif
  745. return 0;
  746. }
  747. /*
  748. * Set up a thread for executing a new program
  749. */
  750. void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
  751. {
  752. #ifdef CONFIG_PPC64
  753. unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
  754. #endif
  755. /*
  756. * If we exec out of a kernel thread then thread.regs will not be
  757. * set. Do it now.
  758. */
  759. if (!current->thread.regs) {
  760. struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
  761. current->thread.regs = regs - 1;
  762. }
  763. memset(regs->gpr, 0, sizeof(regs->gpr));
  764. regs->ctr = 0;
  765. regs->link = 0;
  766. regs->xer = 0;
  767. regs->ccr = 0;
  768. regs->gpr[1] = sp;
  769. /*
  770. * We have just cleared all the nonvolatile GPRs, so make
  771. * FULL_REGS(regs) return true. This is necessary to allow
  772. * ptrace to examine the thread immediately after exec.
  773. */
  774. regs->trap &= ~1UL;
  775. #ifdef CONFIG_PPC32
  776. regs->mq = 0;
  777. regs->nip = start;
  778. regs->msr = MSR_USER;
  779. #else
  780. if (!is_32bit_task()) {
  781. unsigned long entry, toc;
  782. /* start is a relocated pointer to the function descriptor for
  783. * the elf _start routine. The first entry in the function
  784. * descriptor is the entry address of _start and the second
  785. * entry is the TOC value we need to use.
  786. */
  787. __get_user(entry, (unsigned long __user *)start);
  788. __get_user(toc, (unsigned long __user *)start+1);
  789. /* Check whether the e_entry function descriptor entries
  790. * need to be relocated before we can use them.
  791. */
  792. if (load_addr != 0) {
  793. entry += load_addr;
  794. toc += load_addr;
  795. }
  796. regs->nip = entry;
  797. regs->gpr[2] = toc;
  798. regs->msr = MSR_USER64;
  799. } else {
  800. regs->nip = start;
  801. regs->gpr[2] = 0;
  802. regs->msr = MSR_USER32;
  803. }
  804. #endif
  805. discard_lazy_cpu_state();
  806. #ifdef CONFIG_VSX
  807. current->thread.used_vsr = 0;
  808. #endif
  809. memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
  810. current->thread.fpscr.val = 0;
  811. #ifdef CONFIG_ALTIVEC
  812. memset(current->thread.vr, 0, sizeof(current->thread.vr));
  813. memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
  814. current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
  815. current->thread.vrsave = 0;
  816. current->thread.used_vr = 0;
  817. #endif /* CONFIG_ALTIVEC */
  818. #ifdef CONFIG_SPE
  819. memset(current->thread.evr, 0, sizeof(current->thread.evr));
  820. current->thread.acc = 0;
  821. current->thread.spefscr = 0;
  822. current->thread.used_spe = 0;
  823. #endif /* CONFIG_SPE */
  824. }
  825. #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
  826. | PR_FP_EXC_RES | PR_FP_EXC_INV)
  827. int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
  828. {
  829. struct pt_regs *regs = tsk->thread.regs;
  830. /* This is a bit hairy. If we are an SPE enabled processor
  831. * (have embedded fp) we store the IEEE exception enable flags in
  832. * fpexc_mode. fpexc_mode is also used for setting FP exception
  833. * mode (asyn, precise, disabled) for 'Classic' FP. */
  834. if (val & PR_FP_EXC_SW_ENABLE) {
  835. #ifdef CONFIG_SPE
  836. if (cpu_has_feature(CPU_FTR_SPE)) {
  837. tsk->thread.fpexc_mode = val &
  838. (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
  839. return 0;
  840. } else {
  841. return -EINVAL;
  842. }
  843. #else
  844. return -EINVAL;
  845. #endif
  846. }
  847. /* on a CONFIG_SPE this does not hurt us. The bits that
  848. * __pack_fe01 use do not overlap with bits used for
  849. * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
  850. * on CONFIG_SPE implementations are reserved so writing to
  851. * them does not change anything */
  852. if (val > PR_FP_EXC_PRECISE)
  853. return -EINVAL;
  854. tsk->thread.fpexc_mode = __pack_fe01(val);
  855. if (regs != NULL && (regs->msr & MSR_FP) != 0)
  856. regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
  857. | tsk->thread.fpexc_mode;
  858. return 0;
  859. }
  860. int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
  861. {
  862. unsigned int val;
  863. if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
  864. #ifdef CONFIG_SPE
  865. if (cpu_has_feature(CPU_FTR_SPE))
  866. val = tsk->thread.fpexc_mode;
  867. else
  868. return -EINVAL;
  869. #else
  870. return -EINVAL;
  871. #endif
  872. else
  873. val = __unpack_fe01(tsk->thread.fpexc_mode);
  874. return put_user(val, (unsigned int __user *) adr);
  875. }
  876. int set_endian(struct task_struct *tsk, unsigned int val)
  877. {
  878. struct pt_regs *regs = tsk->thread.regs;
  879. if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
  880. (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
  881. return -EINVAL;
  882. if (regs == NULL)
  883. return -EINVAL;
  884. if (val == PR_ENDIAN_BIG)
  885. regs->msr &= ~MSR_LE;
  886. else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
  887. regs->msr |= MSR_LE;
  888. else
  889. return -EINVAL;
  890. return 0;
  891. }
  892. int get_endian(struct task_struct *tsk, unsigned long adr)
  893. {
  894. struct pt_regs *regs = tsk->thread.regs;
  895. unsigned int val;
  896. if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
  897. !cpu_has_feature(CPU_FTR_REAL_LE))
  898. return -EINVAL;
  899. if (regs == NULL)
  900. return -EINVAL;
  901. if (regs->msr & MSR_LE) {
  902. if (cpu_has_feature(CPU_FTR_REAL_LE))
  903. val = PR_ENDIAN_LITTLE;
  904. else
  905. val = PR_ENDIAN_PPC_LITTLE;
  906. } else
  907. val = PR_ENDIAN_BIG;
  908. return put_user(val, (unsigned int __user *)adr);
  909. }
  910. int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
  911. {
  912. tsk->thread.align_ctl = val;
  913. return 0;
  914. }
  915. int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
  916. {
  917. return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
  918. }
  919. #define TRUNC_PTR(x) ((typeof(x))(((unsigned long)(x)) & 0xffffffff))
  920. int sys_clone(unsigned long clone_flags, unsigned long usp,
  921. int __user *parent_tidp, void __user *child_threadptr,
  922. int __user *child_tidp, int p6,
  923. struct pt_regs *regs)
  924. {
  925. CHECK_FULL_REGS(regs);
  926. if (usp == 0)
  927. usp = regs->gpr[1]; /* stack pointer for child */
  928. #ifdef CONFIG_PPC64
  929. if (is_32bit_task()) {
  930. parent_tidp = TRUNC_PTR(parent_tidp);
  931. child_tidp = TRUNC_PTR(child_tidp);
  932. }
  933. #endif
  934. return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
  935. }
  936. int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
  937. unsigned long p4, unsigned long p5, unsigned long p6,
  938. struct pt_regs *regs)
  939. {
  940. CHECK_FULL_REGS(regs);
  941. return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
  942. }
  943. int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
  944. unsigned long p4, unsigned long p5, unsigned long p6,
  945. struct pt_regs *regs)
  946. {
  947. CHECK_FULL_REGS(regs);
  948. return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->gpr[1],
  949. regs, 0, NULL, NULL);
  950. }
  951. int sys_execve(unsigned long a0, unsigned long a1, unsigned long a2,
  952. unsigned long a3, unsigned long a4, unsigned long a5,
  953. struct pt_regs *regs)
  954. {
  955. int error;
  956. char *filename;
  957. filename = getname((const char __user *) a0);
  958. error = PTR_ERR(filename);
  959. if (IS_ERR(filename))
  960. goto out;
  961. flush_fp_to_thread(current);
  962. flush_altivec_to_thread(current);
  963. flush_spe_to_thread(current);
  964. error = do_execve(filename,
  965. (const char __user *const __user *) a1,
  966. (const char __user *const __user *) a2, regs);
  967. putname(filename);
  968. out:
  969. return error;
  970. }
  971. static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
  972. unsigned long nbytes)
  973. {
  974. unsigned long stack_page;
  975. unsigned long cpu = task_cpu(p);
  976. /*
  977. * Avoid crashing if the stack has overflowed and corrupted
  978. * task_cpu(p), which is in the thread_info struct.
  979. */
  980. if (cpu < NR_CPUS && cpu_possible(cpu)) {
  981. stack_page = (unsigned long) hardirq_ctx[cpu];
  982. if (sp >= stack_page + sizeof(struct thread_struct)
  983. && sp <= stack_page + THREAD_SIZE - nbytes)
  984. return 1;
  985. stack_page = (unsigned long) softirq_ctx[cpu];
  986. if (sp >= stack_page + sizeof(struct thread_struct)
  987. && sp <= stack_page + THREAD_SIZE - nbytes)
  988. return 1;
  989. }
  990. return 0;
  991. }
  992. int validate_sp(unsigned long sp, struct task_struct *p,
  993. unsigned long nbytes)
  994. {
  995. unsigned long stack_page = (unsigned long)task_stack_page(p);
  996. if (sp >= stack_page + sizeof(struct thread_struct)
  997. && sp <= stack_page + THREAD_SIZE - nbytes)
  998. return 1;
  999. return valid_irq_stack(sp, p, nbytes);
  1000. }
  1001. EXPORT_SYMBOL(validate_sp);
  1002. unsigned long get_wchan(struct task_struct *p)
  1003. {
  1004. unsigned long ip, sp;
  1005. int count = 0;
  1006. if (!p || p == current || p->state == TASK_RUNNING)
  1007. return 0;
  1008. sp = p->thread.ksp;
  1009. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  1010. return 0;
  1011. do {
  1012. sp = *(unsigned long *)sp;
  1013. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  1014. return 0;
  1015. if (count > 0) {
  1016. ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
  1017. if (!in_sched_functions(ip))
  1018. return ip;
  1019. }
  1020. } while (count++ < 16);
  1021. return 0;
  1022. }
  1023. static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
  1024. void show_stack(struct task_struct *tsk, unsigned long *stack)
  1025. {
  1026. unsigned long sp, ip, lr, newsp;
  1027. int count = 0;
  1028. int firstframe = 1;
  1029. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1030. int curr_frame = current->curr_ret_stack;
  1031. extern void return_to_handler(void);
  1032. unsigned long rth = (unsigned long)return_to_handler;
  1033. unsigned long mrth = -1;
  1034. #ifdef CONFIG_PPC64
  1035. extern void mod_return_to_handler(void);
  1036. rth = *(unsigned long *)rth;
  1037. mrth = (unsigned long)mod_return_to_handler;
  1038. mrth = *(unsigned long *)mrth;
  1039. #endif
  1040. #endif
  1041. sp = (unsigned long) stack;
  1042. if (tsk == NULL)
  1043. tsk = current;
  1044. if (sp == 0) {
  1045. if (tsk == current)
  1046. asm("mr %0,1" : "=r" (sp));
  1047. else
  1048. sp = tsk->thread.ksp;
  1049. }
  1050. lr = 0;
  1051. printk("Call Trace:\n");
  1052. do {
  1053. if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
  1054. return;
  1055. stack = (unsigned long *) sp;
  1056. newsp = stack[0];
  1057. ip = stack[STACK_FRAME_LR_SAVE];
  1058. if (!firstframe || ip != lr) {
  1059. printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
  1060. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1061. if ((ip == rth || ip == mrth) && curr_frame >= 0) {
  1062. printk(" (%pS)",
  1063. (void *)current->ret_stack[curr_frame].ret);
  1064. curr_frame--;
  1065. }
  1066. #endif
  1067. if (firstframe)
  1068. printk(" (unreliable)");
  1069. printk("\n");
  1070. }
  1071. firstframe = 0;
  1072. /*
  1073. * See if this is an exception frame.
  1074. * We look for the "regshere" marker in the current frame.
  1075. */
  1076. if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
  1077. && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
  1078. struct pt_regs *regs = (struct pt_regs *)
  1079. (sp + STACK_FRAME_OVERHEAD);
  1080. lr = regs->link;
  1081. printk("--- Exception: %lx at %pS\n LR = %pS\n",
  1082. regs->trap, (void *)regs->nip, (void *)lr);
  1083. firstframe = 1;
  1084. }
  1085. sp = newsp;
  1086. } while (count++ < kstack_depth_to_print);
  1087. }
  1088. void dump_stack(void)
  1089. {
  1090. show_stack(current, NULL);
  1091. }
  1092. EXPORT_SYMBOL(dump_stack);
  1093. #ifdef CONFIG_PPC64
  1094. /* Called with hard IRQs off */
  1095. void __ppc64_runlatch_on(void)
  1096. {
  1097. struct thread_info *ti = current_thread_info();
  1098. unsigned long ctrl;
  1099. ctrl = mfspr(SPRN_CTRLF);
  1100. ctrl |= CTRL_RUNLATCH;
  1101. mtspr(SPRN_CTRLT, ctrl);
  1102. ti->local_flags |= TLF_RUNLATCH;
  1103. }
  1104. /* Called with hard IRQs off */
  1105. void __ppc64_runlatch_off(void)
  1106. {
  1107. struct thread_info *ti = current_thread_info();
  1108. unsigned long ctrl;
  1109. ti->local_flags &= ~TLF_RUNLATCH;
  1110. ctrl = mfspr(SPRN_CTRLF);
  1111. ctrl &= ~CTRL_RUNLATCH;
  1112. mtspr(SPRN_CTRLT, ctrl);
  1113. }
  1114. #endif /* CONFIG_PPC64 */
  1115. #if THREAD_SHIFT < PAGE_SHIFT
  1116. static struct kmem_cache *thread_info_cache;
  1117. struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
  1118. {
  1119. struct thread_info *ti;
  1120. ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);
  1121. if (unlikely(ti == NULL))
  1122. return NULL;
  1123. #ifdef CONFIG_DEBUG_STACK_USAGE
  1124. memset(ti, 0, THREAD_SIZE);
  1125. #endif
  1126. return ti;
  1127. }
  1128. void free_thread_info(struct thread_info *ti)
  1129. {
  1130. kmem_cache_free(thread_info_cache, ti);
  1131. }
  1132. void thread_info_cache_init(void)
  1133. {
  1134. thread_info_cache = kmem_cache_create("thread_info", THREAD_SIZE,
  1135. THREAD_SIZE, 0, NULL);
  1136. BUG_ON(thread_info_cache == NULL);
  1137. }
  1138. #endif /* THREAD_SHIFT < PAGE_SHIFT */
  1139. unsigned long arch_align_stack(unsigned long sp)
  1140. {
  1141. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  1142. sp -= get_random_int() & ~PAGE_MASK;
  1143. return sp & ~0xf;
  1144. }
  1145. static inline unsigned long brk_rnd(void)
  1146. {
  1147. unsigned long rnd = 0;
  1148. /* 8MB for 32bit, 1GB for 64bit */
  1149. if (is_32bit_task())
  1150. rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
  1151. else
  1152. rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
  1153. return rnd << PAGE_SHIFT;
  1154. }
  1155. unsigned long arch_randomize_brk(struct mm_struct *mm)
  1156. {
  1157. unsigned long base = mm->brk;
  1158. unsigned long ret;
  1159. #ifdef CONFIG_PPC_STD_MMU_64
  1160. /*
  1161. * If we are using 1TB segments and we are allowed to randomise
  1162. * the heap, we can put it above 1TB so it is backed by a 1TB
  1163. * segment. Otherwise the heap will be in the bottom 1TB
  1164. * which always uses 256MB segments and this may result in a
  1165. * performance penalty.
  1166. */
  1167. if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
  1168. base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
  1169. #endif
  1170. ret = PAGE_ALIGN(base + brk_rnd());
  1171. if (ret < mm->brk)
  1172. return mm->brk;
  1173. return ret;
  1174. }
  1175. unsigned long randomize_et_dyn(unsigned long base)
  1176. {
  1177. unsigned long ret = PAGE_ALIGN(base + brk_rnd());
  1178. if (ret < base)
  1179. return base;
  1180. return ret;
  1181. }