core.c 24 KB

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  1. /*
  2. * arch/arm/mach-ep93xx/core.c
  3. * Core routines for Cirrus EP93xx chips.
  4. *
  5. * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
  6. * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
  7. *
  8. * Thanks go to Michael Burian and Ray Lehtiniemi for their key
  9. * role in the ep93xx linux community.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. */
  16. #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/dma-mapping.h>
  22. #include <linux/timex.h>
  23. #include <linux/irq.h>
  24. #include <linux/io.h>
  25. #include <linux/gpio.h>
  26. #include <linux/leds.h>
  27. #include <linux/termios.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/serial.h>
  30. #include <linux/mtd/physmap.h>
  31. #include <linux/i2c.h>
  32. #include <linux/i2c-gpio.h>
  33. #include <linux/spi/spi.h>
  34. #include <linux/export.h>
  35. #include <mach/hardware.h>
  36. #include <mach/fb.h>
  37. #include <mach/ep93xx_keypad.h>
  38. #include <mach/ep93xx_spi.h>
  39. #include <mach/gpio-ep93xx.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/time.h>
  42. #include <asm/hardware/vic.h>
  43. /*************************************************************************
  44. * Static I/O mappings that are needed for all EP93xx platforms
  45. *************************************************************************/
  46. static struct map_desc ep93xx_io_desc[] __initdata = {
  47. {
  48. .virtual = EP93XX_AHB_VIRT_BASE,
  49. .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  50. .length = EP93XX_AHB_SIZE,
  51. .type = MT_DEVICE,
  52. }, {
  53. .virtual = EP93XX_APB_VIRT_BASE,
  54. .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  55. .length = EP93XX_APB_SIZE,
  56. .type = MT_DEVICE,
  57. },
  58. };
  59. void __init ep93xx_map_io(void)
  60. {
  61. iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  62. }
  63. /*************************************************************************
  64. * Timer handling for EP93xx
  65. *************************************************************************
  66. * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
  67. * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  68. * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
  69. * is free-running, and can't generate interrupts.
  70. *
  71. * The 508 kHz timers are ideal for use for the timer interrupt, as the
  72. * most common values of HZ divide 508 kHz nicely. We pick one of the 16
  73. * bit timers (timer 1) since we don't need more than 16 bits of reload
  74. * value as long as HZ >= 8.
  75. *
  76. * The higher clock rate of timer 4 makes it a better choice than the
  77. * other timers for use in gettimeoffset(), while the fact that it can't
  78. * generate interrupts means we don't have to worry about not being able
  79. * to use this timer for something else. We also use timer 4 for keeping
  80. * track of lost jiffies.
  81. */
  82. #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
  83. #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
  84. #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
  85. #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
  86. #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
  87. #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
  88. #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
  89. #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
  90. #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
  91. #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
  92. #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
  93. #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
  94. #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
  95. #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
  96. #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
  97. #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
  98. #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
  99. #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
  100. #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
  101. #define EP93XX_TIMER123_CLOCK 508469
  102. #define EP93XX_TIMER4_CLOCK 983040
  103. #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
  104. #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
  105. static unsigned int last_jiffy_time;
  106. static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
  107. {
  108. /* Writing any value clears the timer interrupt */
  109. __raw_writel(1, EP93XX_TIMER1_CLEAR);
  110. /* Recover lost jiffies */
  111. while ((signed long)
  112. (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
  113. >= TIMER4_TICKS_PER_JIFFY) {
  114. last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
  115. timer_tick();
  116. }
  117. return IRQ_HANDLED;
  118. }
  119. static struct irqaction ep93xx_timer_irq = {
  120. .name = "ep93xx timer",
  121. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  122. .handler = ep93xx_timer_interrupt,
  123. };
  124. static void __init ep93xx_timer_init(void)
  125. {
  126. u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
  127. EP93XX_TIMER123_CONTROL_CLKSEL;
  128. /* Enable periodic HZ timer. */
  129. __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
  130. __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
  131. __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
  132. EP93XX_TIMER1_CONTROL);
  133. /* Enable lost jiffy timer. */
  134. __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
  135. EP93XX_TIMER4_VALUE_HIGH);
  136. setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
  137. }
  138. static unsigned long ep93xx_gettimeoffset(void)
  139. {
  140. int offset;
  141. offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
  142. /* Calculate (1000000 / 983040) * offset. */
  143. return offset + (53 * offset / 3072);
  144. }
  145. struct sys_timer ep93xx_timer = {
  146. .init = ep93xx_timer_init,
  147. .offset = ep93xx_gettimeoffset,
  148. };
  149. /*************************************************************************
  150. * EP93xx IRQ handling
  151. *************************************************************************/
  152. void __init ep93xx_init_irq(void)
  153. {
  154. vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
  155. vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
  156. }
  157. /*************************************************************************
  158. * EP93xx System Controller Software Locked register handling
  159. *************************************************************************/
  160. /*
  161. * syscon_swlock prevents anything else from writing to the syscon
  162. * block while a software locked register is being written.
  163. */
  164. static DEFINE_SPINLOCK(syscon_swlock);
  165. void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
  166. {
  167. unsigned long flags;
  168. spin_lock_irqsave(&syscon_swlock, flags);
  169. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  170. __raw_writel(val, reg);
  171. spin_unlock_irqrestore(&syscon_swlock, flags);
  172. }
  173. EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
  174. void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
  175. {
  176. unsigned long flags;
  177. unsigned int val;
  178. spin_lock_irqsave(&syscon_swlock, flags);
  179. val = __raw_readl(EP93XX_SYSCON_DEVCFG);
  180. val &= ~clear_bits;
  181. val |= set_bits;
  182. __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
  183. __raw_writel(val, EP93XX_SYSCON_DEVCFG);
  184. spin_unlock_irqrestore(&syscon_swlock, flags);
  185. }
  186. EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
  187. /**
  188. * ep93xx_chip_revision() - returns the EP93xx chip revision
  189. *
  190. * See <mach/platform.h> for more information.
  191. */
  192. unsigned int ep93xx_chip_revision(void)
  193. {
  194. unsigned int v;
  195. v = __raw_readl(EP93XX_SYSCON_SYSCFG);
  196. v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
  197. v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
  198. return v;
  199. }
  200. /*************************************************************************
  201. * EP93xx GPIO
  202. *************************************************************************/
  203. static struct resource ep93xx_gpio_resource[] = {
  204. {
  205. .start = EP93XX_GPIO_PHYS_BASE,
  206. .end = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
  207. .flags = IORESOURCE_MEM,
  208. },
  209. };
  210. static struct platform_device ep93xx_gpio_device = {
  211. .name = "gpio-ep93xx",
  212. .id = -1,
  213. .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
  214. .resource = ep93xx_gpio_resource,
  215. };
  216. /*************************************************************************
  217. * EP93xx peripheral handling
  218. *************************************************************************/
  219. #define EP93XX_UART_MCR_OFFSET (0x0100)
  220. static void ep93xx_uart_set_mctrl(struct amba_device *dev,
  221. void __iomem *base, unsigned int mctrl)
  222. {
  223. unsigned int mcr;
  224. mcr = 0;
  225. if (mctrl & TIOCM_RTS)
  226. mcr |= 2;
  227. if (mctrl & TIOCM_DTR)
  228. mcr |= 1;
  229. __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
  230. }
  231. static struct amba_pl010_data ep93xx_uart_data = {
  232. .set_mctrl = ep93xx_uart_set_mctrl,
  233. };
  234. static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
  235. { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
  236. static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
  237. { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
  238. static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
  239. { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
  240. static struct resource ep93xx_rtc_resource[] = {
  241. {
  242. .start = EP93XX_RTC_PHYS_BASE,
  243. .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
  244. .flags = IORESOURCE_MEM,
  245. },
  246. };
  247. static struct platform_device ep93xx_rtc_device = {
  248. .name = "ep93xx-rtc",
  249. .id = -1,
  250. .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
  251. .resource = ep93xx_rtc_resource,
  252. };
  253. static struct resource ep93xx_ohci_resources[] = {
  254. [0] = {
  255. .start = EP93XX_USB_PHYS_BASE,
  256. .end = EP93XX_USB_PHYS_BASE + 0x0fff,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. [1] = {
  260. .start = IRQ_EP93XX_USB,
  261. .end = IRQ_EP93XX_USB,
  262. .flags = IORESOURCE_IRQ,
  263. },
  264. };
  265. static struct platform_device ep93xx_ohci_device = {
  266. .name = "ep93xx-ohci",
  267. .id = -1,
  268. .dev = {
  269. .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
  270. .coherent_dma_mask = DMA_BIT_MASK(32),
  271. },
  272. .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
  273. .resource = ep93xx_ohci_resources,
  274. };
  275. /*************************************************************************
  276. * EP93xx physmap'ed flash
  277. *************************************************************************/
  278. static struct physmap_flash_data ep93xx_flash_data;
  279. static struct resource ep93xx_flash_resource = {
  280. .flags = IORESOURCE_MEM,
  281. };
  282. static struct platform_device ep93xx_flash = {
  283. .name = "physmap-flash",
  284. .id = 0,
  285. .dev = {
  286. .platform_data = &ep93xx_flash_data,
  287. },
  288. .num_resources = 1,
  289. .resource = &ep93xx_flash_resource,
  290. };
  291. /**
  292. * ep93xx_register_flash() - Register the external flash device.
  293. * @width: bank width in octets
  294. * @start: resource start address
  295. * @size: resource size
  296. */
  297. void __init ep93xx_register_flash(unsigned int width,
  298. resource_size_t start, resource_size_t size)
  299. {
  300. ep93xx_flash_data.width = width;
  301. ep93xx_flash_resource.start = start;
  302. ep93xx_flash_resource.end = start + size - 1;
  303. platform_device_register(&ep93xx_flash);
  304. }
  305. /*************************************************************************
  306. * EP93xx ethernet peripheral handling
  307. *************************************************************************/
  308. static struct ep93xx_eth_data ep93xx_eth_data;
  309. static struct resource ep93xx_eth_resource[] = {
  310. {
  311. .start = EP93XX_ETHERNET_PHYS_BASE,
  312. .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
  313. .flags = IORESOURCE_MEM,
  314. }, {
  315. .start = IRQ_EP93XX_ETHERNET,
  316. .end = IRQ_EP93XX_ETHERNET,
  317. .flags = IORESOURCE_IRQ,
  318. }
  319. };
  320. static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
  321. static struct platform_device ep93xx_eth_device = {
  322. .name = "ep93xx-eth",
  323. .id = -1,
  324. .dev = {
  325. .platform_data = &ep93xx_eth_data,
  326. .coherent_dma_mask = DMA_BIT_MASK(32),
  327. .dma_mask = &ep93xx_eth_dma_mask,
  328. },
  329. .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
  330. .resource = ep93xx_eth_resource,
  331. };
  332. /**
  333. * ep93xx_register_eth - Register the built-in ethernet platform device.
  334. * @data: platform specific ethernet configuration (__initdata)
  335. * @copy_addr: flag indicating that the MAC address should be copied
  336. * from the IndAd registers (as programmed by the bootloader)
  337. */
  338. void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
  339. {
  340. if (copy_addr)
  341. memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
  342. ep93xx_eth_data = *data;
  343. platform_device_register(&ep93xx_eth_device);
  344. }
  345. /*************************************************************************
  346. * EP93xx i2c peripheral handling
  347. *************************************************************************/
  348. static struct i2c_gpio_platform_data ep93xx_i2c_data;
  349. static struct platform_device ep93xx_i2c_device = {
  350. .name = "i2c-gpio",
  351. .id = 0,
  352. .dev = {
  353. .platform_data = &ep93xx_i2c_data,
  354. },
  355. };
  356. /**
  357. * ep93xx_register_i2c - Register the i2c platform device.
  358. * @data: platform specific i2c-gpio configuration (__initdata)
  359. * @devices: platform specific i2c bus device information (__initdata)
  360. * @num: the number of devices on the i2c bus
  361. */
  362. void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
  363. struct i2c_board_info *devices, int num)
  364. {
  365. /*
  366. * Set the EEPROM interface pin drive type control.
  367. * Defines the driver type for the EECLK and EEDAT pins as either
  368. * open drain, which will require an external pull-up, or a normal
  369. * CMOS driver.
  370. */
  371. if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
  372. pr_warning("sda != EEDAT, open drain has no effect\n");
  373. if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
  374. pr_warning("scl != EECLK, open drain has no effect\n");
  375. __raw_writel((data->sda_is_open_drain << 1) |
  376. (data->scl_is_open_drain << 0),
  377. EP93XX_GPIO_EEDRIVE);
  378. ep93xx_i2c_data = *data;
  379. i2c_register_board_info(0, devices, num);
  380. platform_device_register(&ep93xx_i2c_device);
  381. }
  382. /*************************************************************************
  383. * EP93xx SPI peripheral handling
  384. *************************************************************************/
  385. static struct ep93xx_spi_info ep93xx_spi_master_data;
  386. static struct resource ep93xx_spi_resources[] = {
  387. {
  388. .start = EP93XX_SPI_PHYS_BASE,
  389. .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1,
  390. .flags = IORESOURCE_MEM,
  391. },
  392. {
  393. .start = IRQ_EP93XX_SSP,
  394. .end = IRQ_EP93XX_SSP,
  395. .flags = IORESOURCE_IRQ,
  396. },
  397. };
  398. static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
  399. static struct platform_device ep93xx_spi_device = {
  400. .name = "ep93xx-spi",
  401. .id = 0,
  402. .dev = {
  403. .platform_data = &ep93xx_spi_master_data,
  404. .coherent_dma_mask = DMA_BIT_MASK(32),
  405. .dma_mask = &ep93xx_spi_dma_mask,
  406. },
  407. .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
  408. .resource = ep93xx_spi_resources,
  409. };
  410. /**
  411. * ep93xx_register_spi() - registers spi platform device
  412. * @info: ep93xx board specific spi master info (__initdata)
  413. * @devices: SPI devices to register (__initdata)
  414. * @num: number of SPI devices to register
  415. *
  416. * This function registers platform device for the EP93xx SPI controller and
  417. * also makes sure that SPI pins are muxed so that I2S is not using those pins.
  418. */
  419. void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
  420. struct spi_board_info *devices, int num)
  421. {
  422. /*
  423. * When SPI is used, we need to make sure that I2S is muxed off from
  424. * SPI pins.
  425. */
  426. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
  427. ep93xx_spi_master_data = *info;
  428. spi_register_board_info(devices, num);
  429. platform_device_register(&ep93xx_spi_device);
  430. }
  431. /*************************************************************************
  432. * EP93xx LEDs
  433. *************************************************************************/
  434. static struct gpio_led ep93xx_led_pins[] = {
  435. {
  436. .name = "platform:grled",
  437. .gpio = EP93XX_GPIO_LINE_GRLED,
  438. }, {
  439. .name = "platform:rdled",
  440. .gpio = EP93XX_GPIO_LINE_RDLED,
  441. },
  442. };
  443. static struct gpio_led_platform_data ep93xx_led_data = {
  444. .num_leds = ARRAY_SIZE(ep93xx_led_pins),
  445. .leds = ep93xx_led_pins,
  446. };
  447. static struct platform_device ep93xx_leds = {
  448. .name = "leds-gpio",
  449. .id = -1,
  450. .dev = {
  451. .platform_data = &ep93xx_led_data,
  452. },
  453. };
  454. /*************************************************************************
  455. * EP93xx pwm peripheral handling
  456. *************************************************************************/
  457. static struct resource ep93xx_pwm0_resource[] = {
  458. {
  459. .start = EP93XX_PWM_PHYS_BASE,
  460. .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
  461. .flags = IORESOURCE_MEM,
  462. },
  463. };
  464. static struct platform_device ep93xx_pwm0_device = {
  465. .name = "ep93xx-pwm",
  466. .id = 0,
  467. .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
  468. .resource = ep93xx_pwm0_resource,
  469. };
  470. static struct resource ep93xx_pwm1_resource[] = {
  471. {
  472. .start = EP93XX_PWM_PHYS_BASE + 0x20,
  473. .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
  474. .flags = IORESOURCE_MEM,
  475. },
  476. };
  477. static struct platform_device ep93xx_pwm1_device = {
  478. .name = "ep93xx-pwm",
  479. .id = 1,
  480. .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
  481. .resource = ep93xx_pwm1_resource,
  482. };
  483. void __init ep93xx_register_pwm(int pwm0, int pwm1)
  484. {
  485. if (pwm0)
  486. platform_device_register(&ep93xx_pwm0_device);
  487. /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
  488. if (pwm1)
  489. platform_device_register(&ep93xx_pwm1_device);
  490. }
  491. int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
  492. {
  493. int err;
  494. if (pdev->id == 0) {
  495. err = 0;
  496. } else if (pdev->id == 1) {
  497. err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
  498. dev_name(&pdev->dev));
  499. if (err)
  500. return err;
  501. err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
  502. if (err)
  503. goto fail;
  504. /* PWM 1 output on EGPIO[14] */
  505. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
  506. } else {
  507. err = -ENODEV;
  508. }
  509. return err;
  510. fail:
  511. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  512. return err;
  513. }
  514. EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
  515. void ep93xx_pwm_release_gpio(struct platform_device *pdev)
  516. {
  517. if (pdev->id == 1) {
  518. gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
  519. gpio_free(EP93XX_GPIO_LINE_EGPIO14);
  520. /* EGPIO[14] used for GPIO */
  521. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
  522. }
  523. }
  524. EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
  525. /*************************************************************************
  526. * EP93xx video peripheral handling
  527. *************************************************************************/
  528. static struct ep93xxfb_mach_info ep93xxfb_data;
  529. static struct resource ep93xx_fb_resource[] = {
  530. {
  531. .start = EP93XX_RASTER_PHYS_BASE,
  532. .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
  533. .flags = IORESOURCE_MEM,
  534. },
  535. };
  536. static struct platform_device ep93xx_fb_device = {
  537. .name = "ep93xx-fb",
  538. .id = -1,
  539. .dev = {
  540. .platform_data = &ep93xxfb_data,
  541. .coherent_dma_mask = DMA_BIT_MASK(32),
  542. .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
  543. },
  544. .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
  545. .resource = ep93xx_fb_resource,
  546. };
  547. static struct platform_device ep93xx_bl_device = {
  548. .name = "ep93xx-bl",
  549. .id = -1,
  550. };
  551. /**
  552. * ep93xx_register_fb - Register the framebuffer platform device.
  553. * @data: platform specific framebuffer configuration (__initdata)
  554. */
  555. void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
  556. {
  557. ep93xxfb_data = *data;
  558. platform_device_register(&ep93xx_fb_device);
  559. platform_device_register(&ep93xx_bl_device);
  560. }
  561. /*************************************************************************
  562. * EP93xx matrix keypad peripheral handling
  563. *************************************************************************/
  564. static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
  565. static struct resource ep93xx_keypad_resource[] = {
  566. {
  567. .start = EP93XX_KEY_MATRIX_PHYS_BASE,
  568. .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
  569. .flags = IORESOURCE_MEM,
  570. }, {
  571. .start = IRQ_EP93XX_KEY,
  572. .end = IRQ_EP93XX_KEY,
  573. .flags = IORESOURCE_IRQ,
  574. },
  575. };
  576. static struct platform_device ep93xx_keypad_device = {
  577. .name = "ep93xx-keypad",
  578. .id = -1,
  579. .dev = {
  580. .platform_data = &ep93xx_keypad_data,
  581. },
  582. .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
  583. .resource = ep93xx_keypad_resource,
  584. };
  585. /**
  586. * ep93xx_register_keypad - Register the keypad platform device.
  587. * @data: platform specific keypad configuration (__initdata)
  588. */
  589. void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
  590. {
  591. ep93xx_keypad_data = *data;
  592. platform_device_register(&ep93xx_keypad_device);
  593. }
  594. int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
  595. {
  596. int err;
  597. int i;
  598. for (i = 0; i < 8; i++) {
  599. err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
  600. if (err)
  601. goto fail_gpio_c;
  602. err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
  603. if (err)
  604. goto fail_gpio_d;
  605. }
  606. /* Enable the keypad controller; GPIO ports C and D used for keypad */
  607. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  608. EP93XX_SYSCON_DEVCFG_GONK);
  609. return 0;
  610. fail_gpio_d:
  611. gpio_free(EP93XX_GPIO_LINE_C(i));
  612. fail_gpio_c:
  613. for ( ; i >= 0; --i) {
  614. gpio_free(EP93XX_GPIO_LINE_C(i));
  615. gpio_free(EP93XX_GPIO_LINE_D(i));
  616. }
  617. return err;
  618. }
  619. EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
  620. void ep93xx_keypad_release_gpio(struct platform_device *pdev)
  621. {
  622. int i;
  623. for (i = 0; i < 8; i++) {
  624. gpio_free(EP93XX_GPIO_LINE_C(i));
  625. gpio_free(EP93XX_GPIO_LINE_D(i));
  626. }
  627. /* Disable the keypad controller; GPIO ports C and D used for GPIO */
  628. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
  629. EP93XX_SYSCON_DEVCFG_GONK);
  630. }
  631. EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
  632. /*************************************************************************
  633. * EP93xx I2S audio peripheral handling
  634. *************************************************************************/
  635. static struct resource ep93xx_i2s_resource[] = {
  636. {
  637. .start = EP93XX_I2S_PHYS_BASE,
  638. .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
  639. .flags = IORESOURCE_MEM,
  640. },
  641. };
  642. static struct platform_device ep93xx_i2s_device = {
  643. .name = "ep93xx-i2s",
  644. .id = -1,
  645. .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
  646. .resource = ep93xx_i2s_resource,
  647. };
  648. static struct platform_device ep93xx_pcm_device = {
  649. .name = "ep93xx-pcm-audio",
  650. .id = -1,
  651. };
  652. void __init ep93xx_register_i2s(void)
  653. {
  654. platform_device_register(&ep93xx_i2s_device);
  655. platform_device_register(&ep93xx_pcm_device);
  656. }
  657. #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
  658. EP93XX_SYSCON_DEVCFG_I2SONAC97)
  659. #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
  660. EP93XX_SYSCON_I2SCLKDIV_SPOL)
  661. int ep93xx_i2s_acquire(void)
  662. {
  663. unsigned val;
  664. ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
  665. EP93XX_SYSCON_DEVCFG_I2S_MASK);
  666. /*
  667. * This is potentially racy with the clock api for i2s_mclk, sclk and
  668. * lrclk. Since the i2s driver is the only user of those clocks we
  669. * rely on it to prevent parallel use of this function and the
  670. * clock api for the i2s clocks.
  671. */
  672. val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
  673. val &= ~EP93XX_I2SCLKDIV_MASK;
  674. val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
  675. ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
  676. return 0;
  677. }
  678. EXPORT_SYMBOL(ep93xx_i2s_acquire);
  679. void ep93xx_i2s_release(void)
  680. {
  681. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
  682. }
  683. EXPORT_SYMBOL(ep93xx_i2s_release);
  684. /*************************************************************************
  685. * EP93xx AC97 audio peripheral handling
  686. *************************************************************************/
  687. static struct resource ep93xx_ac97_resources[] = {
  688. {
  689. .start = EP93XX_AAC_PHYS_BASE,
  690. .end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
  691. .flags = IORESOURCE_MEM,
  692. },
  693. {
  694. .start = IRQ_EP93XX_AACINTR,
  695. .end = IRQ_EP93XX_AACINTR,
  696. .flags = IORESOURCE_IRQ,
  697. },
  698. };
  699. static struct platform_device ep93xx_ac97_device = {
  700. .name = "ep93xx-ac97",
  701. .id = -1,
  702. .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
  703. .resource = ep93xx_ac97_resources,
  704. };
  705. void __init ep93xx_register_ac97(void)
  706. {
  707. /*
  708. * Make sure that the AC97 pins are not used by I2S.
  709. */
  710. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
  711. platform_device_register(&ep93xx_ac97_device);
  712. platform_device_register(&ep93xx_pcm_device);
  713. }
  714. void __init ep93xx_init_devices(void)
  715. {
  716. /* Disallow access to MaverickCrunch initially */
  717. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
  718. /* Get the GPIO working early, other devices need it */
  719. platform_device_register(&ep93xx_gpio_device);
  720. amba_device_register(&uart1_device, &iomem_resource);
  721. amba_device_register(&uart2_device, &iomem_resource);
  722. amba_device_register(&uart3_device, &iomem_resource);
  723. platform_device_register(&ep93xx_rtc_device);
  724. platform_device_register(&ep93xx_ohci_device);
  725. platform_device_register(&ep93xx_leds);
  726. }
  727. void ep93xx_restart(char mode, const char *cmd)
  728. {
  729. /*
  730. * Set then clear the SWRST bit to initiate a software reset
  731. */
  732. ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
  733. ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
  734. while (1)
  735. ;
  736. }