board-dt.c 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124
  1. /*
  2. * Setup code for AT91SAM Evaluation Kits with Device Tree support
  3. *
  4. * Covers: * AT91SAM9G45-EKES board
  5. * * AT91SAM9M10-EKES board
  6. * * AT91SAM9M10G45-EK board
  7. *
  8. * Copyright (C) 2011 Atmel,
  9. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  10. *
  11. * Licensed under GPLv2 or later.
  12. */
  13. #include <linux/types.h>
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/gpio.h>
  17. #include <linux/irqdomain.h>
  18. #include <linux/of_irq.h>
  19. #include <linux/of_platform.h>
  20. #include <mach/hardware.h>
  21. #include <mach/board.h>
  22. #include <mach/system_rev.h>
  23. #include <mach/at91sam9_smc.h>
  24. #include <asm/setup.h>
  25. #include <asm/irq.h>
  26. #include <asm/mach/arch.h>
  27. #include <asm/mach/map.h>
  28. #include <asm/mach/irq.h>
  29. #include "sam9_smc.h"
  30. #include "generic.h"
  31. static void __init ek_init_early(void)
  32. {
  33. /* Initialize processor: 12.000 MHz crystal */
  34. at91_initialize(12000000);
  35. /* DGBU on ttyS0. (Rx & Tx only) */
  36. at91_register_uart(0, 0, 0);
  37. /* set serial console to ttyS0 (ie, DBGU) */
  38. at91_set_serial_console(0);
  39. }
  40. /* det_pin is not connected */
  41. static struct atmel_nand_data __initdata ek_nand_data = {
  42. .ale = 21,
  43. .cle = 22,
  44. .det_pin = -EINVAL,
  45. .rdy_pin = AT91_PIN_PC8,
  46. .enable_pin = AT91_PIN_PC14,
  47. };
  48. static struct sam9_smc_config __initdata ek_nand_smc_config = {
  49. .ncs_read_setup = 0,
  50. .nrd_setup = 2,
  51. .ncs_write_setup = 0,
  52. .nwe_setup = 2,
  53. .ncs_read_pulse = 4,
  54. .nrd_pulse = 4,
  55. .ncs_write_pulse = 4,
  56. .nwe_pulse = 4,
  57. .read_cycle = 7,
  58. .write_cycle = 7,
  59. .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
  60. .tdf_cycles = 3,
  61. };
  62. static void __init ek_add_device_nand(void)
  63. {
  64. ek_nand_data.bus_width_16 = board_have_nand_16bit();
  65. /* setup bus-width (8 or 16) */
  66. if (ek_nand_data.bus_width_16)
  67. ek_nand_smc_config.mode |= AT91_SMC_DBW_16;
  68. else
  69. ek_nand_smc_config.mode |= AT91_SMC_DBW_8;
  70. /* configure chip-select 3 (NAND) */
  71. sam9_smc_configure(0, 3, &ek_nand_smc_config);
  72. at91_add_device_nand(&ek_nand_data);
  73. }
  74. static const struct of_device_id aic_of_match[] __initconst = {
  75. { .compatible = "atmel,at91rm9200-aic", },
  76. {},
  77. };
  78. static void __init at91_dt_init_irq(void)
  79. {
  80. irq_domain_generate_simple(aic_of_match, 0xfffff000, 0);
  81. at91_init_irq_default();
  82. }
  83. static void __init at91_dt_device_init(void)
  84. {
  85. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  86. /* NAND */
  87. ek_add_device_nand();
  88. }
  89. static const char *at91_dt_board_compat[] __initdata = {
  90. "atmel,at91sam9m10g45ek",
  91. "calao,usb-a9g20",
  92. NULL
  93. };
  94. DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
  95. /* Maintainer: Atmel */
  96. .timer = &at91sam926x_timer,
  97. .map_io = at91_map_io,
  98. .init_early = ek_init_early,
  99. .init_irq = at91_dt_init_irq,
  100. .init_machine = at91_dt_device_init,
  101. .dt_compat = at91_dt_board_compat,
  102. MACHINE_END