tcm.c 8.1 KB

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  1. /*
  2. * Copyright (C) 2008-2009 ST-Ericsson AB
  3. * License terms: GNU General Public License (GPL) version 2
  4. * TCM memory handling for ARM systems
  5. *
  6. * Author: Linus Walleij <linus.walleij@stericsson.com>
  7. * Author: Rickard Andersson <rickard.andersson@stericsson.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/kernel.h>
  11. #include <linux/module.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/genalloc.h>
  15. #include <linux/string.h> /* memcpy */
  16. #include <asm/cputype.h>
  17. #include <asm/mach/map.h>
  18. #include <asm/memory.h>
  19. #include "tcm.h"
  20. static struct gen_pool *tcm_pool;
  21. static bool dtcm_present;
  22. static bool itcm_present;
  23. /* TCM section definitions from the linker */
  24. extern char __itcm_start, __sitcm_text, __eitcm_text;
  25. extern char __dtcm_start, __sdtcm_data, __edtcm_data;
  26. /* These will be increased as we run */
  27. u32 dtcm_end = DTCM_OFFSET;
  28. u32 itcm_end = ITCM_OFFSET;
  29. /*
  30. * TCM memory resources
  31. */
  32. static struct resource dtcm_res = {
  33. .name = "DTCM RAM",
  34. .start = DTCM_OFFSET,
  35. .end = DTCM_OFFSET,
  36. .flags = IORESOURCE_MEM
  37. };
  38. static struct resource itcm_res = {
  39. .name = "ITCM RAM",
  40. .start = ITCM_OFFSET,
  41. .end = ITCM_OFFSET,
  42. .flags = IORESOURCE_MEM
  43. };
  44. static struct map_desc dtcm_iomap[] __initdata = {
  45. {
  46. .virtual = DTCM_OFFSET,
  47. .pfn = __phys_to_pfn(DTCM_OFFSET),
  48. .length = 0,
  49. .type = MT_MEMORY_DTCM
  50. }
  51. };
  52. static struct map_desc itcm_iomap[] __initdata = {
  53. {
  54. .virtual = ITCM_OFFSET,
  55. .pfn = __phys_to_pfn(ITCM_OFFSET),
  56. .length = 0,
  57. .type = MT_MEMORY_ITCM
  58. }
  59. };
  60. /*
  61. * Allocate a chunk of TCM memory
  62. */
  63. void *tcm_alloc(size_t len)
  64. {
  65. unsigned long vaddr;
  66. if (!tcm_pool)
  67. return NULL;
  68. vaddr = gen_pool_alloc(tcm_pool, len);
  69. if (!vaddr)
  70. return NULL;
  71. return (void *) vaddr;
  72. }
  73. EXPORT_SYMBOL(tcm_alloc);
  74. /*
  75. * Free a chunk of TCM memory
  76. */
  77. void tcm_free(void *addr, size_t len)
  78. {
  79. gen_pool_free(tcm_pool, (unsigned long) addr, len);
  80. }
  81. EXPORT_SYMBOL(tcm_free);
  82. bool tcm_dtcm_present(void)
  83. {
  84. return dtcm_present;
  85. }
  86. EXPORT_SYMBOL(tcm_dtcm_present);
  87. bool tcm_itcm_present(void)
  88. {
  89. return itcm_present;
  90. }
  91. EXPORT_SYMBOL(tcm_itcm_present);
  92. static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks,
  93. u32 *offset)
  94. {
  95. const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128,
  96. 256, 512, 1024, -1, -1, -1, -1 };
  97. u32 tcm_region;
  98. int tcm_size;
  99. /*
  100. * If there are more than one TCM bank of this type,
  101. * select the TCM bank to operate on in the TCM selection
  102. * register.
  103. */
  104. if (banks > 1)
  105. asm("mcr p15, 0, %0, c9, c2, 0"
  106. : /* No output operands */
  107. : "r" (bank));
  108. /* Read the special TCM region register c9, 0 */
  109. if (!type)
  110. asm("mrc p15, 0, %0, c9, c1, 0"
  111. : "=r" (tcm_region));
  112. else
  113. asm("mrc p15, 0, %0, c9, c1, 1"
  114. : "=r" (tcm_region));
  115. tcm_size = tcm_sizes[(tcm_region >> 2) & 0x0f];
  116. if (tcm_size < 0) {
  117. pr_err("CPU: %sTCM%d of unknown size\n",
  118. type ? "I" : "D", bank);
  119. return -EINVAL;
  120. } else if (tcm_size > 32) {
  121. pr_err("CPU: %sTCM%d larger than 32k found\n",
  122. type ? "I" : "D", bank);
  123. return -EINVAL;
  124. } else {
  125. pr_info("CPU: found %sTCM%d %dk @ %08x, %senabled\n",
  126. type ? "I" : "D",
  127. bank,
  128. tcm_size,
  129. (tcm_region & 0xfffff000U),
  130. (tcm_region & 1) ? "" : "not ");
  131. }
  132. /* Not much fun you can do with a size 0 bank */
  133. if (tcm_size == 0)
  134. return 0;
  135. /* Force move the TCM bank to where we want it, enable */
  136. tcm_region = *offset | (tcm_region & 0x00000ffeU) | 1;
  137. if (!type)
  138. asm("mcr p15, 0, %0, c9, c1, 0"
  139. : /* No output operands */
  140. : "r" (tcm_region));
  141. else
  142. asm("mcr p15, 0, %0, c9, c1, 1"
  143. : /* No output operands */
  144. : "r" (tcm_region));
  145. /* Increase offset */
  146. *offset += (tcm_size << 10);
  147. pr_info("CPU: moved %sTCM%d %dk to %08x, enabled\n",
  148. type ? "I" : "D",
  149. bank,
  150. tcm_size,
  151. (tcm_region & 0xfffff000U));
  152. return 0;
  153. }
  154. /*
  155. * This initializes the TCM memory
  156. */
  157. void __init tcm_init(void)
  158. {
  159. u32 tcm_status;
  160. u8 dtcm_banks;
  161. u8 itcm_banks;
  162. size_t dtcm_code_sz = &__edtcm_data - &__sdtcm_data;
  163. size_t itcm_code_sz = &__eitcm_text - &__sitcm_text;
  164. char *start;
  165. char *end;
  166. char *ram;
  167. int ret;
  168. int i;
  169. /*
  170. * Prior to ARMv5 there is no TCM, and trying to read the status
  171. * register will hang the processor.
  172. */
  173. if (cpu_architecture() < CPU_ARCH_ARMv5) {
  174. if (dtcm_code_sz || itcm_code_sz)
  175. pr_info("CPU TCM: %u bytes of DTCM and %u bytes of "
  176. "ITCM code compiled in, but no TCM present "
  177. "in pre-v5 CPU\n", dtcm_code_sz, itcm_code_sz);
  178. return;
  179. }
  180. tcm_status = read_cpuid_tcmstatus();
  181. dtcm_banks = (tcm_status >> 16) & 0x03;
  182. itcm_banks = (tcm_status & 0x03);
  183. /* Values greater than 2 for D/ITCM banks are "reserved" */
  184. if (dtcm_banks > 2)
  185. dtcm_banks = 0;
  186. if (itcm_banks > 2)
  187. itcm_banks = 0;
  188. /* Setup DTCM if present */
  189. if (dtcm_banks > 0) {
  190. for (i = 0; i < dtcm_banks; i++) {
  191. ret = setup_tcm_bank(0, i, dtcm_banks, &dtcm_end);
  192. if (ret)
  193. return;
  194. }
  195. /* This means you compiled more code than fits into DTCM */
  196. if (dtcm_code_sz > (dtcm_end - DTCM_OFFSET)) {
  197. pr_info("CPU DTCM: %u bytes of code compiled to "
  198. "DTCM but only %lu bytes of DTCM present\n",
  199. dtcm_code_sz, (dtcm_end - DTCM_OFFSET));
  200. goto no_dtcm;
  201. }
  202. dtcm_res.end = dtcm_end - 1;
  203. request_resource(&iomem_resource, &dtcm_res);
  204. dtcm_iomap[0].length = dtcm_end - DTCM_OFFSET;
  205. iotable_init(dtcm_iomap, 1);
  206. /* Copy data from RAM to DTCM */
  207. start = &__sdtcm_data;
  208. end = &__edtcm_data;
  209. ram = &__dtcm_start;
  210. memcpy(start, ram, dtcm_code_sz);
  211. pr_debug("CPU DTCM: copied data from %p - %p\n",
  212. start, end);
  213. dtcm_present = true;
  214. } else if (dtcm_code_sz) {
  215. pr_info("CPU DTCM: %u bytes of code compiled to DTCM but no "
  216. "DTCM banks present in CPU\n", dtcm_code_sz);
  217. }
  218. no_dtcm:
  219. /* Setup ITCM if present */
  220. if (itcm_banks > 0) {
  221. for (i = 0; i < itcm_banks; i++) {
  222. ret = setup_tcm_bank(1, i, itcm_banks, &itcm_end);
  223. if (ret)
  224. return;
  225. }
  226. /* This means you compiled more code than fits into ITCM */
  227. if (itcm_code_sz > (itcm_end - ITCM_OFFSET)) {
  228. pr_info("CPU ITCM: %u bytes of code compiled to "
  229. "ITCM but only %lu bytes of ITCM present\n",
  230. itcm_code_sz, (itcm_end - ITCM_OFFSET));
  231. return;
  232. }
  233. itcm_res.end = itcm_end - 1;
  234. request_resource(&iomem_resource, &itcm_res);
  235. itcm_iomap[0].length = itcm_end - ITCM_OFFSET;
  236. iotable_init(itcm_iomap, 1);
  237. /* Copy code from RAM to ITCM */
  238. start = &__sitcm_text;
  239. end = &__eitcm_text;
  240. ram = &__itcm_start;
  241. memcpy(start, ram, itcm_code_sz);
  242. pr_debug("CPU ITCM: copied code from %p - %p\n",
  243. start, end);
  244. itcm_present = true;
  245. } else if (itcm_code_sz) {
  246. pr_info("CPU ITCM: %u bytes of code compiled to ITCM but no "
  247. "ITCM banks present in CPU\n", itcm_code_sz);
  248. }
  249. }
  250. /*
  251. * This creates the TCM memory pool and has to be done later,
  252. * during the core_initicalls, since the allocator is not yet
  253. * up and running when the first initialization runs.
  254. */
  255. static int __init setup_tcm_pool(void)
  256. {
  257. u32 dtcm_pool_start = (u32) &__edtcm_data;
  258. u32 itcm_pool_start = (u32) &__eitcm_text;
  259. int ret;
  260. /*
  261. * Set up malloc pool, 2^2 = 4 bytes granularity since
  262. * the TCM is sometimes just 4 KiB. NB: pages and cache
  263. * line alignments does not matter in TCM!
  264. */
  265. tcm_pool = gen_pool_create(2, -1);
  266. pr_debug("Setting up TCM memory pool\n");
  267. /* Add the rest of DTCM to the TCM pool */
  268. if (dtcm_present) {
  269. if (dtcm_pool_start < dtcm_end) {
  270. ret = gen_pool_add(tcm_pool, dtcm_pool_start,
  271. dtcm_end - dtcm_pool_start, -1);
  272. if (ret) {
  273. pr_err("CPU DTCM: could not add DTCM " \
  274. "remainder to pool!\n");
  275. return ret;
  276. }
  277. pr_debug("CPU DTCM: Added %08x bytes @ %08x to " \
  278. "the TCM memory pool\n",
  279. dtcm_end - dtcm_pool_start,
  280. dtcm_pool_start);
  281. }
  282. }
  283. /* Add the rest of ITCM to the TCM pool */
  284. if (itcm_present) {
  285. if (itcm_pool_start < itcm_end) {
  286. ret = gen_pool_add(tcm_pool, itcm_pool_start,
  287. itcm_end - itcm_pool_start, -1);
  288. if (ret) {
  289. pr_err("CPU ITCM: could not add ITCM " \
  290. "remainder to pool!\n");
  291. return ret;
  292. }
  293. pr_debug("CPU ITCM: Added %08x bytes @ %08x to " \
  294. "the TCM memory pool\n",
  295. itcm_end - itcm_pool_start,
  296. itcm_pool_start);
  297. }
  298. }
  299. return 0;
  300. }
  301. core_initcall(setup_tcm_pool);