iwl3945-base.c 118 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #define DRV_NAME "iwl3945"
  45. #include "iwl-fh.h"
  46. #include "iwl-3945-fh.h"
  47. #include "iwl-commands.h"
  48. #include "iwl-sta.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .sw_crypto = 1,
  79. .restart_fw = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /**
  83. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  84. * @priv: eeprom and antenna fields are used to determine antenna flags
  85. *
  86. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  87. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  88. *
  89. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  90. * IWL_ANTENNA_MAIN - Force MAIN antenna
  91. * IWL_ANTENNA_AUX - Force AUX antenna
  92. */
  93. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  94. {
  95. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  96. switch (iwl3945_mod_params.antenna) {
  97. case IWL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IWL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IWL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  110. iwl3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  114. struct ieee80211_key_conf *keyconf,
  115. u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == priv->hw_params.bcast_sta_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&priv->sta_lock, flags);
  128. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  129. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  131. keyconf->keylen);
  132. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  133. keyconf->keylen);
  134. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  135. == STA_KEY_FLG_NO_ENC)
  136. priv->stations[sta_id].sta.key.key_offset =
  137. iwl_get_free_ucode_key_index(priv);
  138. /* else, we are overriding an existing key => no need to allocated room
  139. * in uCode. */
  140. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  141. "no space for a new key");
  142. priv->stations[sta_id].sta.key.key_flags = key_flags;
  143. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  144. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  145. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  146. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  147. spin_unlock_irqrestore(&priv->sta_lock, flags);
  148. return ret;
  149. }
  150. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  151. struct ieee80211_key_conf *keyconf,
  152. u8 sta_id)
  153. {
  154. return -EOPNOTSUPP;
  155. }
  156. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  157. struct ieee80211_key_conf *keyconf,
  158. u8 sta_id)
  159. {
  160. return -EOPNOTSUPP;
  161. }
  162. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  163. {
  164. unsigned long flags;
  165. spin_lock_irqsave(&priv->sta_lock, flags);
  166. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  167. memset(&priv->stations[sta_id].sta.key, 0,
  168. sizeof(struct iwl4965_keyinfo));
  169. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  170. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  171. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  172. spin_unlock_irqrestore(&priv->sta_lock, flags);
  173. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  174. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  175. return 0;
  176. }
  177. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  178. struct ieee80211_key_conf *keyconf, u8 sta_id)
  179. {
  180. int ret = 0;
  181. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  182. switch (keyconf->alg) {
  183. case ALG_CCMP:
  184. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  185. break;
  186. case ALG_TKIP:
  187. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  188. break;
  189. case ALG_WEP:
  190. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  191. break;
  192. default:
  193. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  194. ret = -EINVAL;
  195. }
  196. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  197. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  198. sta_id, ret);
  199. return ret;
  200. }
  201. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  202. {
  203. int ret = -EOPNOTSUPP;
  204. return ret;
  205. }
  206. static int iwl3945_set_static_key(struct iwl_priv *priv,
  207. struct ieee80211_key_conf *key)
  208. {
  209. if (key->alg == ALG_WEP)
  210. return -EOPNOTSUPP;
  211. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  212. return -EINVAL;
  213. }
  214. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  215. {
  216. struct list_head *element;
  217. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  218. priv->frames_count);
  219. while (!list_empty(&priv->free_frames)) {
  220. element = priv->free_frames.next;
  221. list_del(element);
  222. kfree(list_entry(element, struct iwl3945_frame, list));
  223. priv->frames_count--;
  224. }
  225. if (priv->frames_count) {
  226. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  227. priv->frames_count);
  228. priv->frames_count = 0;
  229. }
  230. }
  231. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  232. {
  233. struct iwl3945_frame *frame;
  234. struct list_head *element;
  235. if (list_empty(&priv->free_frames)) {
  236. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  237. if (!frame) {
  238. IWL_ERR(priv, "Could not allocate frame!\n");
  239. return NULL;
  240. }
  241. priv->frames_count++;
  242. return frame;
  243. }
  244. element = priv->free_frames.next;
  245. list_del(element);
  246. return list_entry(element, struct iwl3945_frame, list);
  247. }
  248. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  249. {
  250. memset(frame, 0, sizeof(*frame));
  251. list_add(&frame->list, &priv->free_frames);
  252. }
  253. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  254. struct ieee80211_hdr *hdr,
  255. int left)
  256. {
  257. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  258. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  259. (priv->iw_mode != NL80211_IFTYPE_AP)))
  260. return 0;
  261. if (priv->ibss_beacon->len > left)
  262. return 0;
  263. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  264. return priv->ibss_beacon->len;
  265. }
  266. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  267. {
  268. struct iwl3945_frame *frame;
  269. unsigned int frame_size;
  270. int rc;
  271. u8 rate;
  272. frame = iwl3945_get_free_frame(priv);
  273. if (!frame) {
  274. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  275. "command.\n");
  276. return -ENOMEM;
  277. }
  278. rate = iwl_rate_get_lowest_plcp(priv);
  279. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  280. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  281. &frame->u.cmd[0]);
  282. iwl3945_free_frame(priv, frame);
  283. return rc;
  284. }
  285. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  286. {
  287. if (priv->shared_virt)
  288. pci_free_consistent(priv->pci_dev,
  289. sizeof(struct iwl3945_shared),
  290. priv->shared_virt,
  291. priv->shared_phys);
  292. }
  293. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  294. struct ieee80211_tx_info *info,
  295. struct iwl_device_cmd *cmd,
  296. struct sk_buff *skb_frag,
  297. int sta_id)
  298. {
  299. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  300. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  301. switch (keyinfo->alg) {
  302. case ALG_CCMP:
  303. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  304. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  305. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  306. break;
  307. case ALG_TKIP:
  308. break;
  309. case ALG_WEP:
  310. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  311. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  312. if (keyinfo->keylen == 13)
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  315. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  316. "with key %d\n", info->control.hw_key->hw_key_idx);
  317. break;
  318. default:
  319. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  320. break;
  321. }
  322. }
  323. /*
  324. * handle build REPLY_TX command notification.
  325. */
  326. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  327. struct iwl_device_cmd *cmd,
  328. struct ieee80211_tx_info *info,
  329. struct ieee80211_hdr *hdr, u8 std_id)
  330. {
  331. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  332. __le32 tx_flags = tx_cmd->tx_flags;
  333. __le16 fc = hdr->frame_control;
  334. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  335. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  336. tx_flags |= TX_CMD_FLG_ACK_MSK;
  337. if (ieee80211_is_mgmt(fc))
  338. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  339. if (ieee80211_is_probe_resp(fc) &&
  340. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  341. tx_flags |= TX_CMD_FLG_TSF_MSK;
  342. } else {
  343. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. }
  346. tx_cmd->sta_id = std_id;
  347. if (ieee80211_has_morefrags(fc))
  348. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  349. if (ieee80211_is_data_qos(fc)) {
  350. u8 *qc = ieee80211_get_qos_ctl(hdr);
  351. tx_cmd->tid_tspec = qc[0] & 0xf;
  352. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  353. } else {
  354. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  355. }
  356. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  357. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  358. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  359. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  360. if (ieee80211_is_mgmt(fc)) {
  361. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  362. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  363. else
  364. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  365. } else {
  366. tx_cmd->timeout.pm_frame_timeout = 0;
  367. }
  368. tx_cmd->driver_txop = 0;
  369. tx_cmd->tx_flags = tx_flags;
  370. tx_cmd->next_frame_len = 0;
  371. }
  372. /*
  373. * start REPLY_TX command process
  374. */
  375. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  376. {
  377. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  378. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  379. struct iwl3945_tx_cmd *tx_cmd;
  380. struct iwl_tx_queue *txq = NULL;
  381. struct iwl_queue *q = NULL;
  382. struct iwl_device_cmd *out_cmd;
  383. struct iwl_cmd_meta *out_meta;
  384. dma_addr_t phys_addr;
  385. dma_addr_t txcmd_phys;
  386. int txq_id = skb_get_queue_mapping(skb);
  387. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  388. u8 id;
  389. u8 unicast;
  390. u8 sta_id;
  391. u8 tid = 0;
  392. u16 seq_number = 0;
  393. __le16 fc;
  394. u8 wait_write_ptr = 0;
  395. u8 *qc = NULL;
  396. unsigned long flags;
  397. int rc;
  398. spin_lock_irqsave(&priv->lock, flags);
  399. if (iwl_is_rfkill(priv)) {
  400. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  401. goto drop_unlock;
  402. }
  403. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  404. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  405. goto drop_unlock;
  406. }
  407. unicast = !is_multicast_ether_addr(hdr->addr1);
  408. id = 0;
  409. fc = hdr->frame_control;
  410. #ifdef CONFIG_IWLWIFI_DEBUG
  411. if (ieee80211_is_auth(fc))
  412. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  413. else if (ieee80211_is_assoc_req(fc))
  414. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  415. else if (ieee80211_is_reassoc_req(fc))
  416. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  417. #endif
  418. /* drop all non-injected data frame if we are not associated */
  419. if (ieee80211_is_data(fc) &&
  420. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  421. (!iwl_is_associated(priv) ||
  422. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  423. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  424. goto drop_unlock;
  425. }
  426. spin_unlock_irqrestore(&priv->lock, flags);
  427. hdr_len = ieee80211_hdrlen(fc);
  428. /* Find (or create) index into station table for destination station */
  429. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  430. sta_id = priv->hw_params.bcast_sta_id;
  431. else
  432. sta_id = iwl_get_sta_id(priv, hdr);
  433. if (sta_id == IWL_INVALID_STATION) {
  434. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  435. hdr->addr1);
  436. goto drop;
  437. }
  438. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  439. if (ieee80211_is_data_qos(fc)) {
  440. qc = ieee80211_get_qos_ctl(hdr);
  441. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  442. if (unlikely(tid >= MAX_TID_COUNT))
  443. goto drop;
  444. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  445. IEEE80211_SCTL_SEQ;
  446. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  447. (hdr->seq_ctrl &
  448. cpu_to_le16(IEEE80211_SCTL_FRAG));
  449. seq_number += 0x10;
  450. }
  451. /* Descriptor for chosen Tx queue */
  452. txq = &priv->txq[txq_id];
  453. q = &txq->q;
  454. spin_lock_irqsave(&priv->lock, flags);
  455. idx = get_cmd_index(q, q->write_ptr, 0);
  456. /* Set up driver data for this TFD */
  457. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  458. txq->txb[q->write_ptr].skb[0] = skb;
  459. /* Init first empty entry in queue's array of Tx/cmd buffers */
  460. out_cmd = txq->cmd[idx];
  461. out_meta = &txq->meta[idx];
  462. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  463. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  464. memset(tx_cmd, 0, sizeof(*tx_cmd));
  465. /*
  466. * Set up the Tx-command (not MAC!) header.
  467. * Store the chosen Tx queue and TFD index within the sequence field;
  468. * after Tx, uCode's Tx response will return this value so driver can
  469. * locate the frame within the tx queue and do post-tx processing.
  470. */
  471. out_cmd->hdr.cmd = REPLY_TX;
  472. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  473. INDEX_TO_SEQ(q->write_ptr)));
  474. /* Copy MAC header from skb into command buffer */
  475. memcpy(tx_cmd->hdr, hdr, hdr_len);
  476. if (info->control.hw_key)
  477. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  478. /* TODO need this for burst mode later on */
  479. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  480. /* set is_hcca to 0; it probably will never be implemented */
  481. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  482. /* Total # bytes to be transmitted */
  483. len = (u16)skb->len;
  484. tx_cmd->len = cpu_to_le16(len);
  485. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  486. iwl_update_stats(priv, true, fc, len);
  487. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  488. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  489. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  490. txq->need_update = 1;
  491. if (qc)
  492. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  493. } else {
  494. wait_write_ptr = 1;
  495. txq->need_update = 0;
  496. }
  497. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  498. le16_to_cpu(out_cmd->hdr.sequence));
  499. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  500. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  501. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  502. ieee80211_hdrlen(fc));
  503. /*
  504. * Use the first empty entry in this queue's command buffer array
  505. * to contain the Tx command and MAC header concatenated together
  506. * (payload data will be in another buffer).
  507. * Size of this varies, due to varying MAC header length.
  508. * If end is not dword aligned, we'll have 2 extra bytes at the end
  509. * of the MAC header (device reads on dword boundaries).
  510. * We'll tell device about this padding later.
  511. */
  512. len = sizeof(struct iwl3945_tx_cmd) +
  513. sizeof(struct iwl_cmd_header) + hdr_len;
  514. len_org = len;
  515. len = (len + 3) & ~3;
  516. if (len_org != len)
  517. len_org = 1;
  518. else
  519. len_org = 0;
  520. /* Physical address of this Tx command's header (not MAC header!),
  521. * within command buffer array. */
  522. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  523. len, PCI_DMA_TODEVICE);
  524. /* we do not map meta data ... so we can safely access address to
  525. * provide to unmap command*/
  526. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  527. pci_unmap_len_set(out_meta, len, len);
  528. /* Add buffer containing Tx command and MAC(!) header to TFD's
  529. * first entry */
  530. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  531. txcmd_phys, len, 1, 0);
  532. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  533. * if any (802.11 null frames have no payload). */
  534. len = skb->len - hdr_len;
  535. if (len) {
  536. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  537. len, PCI_DMA_TODEVICE);
  538. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  539. phys_addr, len,
  540. 0, U32_PAD(len));
  541. }
  542. /* Tell device the write index *just past* this latest filled TFD */
  543. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  544. rc = iwl_txq_update_write_ptr(priv, txq);
  545. spin_unlock_irqrestore(&priv->lock, flags);
  546. if (rc)
  547. return rc;
  548. if ((iwl_queue_space(q) < q->high_mark)
  549. && priv->mac80211_registered) {
  550. if (wait_write_ptr) {
  551. spin_lock_irqsave(&priv->lock, flags);
  552. txq->need_update = 1;
  553. iwl_txq_update_write_ptr(priv, txq);
  554. spin_unlock_irqrestore(&priv->lock, flags);
  555. }
  556. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  557. }
  558. return 0;
  559. drop_unlock:
  560. spin_unlock_irqrestore(&priv->lock, flags);
  561. drop:
  562. return -1;
  563. }
  564. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  565. #include "iwl-spectrum.h"
  566. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  567. #define BEACON_TIME_MASK_HIGH 0xFF000000
  568. #define TIME_UNIT 1024
  569. /*
  570. * extended beacon time format
  571. * time in usec will be changed into a 32-bit value in 8:24 format
  572. * the high 1 byte is the beacon counts
  573. * the lower 3 bytes is the time in usec within one beacon interval
  574. */
  575. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  576. {
  577. u32 quot;
  578. u32 rem;
  579. u32 interval = beacon_interval * 1024;
  580. if (!interval || !usec)
  581. return 0;
  582. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  583. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  584. return (quot << 24) + rem;
  585. }
  586. /* base is usually what we get from ucode with each received frame,
  587. * the same as HW timer counter counting down
  588. */
  589. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  590. {
  591. u32 base_low = base & BEACON_TIME_MASK_LOW;
  592. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  593. u32 interval = beacon_interval * TIME_UNIT;
  594. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  595. (addon & BEACON_TIME_MASK_HIGH);
  596. if (base_low > addon_low)
  597. res += base_low - addon_low;
  598. else if (base_low < addon_low) {
  599. res += interval + base_low - addon_low;
  600. res += (1 << 24);
  601. } else
  602. res += (1 << 24);
  603. return cpu_to_le32(res);
  604. }
  605. static int iwl3945_get_measurement(struct iwl_priv *priv,
  606. struct ieee80211_measurement_params *params,
  607. u8 type)
  608. {
  609. struct iwl_spectrum_cmd spectrum;
  610. struct iwl_rx_packet *pkt;
  611. struct iwl_host_cmd cmd = {
  612. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  613. .data = (void *)&spectrum,
  614. .flags = CMD_WANT_SKB,
  615. };
  616. u32 add_time = le64_to_cpu(params->start_time);
  617. int rc;
  618. int spectrum_resp_status;
  619. int duration = le16_to_cpu(params->duration);
  620. if (iwl_is_associated(priv))
  621. add_time =
  622. iwl3945_usecs_to_beacons(
  623. le64_to_cpu(params->start_time) - priv->last_tsf,
  624. le16_to_cpu(priv->rxon_timing.beacon_interval));
  625. memset(&spectrum, 0, sizeof(spectrum));
  626. spectrum.channel_count = cpu_to_le16(1);
  627. spectrum.flags =
  628. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  629. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  630. cmd.len = sizeof(spectrum);
  631. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  632. if (iwl_is_associated(priv))
  633. spectrum.start_time =
  634. iwl3945_add_beacon_time(priv->last_beacon_time,
  635. add_time,
  636. le16_to_cpu(priv->rxon_timing.beacon_interval));
  637. else
  638. spectrum.start_time = 0;
  639. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  640. spectrum.channels[0].channel = params->channel;
  641. spectrum.channels[0].type = type;
  642. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  643. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  644. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  645. rc = iwl_send_cmd_sync(priv, &cmd);
  646. if (rc)
  647. return rc;
  648. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  649. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  650. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  651. rc = -EIO;
  652. }
  653. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  654. switch (spectrum_resp_status) {
  655. case 0: /* Command will be handled */
  656. if (pkt->u.spectrum.id != 0xff) {
  657. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  658. pkt->u.spectrum.id);
  659. priv->measurement_status &= ~MEASUREMENT_READY;
  660. }
  661. priv->measurement_status |= MEASUREMENT_ACTIVE;
  662. rc = 0;
  663. break;
  664. case 1: /* Command will not be handled */
  665. rc = -EAGAIN;
  666. break;
  667. }
  668. free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
  669. return rc;
  670. }
  671. #endif
  672. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  673. struct iwl_rx_mem_buffer *rxb)
  674. {
  675. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  676. struct iwl_alive_resp *palive;
  677. struct delayed_work *pwork;
  678. palive = &pkt->u.alive_frame;
  679. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  680. "0x%01X 0x%01X\n",
  681. palive->is_valid, palive->ver_type,
  682. palive->ver_subtype);
  683. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  684. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  685. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  686. sizeof(struct iwl_alive_resp));
  687. pwork = &priv->init_alive_start;
  688. } else {
  689. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  690. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  691. sizeof(struct iwl_alive_resp));
  692. pwork = &priv->alive_start;
  693. iwl3945_disable_events(priv);
  694. }
  695. /* We delay the ALIVE response by 5ms to
  696. * give the HW RF Kill time to activate... */
  697. if (palive->is_valid == UCODE_VALID_OK)
  698. queue_delayed_work(priv->workqueue, pwork,
  699. msecs_to_jiffies(5));
  700. else
  701. IWL_WARN(priv, "uCode did not respond OK.\n");
  702. }
  703. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  704. struct iwl_rx_mem_buffer *rxb)
  705. {
  706. #ifdef CONFIG_IWLWIFI_DEBUG
  707. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  708. #endif
  709. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  710. return;
  711. }
  712. static void iwl3945_bg_beacon_update(struct work_struct *work)
  713. {
  714. struct iwl_priv *priv =
  715. container_of(work, struct iwl_priv, beacon_update);
  716. struct sk_buff *beacon;
  717. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  718. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  719. if (!beacon) {
  720. IWL_ERR(priv, "update beacon failed\n");
  721. return;
  722. }
  723. mutex_lock(&priv->mutex);
  724. /* new beacon skb is allocated every time; dispose previous.*/
  725. if (priv->ibss_beacon)
  726. dev_kfree_skb(priv->ibss_beacon);
  727. priv->ibss_beacon = beacon;
  728. mutex_unlock(&priv->mutex);
  729. iwl3945_send_beacon_cmd(priv);
  730. }
  731. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  732. struct iwl_rx_mem_buffer *rxb)
  733. {
  734. #ifdef CONFIG_IWLWIFI_DEBUG
  735. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  736. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  737. u8 rate = beacon->beacon_notify_hdr.rate;
  738. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  739. "tsf %d %d rate %d\n",
  740. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  741. beacon->beacon_notify_hdr.failure_frame,
  742. le32_to_cpu(beacon->ibss_mgr_status),
  743. le32_to_cpu(beacon->high_tsf),
  744. le32_to_cpu(beacon->low_tsf), rate);
  745. #endif
  746. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  747. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  748. queue_work(priv->workqueue, &priv->beacon_update);
  749. }
  750. /* Handle notification from uCode that card's power state is changing
  751. * due to software, hardware, or critical temperature RFKILL */
  752. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  753. struct iwl_rx_mem_buffer *rxb)
  754. {
  755. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  756. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  757. unsigned long status = priv->status;
  758. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  759. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  760. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  761. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  762. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  763. if (flags & HW_CARD_DISABLED)
  764. set_bit(STATUS_RF_KILL_HW, &priv->status);
  765. else
  766. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  767. iwl_scan_cancel(priv);
  768. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  769. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  770. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  771. test_bit(STATUS_RF_KILL_HW, &priv->status));
  772. else
  773. wake_up_interruptible(&priv->wait_command_queue);
  774. }
  775. /**
  776. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  777. *
  778. * Setup the RX handlers for each of the reply types sent from the uCode
  779. * to the host.
  780. *
  781. * This function chains into the hardware specific files for them to setup
  782. * any hardware specific handlers as well.
  783. */
  784. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  785. {
  786. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  787. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  788. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  789. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  790. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  791. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  792. iwl_rx_pm_debug_statistics_notif;
  793. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  794. /*
  795. * The same handler is used for both the REPLY to a discrete
  796. * statistics request from the host as well as for the periodic
  797. * statistics notifications (after received beacons) from the uCode.
  798. */
  799. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  800. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  801. iwl_setup_spectrum_handlers(priv);
  802. iwl_setup_rx_scan_handlers(priv);
  803. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  804. /* Set up hardware specific Rx handlers */
  805. iwl3945_hw_rx_handler_setup(priv);
  806. }
  807. /************************** RX-FUNCTIONS ****************************/
  808. /*
  809. * Rx theory of operation
  810. *
  811. * The host allocates 32 DMA target addresses and passes the host address
  812. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  813. * 0 to 31
  814. *
  815. * Rx Queue Indexes
  816. * The host/firmware share two index registers for managing the Rx buffers.
  817. *
  818. * The READ index maps to the first position that the firmware may be writing
  819. * to -- the driver can read up to (but not including) this position and get
  820. * good data.
  821. * The READ index is managed by the firmware once the card is enabled.
  822. *
  823. * The WRITE index maps to the last position the driver has read from -- the
  824. * position preceding WRITE is the last slot the firmware can place a packet.
  825. *
  826. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  827. * WRITE = READ.
  828. *
  829. * During initialization, the host sets up the READ queue position to the first
  830. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  831. *
  832. * When the firmware places a packet in a buffer, it will advance the READ index
  833. * and fire the RX interrupt. The driver can then query the READ index and
  834. * process as many packets as possible, moving the WRITE index forward as it
  835. * resets the Rx queue buffers with new memory.
  836. *
  837. * The management in the driver is as follows:
  838. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  839. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  840. * to replenish the iwl->rxq->rx_free.
  841. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  842. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  843. * 'processed' and 'read' driver indexes as well)
  844. * + A received packet is processed and handed to the kernel network stack,
  845. * detached from the iwl->rxq. The driver 'processed' index is updated.
  846. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  847. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  848. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  849. * were enough free buffers and RX_STALLED is set it is cleared.
  850. *
  851. *
  852. * Driver sequence:
  853. *
  854. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  855. * iwl3945_rx_queue_restock
  856. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  857. * queue, updates firmware pointers, and updates
  858. * the WRITE index. If insufficient rx_free buffers
  859. * are available, schedules iwl3945_rx_replenish
  860. *
  861. * -- enable interrupts --
  862. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  863. * READ INDEX, detaching the SKB from the pool.
  864. * Moves the packet buffer from queue to rx_used.
  865. * Calls iwl3945_rx_queue_restock to refill any empty
  866. * slots.
  867. * ...
  868. *
  869. */
  870. /**
  871. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  872. */
  873. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  874. dma_addr_t dma_addr)
  875. {
  876. return cpu_to_le32((u32)dma_addr);
  877. }
  878. /**
  879. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  880. *
  881. * If there are slots in the RX queue that need to be restocked,
  882. * and we have free pre-allocated buffers, fill the ranks as much
  883. * as we can, pulling from rx_free.
  884. *
  885. * This moves the 'write' index forward to catch up with 'processed', and
  886. * also updates the memory address in the firmware to reference the new
  887. * target buffer.
  888. */
  889. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  890. {
  891. struct iwl_rx_queue *rxq = &priv->rxq;
  892. struct list_head *element;
  893. struct iwl_rx_mem_buffer *rxb;
  894. unsigned long flags;
  895. int write, rc;
  896. spin_lock_irqsave(&rxq->lock, flags);
  897. write = rxq->write & ~0x7;
  898. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  899. /* Get next free Rx buffer, remove from free list */
  900. element = rxq->rx_free.next;
  901. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  902. list_del(element);
  903. /* Point to Rx buffer via next RBD in circular buffer */
  904. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  905. rxq->queue[rxq->write] = rxb;
  906. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  907. rxq->free_count--;
  908. }
  909. spin_unlock_irqrestore(&rxq->lock, flags);
  910. /* If the pre-allocated buffer pool is dropping low, schedule to
  911. * refill it */
  912. if (rxq->free_count <= RX_LOW_WATERMARK)
  913. queue_work(priv->workqueue, &priv->rx_replenish);
  914. /* If we've added more space for the firmware to place data, tell it.
  915. * Increment device's write pointer in multiples of 8. */
  916. if ((rxq->write_actual != (rxq->write & ~0x7))
  917. || (abs(rxq->write - rxq->read) > 7)) {
  918. spin_lock_irqsave(&rxq->lock, flags);
  919. rxq->need_update = 1;
  920. spin_unlock_irqrestore(&rxq->lock, flags);
  921. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  922. if (rc)
  923. return rc;
  924. }
  925. return 0;
  926. }
  927. /**
  928. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  929. *
  930. * When moving to rx_free an SKB is allocated for the slot.
  931. *
  932. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  933. * This is called as a scheduled work item (except for during initialization)
  934. */
  935. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  936. {
  937. struct iwl_rx_queue *rxq = &priv->rxq;
  938. struct list_head *element;
  939. struct iwl_rx_mem_buffer *rxb;
  940. struct page *page;
  941. unsigned long flags;
  942. gfp_t gfp_mask = priority;
  943. while (1) {
  944. spin_lock_irqsave(&rxq->lock, flags);
  945. if (list_empty(&rxq->rx_used)) {
  946. spin_unlock_irqrestore(&rxq->lock, flags);
  947. return;
  948. }
  949. spin_unlock_irqrestore(&rxq->lock, flags);
  950. if (rxq->free_count > RX_LOW_WATERMARK)
  951. gfp_mask |= __GFP_NOWARN;
  952. if (priv->hw_params.rx_page_order > 0)
  953. gfp_mask |= __GFP_COMP;
  954. /* Alloc a new receive buffer */
  955. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  956. if (!page) {
  957. if (net_ratelimit())
  958. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  959. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  960. net_ratelimit())
  961. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  962. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  963. rxq->free_count);
  964. /* We don't reschedule replenish work here -- we will
  965. * call the restock method and if it still needs
  966. * more buffers it will schedule replenish */
  967. break;
  968. }
  969. spin_lock_irqsave(&rxq->lock, flags);
  970. if (list_empty(&rxq->rx_used)) {
  971. spin_unlock_irqrestore(&rxq->lock, flags);
  972. __free_pages(page, priv->hw_params.rx_page_order);
  973. return;
  974. }
  975. element = rxq->rx_used.next;
  976. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  977. list_del(element);
  978. spin_unlock_irqrestore(&rxq->lock, flags);
  979. rxb->page = page;
  980. /* Get physical address of RB/SKB */
  981. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  982. PAGE_SIZE << priv->hw_params.rx_page_order,
  983. PCI_DMA_FROMDEVICE);
  984. spin_lock_irqsave(&rxq->lock, flags);
  985. list_add_tail(&rxb->list, &rxq->rx_free);
  986. rxq->free_count++;
  987. priv->alloc_rxb_page++;
  988. spin_unlock_irqrestore(&rxq->lock, flags);
  989. }
  990. }
  991. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  992. {
  993. unsigned long flags;
  994. int i;
  995. spin_lock_irqsave(&rxq->lock, flags);
  996. INIT_LIST_HEAD(&rxq->rx_free);
  997. INIT_LIST_HEAD(&rxq->rx_used);
  998. /* Fill the rx_used queue with _all_ of the Rx buffers */
  999. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1000. /* In the reset function, these buffers may have been allocated
  1001. * to an SKB, so we need to unmap and free potential storage */
  1002. if (rxq->pool[i].page != NULL) {
  1003. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1004. PAGE_SIZE << priv->hw_params.rx_page_order,
  1005. PCI_DMA_FROMDEVICE);
  1006. priv->alloc_rxb_page--;
  1007. __free_pages(rxq->pool[i].page,
  1008. priv->hw_params.rx_page_order);
  1009. rxq->pool[i].page = NULL;
  1010. }
  1011. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1012. }
  1013. /* Set us so that we have processed and used all buffers, but have
  1014. * not restocked the Rx queue with fresh buffers */
  1015. rxq->read = rxq->write = 0;
  1016. rxq->write_actual = 0;
  1017. rxq->free_count = 0;
  1018. spin_unlock_irqrestore(&rxq->lock, flags);
  1019. }
  1020. void iwl3945_rx_replenish(void *data)
  1021. {
  1022. struct iwl_priv *priv = data;
  1023. unsigned long flags;
  1024. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1025. spin_lock_irqsave(&priv->lock, flags);
  1026. iwl3945_rx_queue_restock(priv);
  1027. spin_unlock_irqrestore(&priv->lock, flags);
  1028. }
  1029. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1030. {
  1031. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1032. iwl3945_rx_queue_restock(priv);
  1033. }
  1034. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1035. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1036. * This free routine walks the list of POOL entries and if SKB is set to
  1037. * non NULL it is unmapped and freed
  1038. */
  1039. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1040. {
  1041. int i;
  1042. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1043. if (rxq->pool[i].page != NULL) {
  1044. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1045. PAGE_SIZE << priv->hw_params.rx_page_order,
  1046. PCI_DMA_FROMDEVICE);
  1047. __free_pages(rxq->pool[i].page,
  1048. priv->hw_params.rx_page_order);
  1049. rxq->pool[i].page = NULL;
  1050. priv->alloc_rxb_page--;
  1051. }
  1052. }
  1053. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1054. rxq->dma_addr);
  1055. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1056. rxq->rb_stts, rxq->rb_stts_dma);
  1057. rxq->bd = NULL;
  1058. rxq->rb_stts = NULL;
  1059. }
  1060. /* Convert linear signal-to-noise ratio into dB */
  1061. static u8 ratio2dB[100] = {
  1062. /* 0 1 2 3 4 5 6 7 8 9 */
  1063. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1064. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1065. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1066. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1067. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1068. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1069. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1070. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1071. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1072. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1073. };
  1074. /* Calculates a relative dB value from a ratio of linear
  1075. * (i.e. not dB) signal levels.
  1076. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1077. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1078. {
  1079. /* 1000:1 or higher just report as 60 dB */
  1080. if (sig_ratio >= 1000)
  1081. return 60;
  1082. /* 100:1 or higher, divide by 10 and use table,
  1083. * add 20 dB to make up for divide by 10 */
  1084. if (sig_ratio >= 100)
  1085. return 20 + (int)ratio2dB[sig_ratio/10];
  1086. /* We shouldn't see this */
  1087. if (sig_ratio < 1)
  1088. return 0;
  1089. /* Use table for ratios 1:1 - 99:1 */
  1090. return (int)ratio2dB[sig_ratio];
  1091. }
  1092. #define PERFECT_RSSI (-20) /* dBm */
  1093. #define WORST_RSSI (-95) /* dBm */
  1094. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1095. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1096. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1097. * about formulas used below. */
  1098. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1099. {
  1100. int sig_qual;
  1101. int degradation = PERFECT_RSSI - rssi_dbm;
  1102. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1103. * as indicator; formula is (signal dbm - noise dbm).
  1104. * SNR at or above 40 is a great signal (100%).
  1105. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1106. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1107. if (noise_dbm) {
  1108. if (rssi_dbm - noise_dbm >= 40)
  1109. return 100;
  1110. else if (rssi_dbm < noise_dbm)
  1111. return 0;
  1112. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1113. /* Else use just the signal level.
  1114. * This formula is a least squares fit of data points collected and
  1115. * compared with a reference system that had a percentage (%) display
  1116. * for signal quality. */
  1117. } else
  1118. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1119. (15 * RSSI_RANGE + 62 * degradation)) /
  1120. (RSSI_RANGE * RSSI_RANGE);
  1121. if (sig_qual > 100)
  1122. sig_qual = 100;
  1123. else if (sig_qual < 1)
  1124. sig_qual = 0;
  1125. return sig_qual;
  1126. }
  1127. /**
  1128. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1129. *
  1130. * Uses the priv->rx_handlers callback function array to invoke
  1131. * the appropriate handlers, including command responses,
  1132. * frame-received notifications, and other notifications.
  1133. */
  1134. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1135. {
  1136. struct iwl_rx_mem_buffer *rxb;
  1137. struct iwl_rx_packet *pkt;
  1138. struct iwl_rx_queue *rxq = &priv->rxq;
  1139. u32 r, i;
  1140. int reclaim;
  1141. unsigned long flags;
  1142. u8 fill_rx = 0;
  1143. u32 count = 8;
  1144. int total_empty = 0;
  1145. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1146. * buffer that the driver may process (last buffer filled by ucode). */
  1147. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1148. i = rxq->read;
  1149. /* calculate total frames need to be restock after handling RX */
  1150. total_empty = r - priv->rxq.write_actual;
  1151. if (total_empty < 0)
  1152. total_empty += RX_QUEUE_SIZE;
  1153. if (total_empty > (RX_QUEUE_SIZE / 2))
  1154. fill_rx = 1;
  1155. /* Rx interrupt, but nothing sent from uCode */
  1156. if (i == r)
  1157. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1158. while (i != r) {
  1159. rxb = rxq->queue[i];
  1160. /* If an RXB doesn't have a Rx queue slot associated with it,
  1161. * then a bug has been introduced in the queue refilling
  1162. * routines -- catch it here */
  1163. BUG_ON(rxb == NULL);
  1164. rxq->queue[i] = NULL;
  1165. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1166. PAGE_SIZE << priv->hw_params.rx_page_order,
  1167. PCI_DMA_FROMDEVICE);
  1168. pkt = rxb_addr(rxb);
  1169. trace_iwlwifi_dev_rx(priv, pkt,
  1170. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1171. /* Reclaim a command buffer only if this packet is a response
  1172. * to a (driver-originated) command.
  1173. * If the packet (e.g. Rx frame) originated from uCode,
  1174. * there is no command buffer to reclaim.
  1175. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1176. * but apparently a few don't get set; catch them here. */
  1177. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1178. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1179. (pkt->hdr.cmd != REPLY_TX);
  1180. /* Based on type of command response or notification,
  1181. * handle those that need handling via function in
  1182. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1183. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1184. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1185. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1186. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1187. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1188. } else {
  1189. /* No handling needed */
  1190. IWL_DEBUG_RX(priv,
  1191. "r %d i %d No handler needed for %s, 0x%02x\n",
  1192. r, i, get_cmd_string(pkt->hdr.cmd),
  1193. pkt->hdr.cmd);
  1194. }
  1195. /*
  1196. * XXX: After here, we should always check rxb->page
  1197. * against NULL before touching it or its virtual
  1198. * memory (pkt). Because some rx_handler might have
  1199. * already taken or freed the pages.
  1200. */
  1201. if (reclaim) {
  1202. /* Invoke any callbacks, transfer the buffer to caller,
  1203. * and fire off the (possibly) blocking iwl_send_cmd()
  1204. * as we reclaim the driver command queue */
  1205. if (rxb->page)
  1206. iwl_tx_cmd_complete(priv, rxb);
  1207. else
  1208. IWL_WARN(priv, "Claim null rxb?\n");
  1209. }
  1210. /* For now we just don't re-use anything. We can tweak this
  1211. * later to try and re-use notification packets and SKBs that
  1212. * fail to Rx correctly */
  1213. if (rxb->page != NULL) {
  1214. priv->alloc_rxb_page--;
  1215. __free_pages(rxb->page, priv->hw_params.rx_page_order);
  1216. rxb->page = NULL;
  1217. }
  1218. spin_lock_irqsave(&rxq->lock, flags);
  1219. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1220. spin_unlock_irqrestore(&rxq->lock, flags);
  1221. i = (i + 1) & RX_QUEUE_MASK;
  1222. /* If there are a lot of unused frames,
  1223. * restock the Rx queue so ucode won't assert. */
  1224. if (fill_rx) {
  1225. count++;
  1226. if (count >= 8) {
  1227. priv->rxq.read = i;
  1228. iwl3945_rx_replenish_now(priv);
  1229. count = 0;
  1230. }
  1231. }
  1232. }
  1233. /* Backtrack one entry */
  1234. priv->rxq.read = i;
  1235. if (fill_rx)
  1236. iwl3945_rx_replenish_now(priv);
  1237. else
  1238. iwl3945_rx_queue_restock(priv);
  1239. }
  1240. /* call this function to flush any scheduled tasklet */
  1241. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1242. {
  1243. /* wait to make sure we flush pending tasklet*/
  1244. synchronize_irq(priv->pci_dev->irq);
  1245. tasklet_kill(&priv->irq_tasklet);
  1246. }
  1247. #ifdef CONFIG_IWLWIFI_DEBUG
  1248. static const char *desc_lookup(int i)
  1249. {
  1250. switch (i) {
  1251. case 1:
  1252. return "FAIL";
  1253. case 2:
  1254. return "BAD_PARAM";
  1255. case 3:
  1256. return "BAD_CHECKSUM";
  1257. case 4:
  1258. return "NMI_INTERRUPT";
  1259. case 5:
  1260. return "SYSASSERT";
  1261. case 6:
  1262. return "FATAL_ERROR";
  1263. }
  1264. return "UNKNOWN";
  1265. }
  1266. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1267. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1268. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1269. {
  1270. u32 i;
  1271. u32 desc, time, count, base, data1;
  1272. u32 blink1, blink2, ilink1, ilink2;
  1273. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1274. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1275. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1276. return;
  1277. }
  1278. count = iwl_read_targ_mem(priv, base);
  1279. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1280. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1281. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1282. priv->status, count);
  1283. }
  1284. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1285. "ilink1 nmiPC Line\n");
  1286. for (i = ERROR_START_OFFSET;
  1287. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1288. i += ERROR_ELEM_SIZE) {
  1289. desc = iwl_read_targ_mem(priv, base + i);
  1290. time =
  1291. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1292. blink1 =
  1293. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1294. blink2 =
  1295. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1296. ilink1 =
  1297. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1298. ilink2 =
  1299. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1300. data1 =
  1301. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1302. IWL_ERR(priv,
  1303. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1304. desc_lookup(desc), desc, time, blink1, blink2,
  1305. ilink1, ilink2, data1);
  1306. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1307. 0, blink1, blink2, ilink1, ilink2);
  1308. }
  1309. }
  1310. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1311. /**
  1312. * iwl3945_print_event_log - Dump error event log to syslog
  1313. *
  1314. */
  1315. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1316. u32 num_events, u32 mode)
  1317. {
  1318. u32 i;
  1319. u32 base; /* SRAM byte address of event log header */
  1320. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1321. u32 ptr; /* SRAM byte address of log data */
  1322. u32 ev, time, data; /* event log data */
  1323. if (num_events == 0)
  1324. return;
  1325. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1326. if (mode == 0)
  1327. event_size = 2 * sizeof(u32);
  1328. else
  1329. event_size = 3 * sizeof(u32);
  1330. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1331. /* "time" is actually "data" for mode 0 (no timestamp).
  1332. * place event id # at far right for easier visual parsing. */
  1333. for (i = 0; i < num_events; i++) {
  1334. ev = iwl_read_targ_mem(priv, ptr);
  1335. ptr += sizeof(u32);
  1336. time = iwl_read_targ_mem(priv, ptr);
  1337. ptr += sizeof(u32);
  1338. if (mode == 0) {
  1339. /* data, ev */
  1340. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1341. trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
  1342. } else {
  1343. data = iwl_read_targ_mem(priv, ptr);
  1344. ptr += sizeof(u32);
  1345. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1346. trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
  1347. }
  1348. }
  1349. }
  1350. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1351. {
  1352. u32 base; /* SRAM byte address of event log header */
  1353. u32 capacity; /* event log capacity in # entries */
  1354. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1355. u32 num_wraps; /* # times uCode wrapped to top of log */
  1356. u32 next_entry; /* index of next entry to be written by uCode */
  1357. u32 size; /* # entries that we'll print */
  1358. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1359. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1360. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1361. return;
  1362. }
  1363. /* event log header */
  1364. capacity = iwl_read_targ_mem(priv, base);
  1365. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1366. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1367. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1368. size = num_wraps ? capacity : next_entry;
  1369. /* bail out if nothing in log */
  1370. if (size == 0) {
  1371. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1372. return;
  1373. }
  1374. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1375. size, num_wraps);
  1376. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1377. * i.e the next one that uCode would fill. */
  1378. if (num_wraps)
  1379. iwl3945_print_event_log(priv, next_entry,
  1380. capacity - next_entry, mode);
  1381. /* (then/else) start at top of log */
  1382. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1383. }
  1384. #else
  1385. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1386. {
  1387. }
  1388. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1389. {
  1390. }
  1391. #endif
  1392. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1393. {
  1394. u32 inta, handled = 0;
  1395. u32 inta_fh;
  1396. unsigned long flags;
  1397. #ifdef CONFIG_IWLWIFI_DEBUG
  1398. u32 inta_mask;
  1399. #endif
  1400. spin_lock_irqsave(&priv->lock, flags);
  1401. /* Ack/clear/reset pending uCode interrupts.
  1402. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1403. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1404. inta = iwl_read32(priv, CSR_INT);
  1405. iwl_write32(priv, CSR_INT, inta);
  1406. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1407. * Any new interrupts that happen after this, either while we're
  1408. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1409. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1410. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1411. #ifdef CONFIG_IWLWIFI_DEBUG
  1412. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1413. /* just for debug */
  1414. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1415. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1416. inta, inta_mask, inta_fh);
  1417. }
  1418. #endif
  1419. spin_unlock_irqrestore(&priv->lock, flags);
  1420. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1421. * atomic, make sure that inta covers all the interrupts that
  1422. * we've discovered, even if FH interrupt came in just after
  1423. * reading CSR_INT. */
  1424. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1425. inta |= CSR_INT_BIT_FH_RX;
  1426. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1427. inta |= CSR_INT_BIT_FH_TX;
  1428. /* Now service all interrupt bits discovered above. */
  1429. if (inta & CSR_INT_BIT_HW_ERR) {
  1430. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1431. /* Tell the device to stop sending interrupts */
  1432. iwl_disable_interrupts(priv);
  1433. priv->isr_stats.hw++;
  1434. iwl_irq_handle_error(priv);
  1435. handled |= CSR_INT_BIT_HW_ERR;
  1436. return;
  1437. }
  1438. #ifdef CONFIG_IWLWIFI_DEBUG
  1439. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1440. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1441. if (inta & CSR_INT_BIT_SCD) {
  1442. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1443. "the frame/frames.\n");
  1444. priv->isr_stats.sch++;
  1445. }
  1446. /* Alive notification via Rx interrupt will do the real work */
  1447. if (inta & CSR_INT_BIT_ALIVE) {
  1448. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1449. priv->isr_stats.alive++;
  1450. }
  1451. }
  1452. #endif
  1453. /* Safely ignore these bits for debug checks below */
  1454. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1455. /* Error detected by uCode */
  1456. if (inta & CSR_INT_BIT_SW_ERR) {
  1457. IWL_ERR(priv, "Microcode SW error detected. "
  1458. "Restarting 0x%X.\n", inta);
  1459. priv->isr_stats.sw++;
  1460. priv->isr_stats.sw_err = inta;
  1461. iwl_irq_handle_error(priv);
  1462. handled |= CSR_INT_BIT_SW_ERR;
  1463. }
  1464. /* uCode wakes up after power-down sleep */
  1465. if (inta & CSR_INT_BIT_WAKEUP) {
  1466. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1467. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1468. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1469. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1470. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1471. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1472. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1473. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1474. priv->isr_stats.wakeup++;
  1475. handled |= CSR_INT_BIT_WAKEUP;
  1476. }
  1477. /* All uCode command responses, including Tx command responses,
  1478. * Rx "responses" (frame-received notification), and other
  1479. * notifications from uCode come through here*/
  1480. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1481. iwl3945_rx_handle(priv);
  1482. priv->isr_stats.rx++;
  1483. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1484. }
  1485. if (inta & CSR_INT_BIT_FH_TX) {
  1486. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1487. priv->isr_stats.tx++;
  1488. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1489. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1490. (FH39_SRVC_CHNL), 0x0);
  1491. handled |= CSR_INT_BIT_FH_TX;
  1492. }
  1493. if (inta & ~handled) {
  1494. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1495. priv->isr_stats.unhandled++;
  1496. }
  1497. if (inta & ~priv->inta_mask) {
  1498. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1499. inta & ~priv->inta_mask);
  1500. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1501. }
  1502. /* Re-enable all interrupts */
  1503. /* only Re-enable if disabled by irq */
  1504. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1505. iwl_enable_interrupts(priv);
  1506. #ifdef CONFIG_IWLWIFI_DEBUG
  1507. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1508. inta = iwl_read32(priv, CSR_INT);
  1509. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1510. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1511. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1512. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1513. }
  1514. #endif
  1515. }
  1516. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1517. enum ieee80211_band band,
  1518. u8 is_active, u8 n_probes,
  1519. struct iwl3945_scan_channel *scan_ch)
  1520. {
  1521. struct ieee80211_channel *chan;
  1522. const struct ieee80211_supported_band *sband;
  1523. const struct iwl_channel_info *ch_info;
  1524. u16 passive_dwell = 0;
  1525. u16 active_dwell = 0;
  1526. int added, i;
  1527. sband = iwl_get_hw_mode(priv, band);
  1528. if (!sband)
  1529. return 0;
  1530. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1531. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1532. if (passive_dwell <= active_dwell)
  1533. passive_dwell = active_dwell + 1;
  1534. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1535. chan = priv->scan_request->channels[i];
  1536. if (chan->band != band)
  1537. continue;
  1538. scan_ch->channel = chan->hw_value;
  1539. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1540. if (!is_channel_valid(ch_info)) {
  1541. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1542. scan_ch->channel);
  1543. continue;
  1544. }
  1545. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1546. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1547. /* If passive , set up for auto-switch
  1548. * and use long active_dwell time.
  1549. */
  1550. if (!is_active || is_channel_passive(ch_info) ||
  1551. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1552. scan_ch->type = 0; /* passive */
  1553. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1554. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1555. } else {
  1556. scan_ch->type = 1; /* active */
  1557. }
  1558. /* Set direct probe bits. These may be used both for active
  1559. * scan channels (probes gets sent right away),
  1560. * or for passive channels (probes get se sent only after
  1561. * hearing clear Rx packet).*/
  1562. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1563. if (n_probes)
  1564. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1565. } else {
  1566. /* uCode v1 does not allow setting direct probe bits on
  1567. * passive channel. */
  1568. if ((scan_ch->type & 1) && n_probes)
  1569. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1570. }
  1571. /* Set txpower levels to defaults */
  1572. scan_ch->tpc.dsp_atten = 110;
  1573. /* scan_pwr_info->tpc.dsp_atten; */
  1574. /*scan_pwr_info->tpc.tx_gain; */
  1575. if (band == IEEE80211_BAND_5GHZ)
  1576. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1577. else {
  1578. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1579. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1580. * power level:
  1581. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1582. */
  1583. }
  1584. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1585. scan_ch->channel,
  1586. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1587. (scan_ch->type & 1) ?
  1588. active_dwell : passive_dwell);
  1589. scan_ch++;
  1590. added++;
  1591. }
  1592. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1593. return added;
  1594. }
  1595. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1596. struct ieee80211_rate *rates)
  1597. {
  1598. int i;
  1599. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1600. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1601. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1602. rates[i].hw_value_short = i;
  1603. rates[i].flags = 0;
  1604. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1605. /*
  1606. * If CCK != 1M then set short preamble rate flag.
  1607. */
  1608. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1609. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1610. }
  1611. }
  1612. }
  1613. /******************************************************************************
  1614. *
  1615. * uCode download functions
  1616. *
  1617. ******************************************************************************/
  1618. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1619. {
  1620. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1621. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1622. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1623. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1624. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1625. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1626. }
  1627. /**
  1628. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1629. * looking at all data.
  1630. */
  1631. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1632. {
  1633. u32 val;
  1634. u32 save_len = len;
  1635. int rc = 0;
  1636. u32 errcnt;
  1637. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1638. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1639. IWL39_RTC_INST_LOWER_BOUND);
  1640. errcnt = 0;
  1641. for (; len > 0; len -= sizeof(u32), image++) {
  1642. /* read data comes through single port, auto-incr addr */
  1643. /* NOTE: Use the debugless read so we don't flood kernel log
  1644. * if IWL_DL_IO is set */
  1645. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1646. if (val != le32_to_cpu(*image)) {
  1647. IWL_ERR(priv, "uCode INST section is invalid at "
  1648. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1649. save_len - len, val, le32_to_cpu(*image));
  1650. rc = -EIO;
  1651. errcnt++;
  1652. if (errcnt >= 20)
  1653. break;
  1654. }
  1655. }
  1656. if (!errcnt)
  1657. IWL_DEBUG_INFO(priv,
  1658. "ucode image in INSTRUCTION memory is good\n");
  1659. return rc;
  1660. }
  1661. /**
  1662. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1663. * using sample data 100 bytes apart. If these sample points are good,
  1664. * it's a pretty good bet that everything between them is good, too.
  1665. */
  1666. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1667. {
  1668. u32 val;
  1669. int rc = 0;
  1670. u32 errcnt = 0;
  1671. u32 i;
  1672. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1673. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1674. /* read data comes through single port, auto-incr addr */
  1675. /* NOTE: Use the debugless read so we don't flood kernel log
  1676. * if IWL_DL_IO is set */
  1677. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1678. i + IWL39_RTC_INST_LOWER_BOUND);
  1679. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1680. if (val != le32_to_cpu(*image)) {
  1681. #if 0 /* Enable this if you want to see details */
  1682. IWL_ERR(priv, "uCode INST section is invalid at "
  1683. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1684. i, val, *image);
  1685. #endif
  1686. rc = -EIO;
  1687. errcnt++;
  1688. if (errcnt >= 3)
  1689. break;
  1690. }
  1691. }
  1692. return rc;
  1693. }
  1694. /**
  1695. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1696. * and verify its contents
  1697. */
  1698. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1699. {
  1700. __le32 *image;
  1701. u32 len;
  1702. int rc = 0;
  1703. /* Try bootstrap */
  1704. image = (__le32 *)priv->ucode_boot.v_addr;
  1705. len = priv->ucode_boot.len;
  1706. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1707. if (rc == 0) {
  1708. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1709. return 0;
  1710. }
  1711. /* Try initialize */
  1712. image = (__le32 *)priv->ucode_init.v_addr;
  1713. len = priv->ucode_init.len;
  1714. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1715. if (rc == 0) {
  1716. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1717. return 0;
  1718. }
  1719. /* Try runtime/protocol */
  1720. image = (__le32 *)priv->ucode_code.v_addr;
  1721. len = priv->ucode_code.len;
  1722. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1723. if (rc == 0) {
  1724. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1725. return 0;
  1726. }
  1727. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1728. /* Since nothing seems to match, show first several data entries in
  1729. * instruction SRAM, so maybe visual inspection will give a clue.
  1730. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1731. image = (__le32 *)priv->ucode_boot.v_addr;
  1732. len = priv->ucode_boot.len;
  1733. rc = iwl3945_verify_inst_full(priv, image, len);
  1734. return rc;
  1735. }
  1736. static void iwl3945_nic_start(struct iwl_priv *priv)
  1737. {
  1738. /* Remove all resets to allow NIC to operate */
  1739. iwl_write32(priv, CSR_RESET, 0);
  1740. }
  1741. /**
  1742. * iwl3945_read_ucode - Read uCode images from disk file.
  1743. *
  1744. * Copy into buffers for card to fetch via bus-mastering
  1745. */
  1746. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1747. {
  1748. const struct iwl_ucode_header *ucode;
  1749. int ret = -EINVAL, index;
  1750. const struct firmware *ucode_raw;
  1751. /* firmware file name contains uCode/driver compatibility version */
  1752. const char *name_pre = priv->cfg->fw_name_pre;
  1753. const unsigned int api_max = priv->cfg->ucode_api_max;
  1754. const unsigned int api_min = priv->cfg->ucode_api_min;
  1755. char buf[25];
  1756. u8 *src;
  1757. size_t len;
  1758. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1759. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1760. * request_firmware() is synchronous, file is in memory on return. */
  1761. for (index = api_max; index >= api_min; index--) {
  1762. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1763. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1764. if (ret < 0) {
  1765. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1766. buf, ret);
  1767. if (ret == -ENOENT)
  1768. continue;
  1769. else
  1770. goto error;
  1771. } else {
  1772. if (index < api_max)
  1773. IWL_ERR(priv, "Loaded firmware %s, "
  1774. "which is deprecated. "
  1775. " Please use API v%u instead.\n",
  1776. buf, api_max);
  1777. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1778. "(%zd bytes) from disk\n",
  1779. buf, ucode_raw->size);
  1780. break;
  1781. }
  1782. }
  1783. if (ret < 0)
  1784. goto error;
  1785. /* Make sure that we got at least our header! */
  1786. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1787. IWL_ERR(priv, "File size way too small!\n");
  1788. ret = -EINVAL;
  1789. goto err_release;
  1790. }
  1791. /* Data from ucode file: header followed by uCode images */
  1792. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1793. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1794. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1795. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1796. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1797. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1798. init_data_size =
  1799. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1800. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1801. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1802. /* api_ver should match the api version forming part of the
  1803. * firmware filename ... but we don't check for that and only rely
  1804. * on the API version read from firmware header from here on forward */
  1805. if (api_ver < api_min || api_ver > api_max) {
  1806. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1807. "Driver supports v%u, firmware is v%u.\n",
  1808. api_max, api_ver);
  1809. priv->ucode_ver = 0;
  1810. ret = -EINVAL;
  1811. goto err_release;
  1812. }
  1813. if (api_ver != api_max)
  1814. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1815. "got %u. New firmware can be obtained "
  1816. "from http://www.intellinuxwireless.org.\n",
  1817. api_max, api_ver);
  1818. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1819. IWL_UCODE_MAJOR(priv->ucode_ver),
  1820. IWL_UCODE_MINOR(priv->ucode_ver),
  1821. IWL_UCODE_API(priv->ucode_ver),
  1822. IWL_UCODE_SERIAL(priv->ucode_ver));
  1823. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1824. priv->ucode_ver);
  1825. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1826. inst_size);
  1827. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1828. data_size);
  1829. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1830. init_size);
  1831. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1832. init_data_size);
  1833. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1834. boot_size);
  1835. /* Verify size of file vs. image size info in file's header */
  1836. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1837. inst_size + data_size + init_size +
  1838. init_data_size + boot_size) {
  1839. IWL_DEBUG_INFO(priv,
  1840. "uCode file size %zd does not match expected size\n",
  1841. ucode_raw->size);
  1842. ret = -EINVAL;
  1843. goto err_release;
  1844. }
  1845. /* Verify that uCode images will fit in card's SRAM */
  1846. if (inst_size > IWL39_MAX_INST_SIZE) {
  1847. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1848. inst_size);
  1849. ret = -EINVAL;
  1850. goto err_release;
  1851. }
  1852. if (data_size > IWL39_MAX_DATA_SIZE) {
  1853. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1854. data_size);
  1855. ret = -EINVAL;
  1856. goto err_release;
  1857. }
  1858. if (init_size > IWL39_MAX_INST_SIZE) {
  1859. IWL_DEBUG_INFO(priv,
  1860. "uCode init instr len %d too large to fit in\n",
  1861. init_size);
  1862. ret = -EINVAL;
  1863. goto err_release;
  1864. }
  1865. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1866. IWL_DEBUG_INFO(priv,
  1867. "uCode init data len %d too large to fit in\n",
  1868. init_data_size);
  1869. ret = -EINVAL;
  1870. goto err_release;
  1871. }
  1872. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1873. IWL_DEBUG_INFO(priv,
  1874. "uCode boot instr len %d too large to fit in\n",
  1875. boot_size);
  1876. ret = -EINVAL;
  1877. goto err_release;
  1878. }
  1879. /* Allocate ucode buffers for card's bus-master loading ... */
  1880. /* Runtime instructions and 2 copies of data:
  1881. * 1) unmodified from disk
  1882. * 2) backup cache for save/restore during power-downs */
  1883. priv->ucode_code.len = inst_size;
  1884. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1885. priv->ucode_data.len = data_size;
  1886. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1887. priv->ucode_data_backup.len = data_size;
  1888. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1889. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1890. !priv->ucode_data_backup.v_addr)
  1891. goto err_pci_alloc;
  1892. /* Initialization instructions and data */
  1893. if (init_size && init_data_size) {
  1894. priv->ucode_init.len = init_size;
  1895. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1896. priv->ucode_init_data.len = init_data_size;
  1897. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1898. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1899. goto err_pci_alloc;
  1900. }
  1901. /* Bootstrap (instructions only, no data) */
  1902. if (boot_size) {
  1903. priv->ucode_boot.len = boot_size;
  1904. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1905. if (!priv->ucode_boot.v_addr)
  1906. goto err_pci_alloc;
  1907. }
  1908. /* Copy images into buffers for card's bus-master reads ... */
  1909. /* Runtime instructions (first block of data in file) */
  1910. len = inst_size;
  1911. IWL_DEBUG_INFO(priv,
  1912. "Copying (but not loading) uCode instr len %zd\n", len);
  1913. memcpy(priv->ucode_code.v_addr, src, len);
  1914. src += len;
  1915. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1916. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1917. /* Runtime data (2nd block)
  1918. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1919. len = data_size;
  1920. IWL_DEBUG_INFO(priv,
  1921. "Copying (but not loading) uCode data len %zd\n", len);
  1922. memcpy(priv->ucode_data.v_addr, src, len);
  1923. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1924. src += len;
  1925. /* Initialization instructions (3rd block) */
  1926. if (init_size) {
  1927. len = init_size;
  1928. IWL_DEBUG_INFO(priv,
  1929. "Copying (but not loading) init instr len %zd\n", len);
  1930. memcpy(priv->ucode_init.v_addr, src, len);
  1931. src += len;
  1932. }
  1933. /* Initialization data (4th block) */
  1934. if (init_data_size) {
  1935. len = init_data_size;
  1936. IWL_DEBUG_INFO(priv,
  1937. "Copying (but not loading) init data len %zd\n", len);
  1938. memcpy(priv->ucode_init_data.v_addr, src, len);
  1939. src += len;
  1940. }
  1941. /* Bootstrap instructions (5th block) */
  1942. len = boot_size;
  1943. IWL_DEBUG_INFO(priv,
  1944. "Copying (but not loading) boot instr len %zd\n", len);
  1945. memcpy(priv->ucode_boot.v_addr, src, len);
  1946. /* We have our copies now, allow OS release its copies */
  1947. release_firmware(ucode_raw);
  1948. return 0;
  1949. err_pci_alloc:
  1950. IWL_ERR(priv, "failed to allocate pci memory\n");
  1951. ret = -ENOMEM;
  1952. iwl3945_dealloc_ucode_pci(priv);
  1953. err_release:
  1954. release_firmware(ucode_raw);
  1955. error:
  1956. return ret;
  1957. }
  1958. /**
  1959. * iwl3945_set_ucode_ptrs - Set uCode address location
  1960. *
  1961. * Tell initialization uCode where to find runtime uCode.
  1962. *
  1963. * BSM registers initially contain pointers to initialization uCode.
  1964. * We need to replace them to load runtime uCode inst and data,
  1965. * and to save runtime data when powering down.
  1966. */
  1967. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1968. {
  1969. dma_addr_t pinst;
  1970. dma_addr_t pdata;
  1971. /* bits 31:0 for 3945 */
  1972. pinst = priv->ucode_code.p_addr;
  1973. pdata = priv->ucode_data_backup.p_addr;
  1974. /* Tell bootstrap uCode where to find image to load */
  1975. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1976. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1977. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1978. priv->ucode_data.len);
  1979. /* Inst byte count must be last to set up, bit 31 signals uCode
  1980. * that all new ptr/size info is in place */
  1981. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1982. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1983. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1984. return 0;
  1985. }
  1986. /**
  1987. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1988. *
  1989. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1990. *
  1991. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1992. */
  1993. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1994. {
  1995. /* Check alive response for "valid" sign from uCode */
  1996. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  1997. /* We had an error bringing up the hardware, so take it
  1998. * all the way back down so we can try again */
  1999. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2000. goto restart;
  2001. }
  2002. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2003. * This is a paranoid check, because we would not have gotten the
  2004. * "initialize" alive if code weren't properly loaded. */
  2005. if (iwl3945_verify_ucode(priv)) {
  2006. /* Runtime instruction load was bad;
  2007. * take it all the way back down so we can try again */
  2008. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2009. goto restart;
  2010. }
  2011. /* Send pointers to protocol/runtime uCode image ... init code will
  2012. * load and launch runtime uCode, which will send us another "Alive"
  2013. * notification. */
  2014. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2015. if (iwl3945_set_ucode_ptrs(priv)) {
  2016. /* Runtime instruction load won't happen;
  2017. * take it all the way back down so we can try again */
  2018. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2019. goto restart;
  2020. }
  2021. return;
  2022. restart:
  2023. queue_work(priv->workqueue, &priv->restart);
  2024. }
  2025. /**
  2026. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2027. * from protocol/runtime uCode (initialization uCode's
  2028. * Alive gets handled by iwl3945_init_alive_start()).
  2029. */
  2030. static void iwl3945_alive_start(struct iwl_priv *priv)
  2031. {
  2032. int thermal_spin = 0;
  2033. u32 rfkill;
  2034. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2035. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2036. /* We had an error bringing up the hardware, so take it
  2037. * all the way back down so we can try again */
  2038. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2039. goto restart;
  2040. }
  2041. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2042. * This is a paranoid check, because we would not have gotten the
  2043. * "runtime" alive if code weren't properly loaded. */
  2044. if (iwl3945_verify_ucode(priv)) {
  2045. /* Runtime instruction load was bad;
  2046. * take it all the way back down so we can try again */
  2047. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2048. goto restart;
  2049. }
  2050. iwl_clear_stations_table(priv);
  2051. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2052. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2053. if (rfkill & 0x1) {
  2054. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2055. /* if RFKILL is not on, then wait for thermal
  2056. * sensor in adapter to kick in */
  2057. while (iwl3945_hw_get_temperature(priv) == 0) {
  2058. thermal_spin++;
  2059. udelay(10);
  2060. }
  2061. if (thermal_spin)
  2062. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2063. thermal_spin * 10);
  2064. } else
  2065. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2066. /* After the ALIVE response, we can send commands to 3945 uCode */
  2067. set_bit(STATUS_ALIVE, &priv->status);
  2068. if (iwl_is_rfkill(priv))
  2069. return;
  2070. ieee80211_wake_queues(priv->hw);
  2071. priv->active_rate = priv->rates_mask;
  2072. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2073. iwl_power_update_mode(priv, false);
  2074. if (iwl_is_associated(priv)) {
  2075. struct iwl3945_rxon_cmd *active_rxon =
  2076. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2077. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2078. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2079. } else {
  2080. /* Initialize our rx_config data */
  2081. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2082. }
  2083. /* Configure Bluetooth device coexistence support */
  2084. iwl_send_bt_config(priv);
  2085. /* Configure the adapter for unassociated operation */
  2086. iwlcore_commit_rxon(priv);
  2087. iwl3945_reg_txpower_periodic(priv);
  2088. iwl_leds_init(priv);
  2089. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2090. set_bit(STATUS_READY, &priv->status);
  2091. wake_up_interruptible(&priv->wait_command_queue);
  2092. /* reassociate for ADHOC mode */
  2093. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2094. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2095. priv->vif);
  2096. if (beacon)
  2097. iwl_mac_beacon_update(priv->hw, beacon);
  2098. }
  2099. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2100. iwl_set_mode(priv, priv->iw_mode);
  2101. return;
  2102. restart:
  2103. queue_work(priv->workqueue, &priv->restart);
  2104. }
  2105. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2106. static void __iwl3945_down(struct iwl_priv *priv)
  2107. {
  2108. unsigned long flags;
  2109. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2110. struct ieee80211_conf *conf = NULL;
  2111. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2112. conf = ieee80211_get_hw_conf(priv->hw);
  2113. if (!exit_pending)
  2114. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2115. iwl_clear_stations_table(priv);
  2116. /* Unblock any waiting calls */
  2117. wake_up_interruptible_all(&priv->wait_command_queue);
  2118. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2119. * exiting the module */
  2120. if (!exit_pending)
  2121. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2122. /* stop and reset the on-board processor */
  2123. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2124. /* tell the device to stop sending interrupts */
  2125. spin_lock_irqsave(&priv->lock, flags);
  2126. iwl_disable_interrupts(priv);
  2127. spin_unlock_irqrestore(&priv->lock, flags);
  2128. iwl_synchronize_irq(priv);
  2129. if (priv->mac80211_registered)
  2130. ieee80211_stop_queues(priv->hw);
  2131. /* If we have not previously called iwl3945_init() then
  2132. * clear all bits but the RF Kill bits and return */
  2133. if (!iwl_is_init(priv)) {
  2134. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2135. STATUS_RF_KILL_HW |
  2136. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2137. STATUS_GEO_CONFIGURED |
  2138. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2139. STATUS_EXIT_PENDING;
  2140. goto exit;
  2141. }
  2142. /* ...otherwise clear out all the status bits but the RF Kill
  2143. * bit and continue taking the NIC down. */
  2144. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2145. STATUS_RF_KILL_HW |
  2146. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2147. STATUS_GEO_CONFIGURED |
  2148. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2149. STATUS_FW_ERROR |
  2150. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2151. STATUS_EXIT_PENDING;
  2152. iwl3945_hw_txq_ctx_stop(priv);
  2153. iwl3945_hw_rxq_stop(priv);
  2154. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2155. APMG_CLK_VAL_DMA_CLK_RQT);
  2156. udelay(5);
  2157. /* Stop the device, and put it in low power state */
  2158. priv->cfg->ops->lib->apm_ops.stop(priv);
  2159. exit:
  2160. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2161. if (priv->ibss_beacon)
  2162. dev_kfree_skb(priv->ibss_beacon);
  2163. priv->ibss_beacon = NULL;
  2164. /* clear out any free frames */
  2165. iwl3945_clear_free_frames(priv);
  2166. }
  2167. static void iwl3945_down(struct iwl_priv *priv)
  2168. {
  2169. mutex_lock(&priv->mutex);
  2170. __iwl3945_down(priv);
  2171. mutex_unlock(&priv->mutex);
  2172. iwl3945_cancel_deferred_work(priv);
  2173. }
  2174. #define MAX_HW_RESTARTS 5
  2175. static int __iwl3945_up(struct iwl_priv *priv)
  2176. {
  2177. int rc, i;
  2178. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2179. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2180. return -EIO;
  2181. }
  2182. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2183. IWL_ERR(priv, "ucode not available for device bring up\n");
  2184. return -EIO;
  2185. }
  2186. /* If platform's RF_KILL switch is NOT set to KILL */
  2187. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2188. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2189. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2190. else {
  2191. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2192. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2193. return -ENODEV;
  2194. }
  2195. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2196. rc = iwl3945_hw_nic_init(priv);
  2197. if (rc) {
  2198. IWL_ERR(priv, "Unable to int nic\n");
  2199. return rc;
  2200. }
  2201. /* make sure rfkill handshake bits are cleared */
  2202. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2203. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2204. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2205. /* clear (again), then enable host interrupts */
  2206. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2207. iwl_enable_interrupts(priv);
  2208. /* really make sure rfkill handshake bits are cleared */
  2209. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2210. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2211. /* Copy original ucode data image from disk into backup cache.
  2212. * This will be used to initialize the on-board processor's
  2213. * data SRAM for a clean start when the runtime program first loads. */
  2214. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2215. priv->ucode_data.len);
  2216. /* We return success when we resume from suspend and rf_kill is on. */
  2217. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2218. return 0;
  2219. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2220. iwl_clear_stations_table(priv);
  2221. /* load bootstrap state machine,
  2222. * load bootstrap program into processor's memory,
  2223. * prepare to load the "initialize" uCode */
  2224. priv->cfg->ops->lib->load_ucode(priv);
  2225. if (rc) {
  2226. IWL_ERR(priv,
  2227. "Unable to set up bootstrap uCode: %d\n", rc);
  2228. continue;
  2229. }
  2230. /* start card; "initialize" will load runtime ucode */
  2231. iwl3945_nic_start(priv);
  2232. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2233. return 0;
  2234. }
  2235. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2236. __iwl3945_down(priv);
  2237. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2238. /* tried to restart and config the device for as long as our
  2239. * patience could withstand */
  2240. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2241. return -EIO;
  2242. }
  2243. /*****************************************************************************
  2244. *
  2245. * Workqueue callbacks
  2246. *
  2247. *****************************************************************************/
  2248. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2249. {
  2250. struct iwl_priv *priv =
  2251. container_of(data, struct iwl_priv, init_alive_start.work);
  2252. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2253. return;
  2254. mutex_lock(&priv->mutex);
  2255. iwl3945_init_alive_start(priv);
  2256. mutex_unlock(&priv->mutex);
  2257. }
  2258. static void iwl3945_bg_alive_start(struct work_struct *data)
  2259. {
  2260. struct iwl_priv *priv =
  2261. container_of(data, struct iwl_priv, alive_start.work);
  2262. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2263. return;
  2264. mutex_lock(&priv->mutex);
  2265. iwl3945_alive_start(priv);
  2266. mutex_unlock(&priv->mutex);
  2267. }
  2268. /*
  2269. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2270. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2271. * *is* readable even when device has been SW_RESET into low power mode
  2272. * (e.g. during RF KILL).
  2273. */
  2274. static void iwl3945_rfkill_poll(struct work_struct *data)
  2275. {
  2276. struct iwl_priv *priv =
  2277. container_of(data, struct iwl_priv, rfkill_poll.work);
  2278. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2279. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2280. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2281. if (new_rfkill != old_rfkill) {
  2282. if (new_rfkill)
  2283. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2284. else
  2285. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2286. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2287. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2288. new_rfkill ? "disable radio" : "enable radio");
  2289. }
  2290. /* Keep this running, even if radio now enabled. This will be
  2291. * cancelled in mac_start() if system decides to start again */
  2292. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2293. round_jiffies_relative(2 * HZ));
  2294. }
  2295. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2296. static void iwl3945_bg_request_scan(struct work_struct *data)
  2297. {
  2298. struct iwl_priv *priv =
  2299. container_of(data, struct iwl_priv, request_scan);
  2300. struct iwl_host_cmd cmd = {
  2301. .id = REPLY_SCAN_CMD,
  2302. .len = sizeof(struct iwl3945_scan_cmd),
  2303. .flags = CMD_SIZE_HUGE,
  2304. };
  2305. int rc = 0;
  2306. struct iwl3945_scan_cmd *scan;
  2307. struct ieee80211_conf *conf = NULL;
  2308. u8 n_probes = 0;
  2309. enum ieee80211_band band;
  2310. bool is_active = false;
  2311. conf = ieee80211_get_hw_conf(priv->hw);
  2312. mutex_lock(&priv->mutex);
  2313. cancel_delayed_work(&priv->scan_check);
  2314. if (!iwl_is_ready(priv)) {
  2315. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2316. goto done;
  2317. }
  2318. /* Make sure the scan wasn't canceled before this queued work
  2319. * was given the chance to run... */
  2320. if (!test_bit(STATUS_SCANNING, &priv->status))
  2321. goto done;
  2322. /* This should never be called or scheduled if there is currently
  2323. * a scan active in the hardware. */
  2324. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2325. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2326. "Ignoring second request.\n");
  2327. rc = -EIO;
  2328. goto done;
  2329. }
  2330. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2331. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2332. goto done;
  2333. }
  2334. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2335. IWL_DEBUG_HC(priv,
  2336. "Scan request while abort pending. Queuing.\n");
  2337. goto done;
  2338. }
  2339. if (iwl_is_rfkill(priv)) {
  2340. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2341. goto done;
  2342. }
  2343. if (!test_bit(STATUS_READY, &priv->status)) {
  2344. IWL_DEBUG_HC(priv,
  2345. "Scan request while uninitialized. Queuing.\n");
  2346. goto done;
  2347. }
  2348. if (!priv->scan_bands) {
  2349. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2350. goto done;
  2351. }
  2352. if (!priv->scan) {
  2353. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2354. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2355. if (!priv->scan) {
  2356. rc = -ENOMEM;
  2357. goto done;
  2358. }
  2359. }
  2360. scan = priv->scan;
  2361. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2362. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2363. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2364. if (iwl_is_associated(priv)) {
  2365. u16 interval = 0;
  2366. u32 extra;
  2367. u32 suspend_time = 100;
  2368. u32 scan_suspend_time = 100;
  2369. unsigned long flags;
  2370. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2371. spin_lock_irqsave(&priv->lock, flags);
  2372. interval = priv->beacon_int;
  2373. spin_unlock_irqrestore(&priv->lock, flags);
  2374. scan->suspend_time = 0;
  2375. scan->max_out_time = cpu_to_le32(200 * 1024);
  2376. if (!interval)
  2377. interval = suspend_time;
  2378. /*
  2379. * suspend time format:
  2380. * 0-19: beacon interval in usec (time before exec.)
  2381. * 20-23: 0
  2382. * 24-31: number of beacons (suspend between channels)
  2383. */
  2384. extra = (suspend_time / interval) << 24;
  2385. scan_suspend_time = 0xFF0FFFFF &
  2386. (extra | ((suspend_time % interval) * 1024));
  2387. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2388. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2389. scan_suspend_time, interval);
  2390. }
  2391. if (priv->scan_request->n_ssids) {
  2392. int i, p = 0;
  2393. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2394. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2395. /* always does wildcard anyway */
  2396. if (!priv->scan_request->ssids[i].ssid_len)
  2397. continue;
  2398. scan->direct_scan[p].id = WLAN_EID_SSID;
  2399. scan->direct_scan[p].len =
  2400. priv->scan_request->ssids[i].ssid_len;
  2401. memcpy(scan->direct_scan[p].ssid,
  2402. priv->scan_request->ssids[i].ssid,
  2403. priv->scan_request->ssids[i].ssid_len);
  2404. n_probes++;
  2405. p++;
  2406. }
  2407. is_active = true;
  2408. } else
  2409. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2410. /* We don't build a direct scan probe request; the uCode will do
  2411. * that based on the direct_mask added to each channel entry */
  2412. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2413. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2414. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2415. /* flags + rate selection */
  2416. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2417. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2418. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2419. scan->good_CRC_th = 0;
  2420. band = IEEE80211_BAND_2GHZ;
  2421. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2422. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2423. /*
  2424. * If active scaning is requested but a certain channel
  2425. * is marked passive, we can do active scanning if we
  2426. * detect transmissions.
  2427. */
  2428. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2429. band = IEEE80211_BAND_5GHZ;
  2430. } else {
  2431. IWL_WARN(priv, "Invalid scan band count\n");
  2432. goto done;
  2433. }
  2434. scan->tx_cmd.len = cpu_to_le16(
  2435. iwl_fill_probe_req(priv,
  2436. (struct ieee80211_mgmt *)scan->data,
  2437. priv->scan_request->ie,
  2438. priv->scan_request->ie_len,
  2439. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2440. /* select Rx antennas */
  2441. scan->flags |= iwl3945_get_antenna_flags(priv);
  2442. if (iwl_is_monitor_mode(priv))
  2443. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2444. scan->channel_count =
  2445. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2446. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2447. if (scan->channel_count == 0) {
  2448. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2449. goto done;
  2450. }
  2451. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2452. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2453. cmd.data = scan;
  2454. scan->len = cpu_to_le16(cmd.len);
  2455. set_bit(STATUS_SCAN_HW, &priv->status);
  2456. rc = iwl_send_cmd_sync(priv, &cmd);
  2457. if (rc)
  2458. goto done;
  2459. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2460. IWL_SCAN_CHECK_WATCHDOG);
  2461. mutex_unlock(&priv->mutex);
  2462. return;
  2463. done:
  2464. /* can not perform scan make sure we clear scanning
  2465. * bits from status so next scan request can be performed.
  2466. * if we dont clear scanning status bit here all next scan
  2467. * will fail
  2468. */
  2469. clear_bit(STATUS_SCAN_HW, &priv->status);
  2470. clear_bit(STATUS_SCANNING, &priv->status);
  2471. /* inform mac80211 scan aborted */
  2472. queue_work(priv->workqueue, &priv->scan_completed);
  2473. mutex_unlock(&priv->mutex);
  2474. }
  2475. static void iwl3945_bg_up(struct work_struct *data)
  2476. {
  2477. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2478. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2479. return;
  2480. mutex_lock(&priv->mutex);
  2481. __iwl3945_up(priv);
  2482. mutex_unlock(&priv->mutex);
  2483. }
  2484. static void iwl3945_bg_restart(struct work_struct *data)
  2485. {
  2486. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2487. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2488. return;
  2489. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2490. mutex_lock(&priv->mutex);
  2491. priv->vif = NULL;
  2492. priv->is_open = 0;
  2493. mutex_unlock(&priv->mutex);
  2494. iwl3945_down(priv);
  2495. ieee80211_restart_hw(priv->hw);
  2496. } else {
  2497. iwl3945_down(priv);
  2498. queue_work(priv->workqueue, &priv->up);
  2499. }
  2500. }
  2501. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2502. {
  2503. struct iwl_priv *priv =
  2504. container_of(data, struct iwl_priv, rx_replenish);
  2505. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2506. return;
  2507. mutex_lock(&priv->mutex);
  2508. iwl3945_rx_replenish(priv);
  2509. mutex_unlock(&priv->mutex);
  2510. }
  2511. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2512. void iwl3945_post_associate(struct iwl_priv *priv)
  2513. {
  2514. int rc = 0;
  2515. struct ieee80211_conf *conf = NULL;
  2516. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2517. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2518. return;
  2519. }
  2520. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2521. priv->assoc_id, priv->active_rxon.bssid_addr);
  2522. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2523. return;
  2524. if (!priv->vif || !priv->is_open)
  2525. return;
  2526. iwl_scan_cancel_timeout(priv, 200);
  2527. conf = ieee80211_get_hw_conf(priv->hw);
  2528. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2529. iwlcore_commit_rxon(priv);
  2530. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2531. iwl_setup_rxon_timing(priv);
  2532. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2533. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2534. if (rc)
  2535. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2536. "Attempting to continue.\n");
  2537. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2538. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2539. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2540. priv->assoc_id, priv->beacon_int);
  2541. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2542. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2543. else
  2544. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2545. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2546. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2547. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2548. else
  2549. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2550. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2551. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2552. }
  2553. iwlcore_commit_rxon(priv);
  2554. switch (priv->iw_mode) {
  2555. case NL80211_IFTYPE_STATION:
  2556. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2557. break;
  2558. case NL80211_IFTYPE_ADHOC:
  2559. priv->assoc_id = 1;
  2560. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2561. iwl3945_sync_sta(priv, IWL_STA_ID,
  2562. (priv->band == IEEE80211_BAND_5GHZ) ?
  2563. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2564. CMD_ASYNC);
  2565. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2566. iwl3945_send_beacon_cmd(priv);
  2567. break;
  2568. default:
  2569. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2570. __func__, priv->iw_mode);
  2571. break;
  2572. }
  2573. iwl_activate_qos(priv, 0);
  2574. /* we have just associated, don't start scan too early */
  2575. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2576. }
  2577. /*****************************************************************************
  2578. *
  2579. * mac80211 entry point functions
  2580. *
  2581. *****************************************************************************/
  2582. #define UCODE_READY_TIMEOUT (2 * HZ)
  2583. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2584. {
  2585. struct iwl_priv *priv = hw->priv;
  2586. int ret;
  2587. IWL_DEBUG_MAC80211(priv, "enter\n");
  2588. /* we should be verifying the device is ready to be opened */
  2589. mutex_lock(&priv->mutex);
  2590. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2591. * ucode filename and max sizes are card-specific. */
  2592. if (!priv->ucode_code.len) {
  2593. ret = iwl3945_read_ucode(priv);
  2594. if (ret) {
  2595. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2596. mutex_unlock(&priv->mutex);
  2597. goto out_release_irq;
  2598. }
  2599. }
  2600. ret = __iwl3945_up(priv);
  2601. mutex_unlock(&priv->mutex);
  2602. if (ret)
  2603. goto out_release_irq;
  2604. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2605. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2606. * mac80211 will not be run successfully. */
  2607. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2608. test_bit(STATUS_READY, &priv->status),
  2609. UCODE_READY_TIMEOUT);
  2610. if (!ret) {
  2611. if (!test_bit(STATUS_READY, &priv->status)) {
  2612. IWL_ERR(priv,
  2613. "Wait for START_ALIVE timeout after %dms.\n",
  2614. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2615. ret = -ETIMEDOUT;
  2616. goto out_release_irq;
  2617. }
  2618. }
  2619. /* ucode is running and will send rfkill notifications,
  2620. * no need to poll the killswitch state anymore */
  2621. cancel_delayed_work(&priv->rfkill_poll);
  2622. iwl_led_start(priv);
  2623. priv->is_open = 1;
  2624. IWL_DEBUG_MAC80211(priv, "leave\n");
  2625. return 0;
  2626. out_release_irq:
  2627. priv->is_open = 0;
  2628. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2629. return ret;
  2630. }
  2631. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2632. {
  2633. struct iwl_priv *priv = hw->priv;
  2634. IWL_DEBUG_MAC80211(priv, "enter\n");
  2635. if (!priv->is_open) {
  2636. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2637. return;
  2638. }
  2639. priv->is_open = 0;
  2640. if (iwl_is_ready_rf(priv)) {
  2641. /* stop mac, cancel any scan request and clear
  2642. * RXON_FILTER_ASSOC_MSK BIT
  2643. */
  2644. mutex_lock(&priv->mutex);
  2645. iwl_scan_cancel_timeout(priv, 100);
  2646. mutex_unlock(&priv->mutex);
  2647. }
  2648. iwl3945_down(priv);
  2649. flush_workqueue(priv->workqueue);
  2650. /* start polling the killswitch state again */
  2651. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2652. round_jiffies_relative(2 * HZ));
  2653. IWL_DEBUG_MAC80211(priv, "leave\n");
  2654. }
  2655. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2656. {
  2657. struct iwl_priv *priv = hw->priv;
  2658. IWL_DEBUG_MAC80211(priv, "enter\n");
  2659. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2660. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2661. if (iwl3945_tx_skb(priv, skb))
  2662. dev_kfree_skb_any(skb);
  2663. IWL_DEBUG_MAC80211(priv, "leave\n");
  2664. return NETDEV_TX_OK;
  2665. }
  2666. void iwl3945_config_ap(struct iwl_priv *priv)
  2667. {
  2668. int rc = 0;
  2669. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2670. return;
  2671. /* The following should be done only at AP bring up */
  2672. if (!(iwl_is_associated(priv))) {
  2673. /* RXON - unassoc (to set timing command) */
  2674. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2675. iwlcore_commit_rxon(priv);
  2676. /* RXON Timing */
  2677. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2678. iwl_setup_rxon_timing(priv);
  2679. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2680. sizeof(priv->rxon_timing),
  2681. &priv->rxon_timing);
  2682. if (rc)
  2683. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2684. "Attempting to continue.\n");
  2685. /* FIXME: what should be the assoc_id for AP? */
  2686. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2687. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2688. priv->staging_rxon.flags |=
  2689. RXON_FLG_SHORT_PREAMBLE_MSK;
  2690. else
  2691. priv->staging_rxon.flags &=
  2692. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2693. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2694. if (priv->assoc_capability &
  2695. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2696. priv->staging_rxon.flags |=
  2697. RXON_FLG_SHORT_SLOT_MSK;
  2698. else
  2699. priv->staging_rxon.flags &=
  2700. ~RXON_FLG_SHORT_SLOT_MSK;
  2701. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2702. priv->staging_rxon.flags &=
  2703. ~RXON_FLG_SHORT_SLOT_MSK;
  2704. }
  2705. /* restore RXON assoc */
  2706. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2707. iwlcore_commit_rxon(priv);
  2708. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2709. }
  2710. iwl3945_send_beacon_cmd(priv);
  2711. /* FIXME - we need to add code here to detect a totally new
  2712. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2713. * clear sta table, add BCAST sta... */
  2714. }
  2715. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2716. struct ieee80211_vif *vif,
  2717. struct ieee80211_sta *sta,
  2718. struct ieee80211_key_conf *key)
  2719. {
  2720. struct iwl_priv *priv = hw->priv;
  2721. const u8 *addr;
  2722. int ret = 0;
  2723. u8 sta_id = IWL_INVALID_STATION;
  2724. u8 static_key;
  2725. IWL_DEBUG_MAC80211(priv, "enter\n");
  2726. if (iwl3945_mod_params.sw_crypto) {
  2727. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2728. return -EOPNOTSUPP;
  2729. }
  2730. addr = sta ? sta->addr : iwl_bcast_addr;
  2731. static_key = !iwl_is_associated(priv);
  2732. if (!static_key) {
  2733. sta_id = iwl_find_station(priv, addr);
  2734. if (sta_id == IWL_INVALID_STATION) {
  2735. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2736. addr);
  2737. return -EINVAL;
  2738. }
  2739. }
  2740. mutex_lock(&priv->mutex);
  2741. iwl_scan_cancel_timeout(priv, 100);
  2742. mutex_unlock(&priv->mutex);
  2743. switch (cmd) {
  2744. case SET_KEY:
  2745. if (static_key)
  2746. ret = iwl3945_set_static_key(priv, key);
  2747. else
  2748. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2749. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2750. break;
  2751. case DISABLE_KEY:
  2752. if (static_key)
  2753. ret = iwl3945_remove_static_key(priv);
  2754. else
  2755. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2756. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2757. break;
  2758. default:
  2759. ret = -EINVAL;
  2760. }
  2761. IWL_DEBUG_MAC80211(priv, "leave\n");
  2762. return ret;
  2763. }
  2764. /*****************************************************************************
  2765. *
  2766. * sysfs attributes
  2767. *
  2768. *****************************************************************************/
  2769. #ifdef CONFIG_IWLWIFI_DEBUG
  2770. /*
  2771. * The following adds a new attribute to the sysfs representation
  2772. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2773. * used for controlling the debug level.
  2774. *
  2775. * See the level definitions in iwl for details.
  2776. *
  2777. * The debug_level being managed using sysfs below is a per device debug
  2778. * level that is used instead of the global debug level if it (the per
  2779. * device debug level) is set.
  2780. */
  2781. static ssize_t show_debug_level(struct device *d,
  2782. struct device_attribute *attr, char *buf)
  2783. {
  2784. struct iwl_priv *priv = dev_get_drvdata(d);
  2785. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2786. }
  2787. static ssize_t store_debug_level(struct device *d,
  2788. struct device_attribute *attr,
  2789. const char *buf, size_t count)
  2790. {
  2791. struct iwl_priv *priv = dev_get_drvdata(d);
  2792. unsigned long val;
  2793. int ret;
  2794. ret = strict_strtoul(buf, 0, &val);
  2795. if (ret)
  2796. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2797. else {
  2798. priv->debug_level = val;
  2799. if (iwl_alloc_traffic_mem(priv))
  2800. IWL_ERR(priv,
  2801. "Not enough memory to generate traffic log\n");
  2802. }
  2803. return strnlen(buf, count);
  2804. }
  2805. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2806. show_debug_level, store_debug_level);
  2807. #endif /* CONFIG_IWLWIFI_DEBUG */
  2808. static ssize_t show_temperature(struct device *d,
  2809. struct device_attribute *attr, char *buf)
  2810. {
  2811. struct iwl_priv *priv = dev_get_drvdata(d);
  2812. if (!iwl_is_alive(priv))
  2813. return -EAGAIN;
  2814. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2815. }
  2816. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2817. static ssize_t show_tx_power(struct device *d,
  2818. struct device_attribute *attr, char *buf)
  2819. {
  2820. struct iwl_priv *priv = dev_get_drvdata(d);
  2821. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2822. }
  2823. static ssize_t store_tx_power(struct device *d,
  2824. struct device_attribute *attr,
  2825. const char *buf, size_t count)
  2826. {
  2827. struct iwl_priv *priv = dev_get_drvdata(d);
  2828. char *p = (char *)buf;
  2829. u32 val;
  2830. val = simple_strtoul(p, &p, 10);
  2831. if (p == buf)
  2832. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2833. else
  2834. iwl3945_hw_reg_set_txpower(priv, val);
  2835. return count;
  2836. }
  2837. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2838. static ssize_t show_flags(struct device *d,
  2839. struct device_attribute *attr, char *buf)
  2840. {
  2841. struct iwl_priv *priv = dev_get_drvdata(d);
  2842. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2843. }
  2844. static ssize_t store_flags(struct device *d,
  2845. struct device_attribute *attr,
  2846. const char *buf, size_t count)
  2847. {
  2848. struct iwl_priv *priv = dev_get_drvdata(d);
  2849. u32 flags = simple_strtoul(buf, NULL, 0);
  2850. mutex_lock(&priv->mutex);
  2851. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2852. /* Cancel any currently running scans... */
  2853. if (iwl_scan_cancel_timeout(priv, 100))
  2854. IWL_WARN(priv, "Could not cancel scan.\n");
  2855. else {
  2856. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2857. flags);
  2858. priv->staging_rxon.flags = cpu_to_le32(flags);
  2859. iwlcore_commit_rxon(priv);
  2860. }
  2861. }
  2862. mutex_unlock(&priv->mutex);
  2863. return count;
  2864. }
  2865. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2866. static ssize_t show_filter_flags(struct device *d,
  2867. struct device_attribute *attr, char *buf)
  2868. {
  2869. struct iwl_priv *priv = dev_get_drvdata(d);
  2870. return sprintf(buf, "0x%04X\n",
  2871. le32_to_cpu(priv->active_rxon.filter_flags));
  2872. }
  2873. static ssize_t store_filter_flags(struct device *d,
  2874. struct device_attribute *attr,
  2875. const char *buf, size_t count)
  2876. {
  2877. struct iwl_priv *priv = dev_get_drvdata(d);
  2878. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2879. mutex_lock(&priv->mutex);
  2880. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2881. /* Cancel any currently running scans... */
  2882. if (iwl_scan_cancel_timeout(priv, 100))
  2883. IWL_WARN(priv, "Could not cancel scan.\n");
  2884. else {
  2885. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2886. "0x%04X\n", filter_flags);
  2887. priv->staging_rxon.filter_flags =
  2888. cpu_to_le32(filter_flags);
  2889. iwlcore_commit_rxon(priv);
  2890. }
  2891. }
  2892. mutex_unlock(&priv->mutex);
  2893. return count;
  2894. }
  2895. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2896. store_filter_flags);
  2897. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2898. static ssize_t show_measurement(struct device *d,
  2899. struct device_attribute *attr, char *buf)
  2900. {
  2901. struct iwl_priv *priv = dev_get_drvdata(d);
  2902. struct iwl_spectrum_notification measure_report;
  2903. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2904. u8 *data = (u8 *)&measure_report;
  2905. unsigned long flags;
  2906. spin_lock_irqsave(&priv->lock, flags);
  2907. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2908. spin_unlock_irqrestore(&priv->lock, flags);
  2909. return 0;
  2910. }
  2911. memcpy(&measure_report, &priv->measure_report, size);
  2912. priv->measurement_status = 0;
  2913. spin_unlock_irqrestore(&priv->lock, flags);
  2914. while (size && (PAGE_SIZE - len)) {
  2915. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2916. PAGE_SIZE - len, 1);
  2917. len = strlen(buf);
  2918. if (PAGE_SIZE - len)
  2919. buf[len++] = '\n';
  2920. ofs += 16;
  2921. size -= min(size, 16U);
  2922. }
  2923. return len;
  2924. }
  2925. static ssize_t store_measurement(struct device *d,
  2926. struct device_attribute *attr,
  2927. const char *buf, size_t count)
  2928. {
  2929. struct iwl_priv *priv = dev_get_drvdata(d);
  2930. struct ieee80211_measurement_params params = {
  2931. .channel = le16_to_cpu(priv->active_rxon.channel),
  2932. .start_time = cpu_to_le64(priv->last_tsf),
  2933. .duration = cpu_to_le16(1),
  2934. };
  2935. u8 type = IWL_MEASURE_BASIC;
  2936. u8 buffer[32];
  2937. u8 channel;
  2938. if (count) {
  2939. char *p = buffer;
  2940. strncpy(buffer, buf, min(sizeof(buffer), count));
  2941. channel = simple_strtoul(p, NULL, 0);
  2942. if (channel)
  2943. params.channel = channel;
  2944. p = buffer;
  2945. while (*p && *p != ' ')
  2946. p++;
  2947. if (*p)
  2948. type = simple_strtoul(p + 1, NULL, 0);
  2949. }
  2950. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2951. "channel %d (for '%s')\n", type, params.channel, buf);
  2952. iwl3945_get_measurement(priv, &params, type);
  2953. return count;
  2954. }
  2955. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2956. show_measurement, store_measurement);
  2957. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2958. static ssize_t store_retry_rate(struct device *d,
  2959. struct device_attribute *attr,
  2960. const char *buf, size_t count)
  2961. {
  2962. struct iwl_priv *priv = dev_get_drvdata(d);
  2963. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2964. if (priv->retry_rate <= 0)
  2965. priv->retry_rate = 1;
  2966. return count;
  2967. }
  2968. static ssize_t show_retry_rate(struct device *d,
  2969. struct device_attribute *attr, char *buf)
  2970. {
  2971. struct iwl_priv *priv = dev_get_drvdata(d);
  2972. return sprintf(buf, "%d", priv->retry_rate);
  2973. }
  2974. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2975. store_retry_rate);
  2976. static ssize_t show_channels(struct device *d,
  2977. struct device_attribute *attr, char *buf)
  2978. {
  2979. /* all this shit doesn't belong into sysfs anyway */
  2980. return 0;
  2981. }
  2982. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2983. static ssize_t show_statistics(struct device *d,
  2984. struct device_attribute *attr, char *buf)
  2985. {
  2986. struct iwl_priv *priv = dev_get_drvdata(d);
  2987. u32 size = sizeof(struct iwl3945_notif_statistics);
  2988. u32 len = 0, ofs = 0;
  2989. u8 *data = (u8 *)&priv->statistics_39;
  2990. int rc = 0;
  2991. if (!iwl_is_alive(priv))
  2992. return -EAGAIN;
  2993. mutex_lock(&priv->mutex);
  2994. rc = iwl_send_statistics_request(priv, 0);
  2995. mutex_unlock(&priv->mutex);
  2996. if (rc) {
  2997. len = sprintf(buf,
  2998. "Error sending statistics request: 0x%08X\n", rc);
  2999. return len;
  3000. }
  3001. while (size && (PAGE_SIZE - len)) {
  3002. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3003. PAGE_SIZE - len, 1);
  3004. len = strlen(buf);
  3005. if (PAGE_SIZE - len)
  3006. buf[len++] = '\n';
  3007. ofs += 16;
  3008. size -= min(size, 16U);
  3009. }
  3010. return len;
  3011. }
  3012. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3013. static ssize_t show_antenna(struct device *d,
  3014. struct device_attribute *attr, char *buf)
  3015. {
  3016. struct iwl_priv *priv = dev_get_drvdata(d);
  3017. if (!iwl_is_alive(priv))
  3018. return -EAGAIN;
  3019. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3020. }
  3021. static ssize_t store_antenna(struct device *d,
  3022. struct device_attribute *attr,
  3023. const char *buf, size_t count)
  3024. {
  3025. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3026. int ant;
  3027. if (count == 0)
  3028. return 0;
  3029. if (sscanf(buf, "%1i", &ant) != 1) {
  3030. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3031. return count;
  3032. }
  3033. if ((ant >= 0) && (ant <= 2)) {
  3034. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3035. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3036. } else
  3037. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3038. return count;
  3039. }
  3040. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3041. static ssize_t show_status(struct device *d,
  3042. struct device_attribute *attr, char *buf)
  3043. {
  3044. struct iwl_priv *priv = dev_get_drvdata(d);
  3045. if (!iwl_is_alive(priv))
  3046. return -EAGAIN;
  3047. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3048. }
  3049. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3050. static ssize_t dump_error_log(struct device *d,
  3051. struct device_attribute *attr,
  3052. const char *buf, size_t count)
  3053. {
  3054. struct iwl_priv *priv = dev_get_drvdata(d);
  3055. char *p = (char *)buf;
  3056. if (p[0] == '1')
  3057. iwl3945_dump_nic_error_log(priv);
  3058. return strnlen(buf, count);
  3059. }
  3060. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3061. /*****************************************************************************
  3062. *
  3063. * driver setup and tear down
  3064. *
  3065. *****************************************************************************/
  3066. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3067. {
  3068. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3069. init_waitqueue_head(&priv->wait_command_queue);
  3070. INIT_WORK(&priv->up, iwl3945_bg_up);
  3071. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3072. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3073. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3074. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3075. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3076. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3077. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3078. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3079. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3080. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3081. iwl3945_hw_setup_deferred_work(priv);
  3082. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3083. iwl3945_irq_tasklet, (unsigned long)priv);
  3084. }
  3085. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3086. {
  3087. iwl3945_hw_cancel_deferred_work(priv);
  3088. cancel_delayed_work_sync(&priv->init_alive_start);
  3089. cancel_delayed_work(&priv->scan_check);
  3090. cancel_delayed_work(&priv->alive_start);
  3091. cancel_work_sync(&priv->beacon_update);
  3092. }
  3093. static struct attribute *iwl3945_sysfs_entries[] = {
  3094. &dev_attr_antenna.attr,
  3095. &dev_attr_channels.attr,
  3096. &dev_attr_dump_errors.attr,
  3097. &dev_attr_flags.attr,
  3098. &dev_attr_filter_flags.attr,
  3099. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3100. &dev_attr_measurement.attr,
  3101. #endif
  3102. &dev_attr_retry_rate.attr,
  3103. &dev_attr_statistics.attr,
  3104. &dev_attr_status.attr,
  3105. &dev_attr_temperature.attr,
  3106. &dev_attr_tx_power.attr,
  3107. #ifdef CONFIG_IWLWIFI_DEBUG
  3108. &dev_attr_debug_level.attr,
  3109. #endif
  3110. NULL
  3111. };
  3112. static struct attribute_group iwl3945_attribute_group = {
  3113. .name = NULL, /* put in device directory */
  3114. .attrs = iwl3945_sysfs_entries,
  3115. };
  3116. static struct ieee80211_ops iwl3945_hw_ops = {
  3117. .tx = iwl3945_mac_tx,
  3118. .start = iwl3945_mac_start,
  3119. .stop = iwl3945_mac_stop,
  3120. .add_interface = iwl_mac_add_interface,
  3121. .remove_interface = iwl_mac_remove_interface,
  3122. .config = iwl_mac_config,
  3123. .configure_filter = iwl_configure_filter,
  3124. .set_key = iwl3945_mac_set_key,
  3125. .get_tx_stats = iwl_mac_get_tx_stats,
  3126. .conf_tx = iwl_mac_conf_tx,
  3127. .reset_tsf = iwl_mac_reset_tsf,
  3128. .bss_info_changed = iwl_bss_info_changed,
  3129. .hw_scan = iwl_mac_hw_scan
  3130. };
  3131. static int iwl3945_init_drv(struct iwl_priv *priv)
  3132. {
  3133. int ret;
  3134. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3135. priv->retry_rate = 1;
  3136. priv->ibss_beacon = NULL;
  3137. spin_lock_init(&priv->lock);
  3138. spin_lock_init(&priv->sta_lock);
  3139. spin_lock_init(&priv->hcmd_lock);
  3140. INIT_LIST_HEAD(&priv->free_frames);
  3141. mutex_init(&priv->mutex);
  3142. /* Clear the driver's (not device's) station table */
  3143. iwl_clear_stations_table(priv);
  3144. priv->ieee_channels = NULL;
  3145. priv->ieee_rates = NULL;
  3146. priv->band = IEEE80211_BAND_2GHZ;
  3147. priv->iw_mode = NL80211_IFTYPE_STATION;
  3148. iwl_reset_qos(priv);
  3149. priv->qos_data.qos_active = 0;
  3150. priv->qos_data.qos_cap.val = 0;
  3151. priv->rates_mask = IWL_RATES_MASK;
  3152. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3153. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3154. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3155. eeprom->version);
  3156. ret = -EINVAL;
  3157. goto err;
  3158. }
  3159. ret = iwl_init_channel_map(priv);
  3160. if (ret) {
  3161. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3162. goto err;
  3163. }
  3164. /* Set up txpower settings in driver for all channels */
  3165. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3166. ret = -EIO;
  3167. goto err_free_channel_map;
  3168. }
  3169. ret = iwlcore_init_geos(priv);
  3170. if (ret) {
  3171. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3172. goto err_free_channel_map;
  3173. }
  3174. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3175. return 0;
  3176. err_free_channel_map:
  3177. iwl_free_channel_map(priv);
  3178. err:
  3179. return ret;
  3180. }
  3181. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3182. {
  3183. int ret;
  3184. struct ieee80211_hw *hw = priv->hw;
  3185. hw->rate_control_algorithm = "iwl-3945-rs";
  3186. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3187. /* Tell mac80211 our characteristics */
  3188. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3189. IEEE80211_HW_NOISE_DBM |
  3190. IEEE80211_HW_SPECTRUM_MGMT |
  3191. IEEE80211_HW_SUPPORTS_PS |
  3192. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3193. hw->wiphy->interface_modes =
  3194. BIT(NL80211_IFTYPE_STATION) |
  3195. BIT(NL80211_IFTYPE_ADHOC);
  3196. hw->wiphy->custom_regulatory = true;
  3197. /* Firmware does not support this */
  3198. hw->wiphy->disable_beacon_hints = true;
  3199. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3200. /* we create the 802.11 header and a zero-length SSID element */
  3201. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3202. /* Default value; 4 EDCA QOS priorities */
  3203. hw->queues = 4;
  3204. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3205. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3206. &priv->bands[IEEE80211_BAND_2GHZ];
  3207. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3208. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3209. &priv->bands[IEEE80211_BAND_5GHZ];
  3210. ret = ieee80211_register_hw(priv->hw);
  3211. if (ret) {
  3212. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3213. return ret;
  3214. }
  3215. priv->mac80211_registered = 1;
  3216. return 0;
  3217. }
  3218. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3219. {
  3220. int err = 0;
  3221. struct iwl_priv *priv;
  3222. struct ieee80211_hw *hw;
  3223. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3224. struct iwl3945_eeprom *eeprom;
  3225. unsigned long flags;
  3226. /***********************
  3227. * 1. Allocating HW data
  3228. * ********************/
  3229. /* mac80211 allocates memory for this device instance, including
  3230. * space for this driver's private structure */
  3231. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3232. if (hw == NULL) {
  3233. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3234. err = -ENOMEM;
  3235. goto out;
  3236. }
  3237. priv = hw->priv;
  3238. SET_IEEE80211_DEV(hw, &pdev->dev);
  3239. /*
  3240. * Disabling hardware scan means that mac80211 will perform scans
  3241. * "the hard way", rather than using device's scan.
  3242. */
  3243. if (iwl3945_mod_params.disable_hw_scan) {
  3244. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3245. iwl3945_hw_ops.hw_scan = NULL;
  3246. }
  3247. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3248. priv->cfg = cfg;
  3249. priv->pci_dev = pdev;
  3250. priv->inta_mask = CSR_INI_SET_MASK;
  3251. #ifdef CONFIG_IWLWIFI_DEBUG
  3252. atomic_set(&priv->restrict_refcnt, 0);
  3253. #endif
  3254. if (iwl_alloc_traffic_mem(priv))
  3255. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3256. /***************************
  3257. * 2. Initializing PCI bus
  3258. * *************************/
  3259. if (pci_enable_device(pdev)) {
  3260. err = -ENODEV;
  3261. goto out_ieee80211_free_hw;
  3262. }
  3263. pci_set_master(pdev);
  3264. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3265. if (!err)
  3266. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3267. if (err) {
  3268. IWL_WARN(priv, "No suitable DMA available.\n");
  3269. goto out_pci_disable_device;
  3270. }
  3271. pci_set_drvdata(pdev, priv);
  3272. err = pci_request_regions(pdev, DRV_NAME);
  3273. if (err)
  3274. goto out_pci_disable_device;
  3275. /***********************
  3276. * 3. Read REV Register
  3277. * ********************/
  3278. priv->hw_base = pci_iomap(pdev, 0, 0);
  3279. if (!priv->hw_base) {
  3280. err = -ENODEV;
  3281. goto out_pci_release_regions;
  3282. }
  3283. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3284. (unsigned long long) pci_resource_len(pdev, 0));
  3285. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3286. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3287. * PCI Tx retries from interfering with C3 CPU state */
  3288. pci_write_config_byte(pdev, 0x41, 0x00);
  3289. /* this spin lock will be used in apm_ops.init and EEPROM access
  3290. * we should init now
  3291. */
  3292. spin_lock_init(&priv->reg_lock);
  3293. /* amp init */
  3294. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3295. if (err < 0) {
  3296. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3297. goto out_iounmap;
  3298. }
  3299. /***********************
  3300. * 4. Read EEPROM
  3301. * ********************/
  3302. /* Read the EEPROM */
  3303. err = iwl_eeprom_init(priv);
  3304. if (err) {
  3305. IWL_ERR(priv, "Unable to init EEPROM\n");
  3306. goto out_iounmap;
  3307. }
  3308. /* MAC Address location in EEPROM same for 3945/4965 */
  3309. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3310. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3311. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3312. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3313. /***********************
  3314. * 5. Setup HW Constants
  3315. * ********************/
  3316. /* Device-specific setup */
  3317. if (iwl3945_hw_set_hw_params(priv)) {
  3318. IWL_ERR(priv, "failed to set hw settings\n");
  3319. goto out_eeprom_free;
  3320. }
  3321. /***********************
  3322. * 6. Setup priv
  3323. * ********************/
  3324. err = iwl3945_init_drv(priv);
  3325. if (err) {
  3326. IWL_ERR(priv, "initializing driver failed\n");
  3327. goto out_unset_hw_params;
  3328. }
  3329. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3330. priv->cfg->name);
  3331. /***********************
  3332. * 7. Setup Services
  3333. * ********************/
  3334. spin_lock_irqsave(&priv->lock, flags);
  3335. iwl_disable_interrupts(priv);
  3336. spin_unlock_irqrestore(&priv->lock, flags);
  3337. pci_enable_msi(priv->pci_dev);
  3338. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3339. IRQF_SHARED, DRV_NAME, priv);
  3340. if (err) {
  3341. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3342. goto out_disable_msi;
  3343. }
  3344. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3345. if (err) {
  3346. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3347. goto out_release_irq;
  3348. }
  3349. iwl_set_rxon_channel(priv,
  3350. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3351. iwl3945_setup_deferred_work(priv);
  3352. iwl3945_setup_rx_handlers(priv);
  3353. iwl_power_initialize(priv);
  3354. /*********************************
  3355. * 8. Setup and Register mac80211
  3356. * *******************************/
  3357. iwl_enable_interrupts(priv);
  3358. err = iwl3945_setup_mac(priv);
  3359. if (err)
  3360. goto out_remove_sysfs;
  3361. err = iwl_dbgfs_register(priv, DRV_NAME);
  3362. if (err)
  3363. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3364. /* Start monitoring the killswitch */
  3365. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3366. 2 * HZ);
  3367. return 0;
  3368. out_remove_sysfs:
  3369. destroy_workqueue(priv->workqueue);
  3370. priv->workqueue = NULL;
  3371. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3372. out_release_irq:
  3373. free_irq(priv->pci_dev->irq, priv);
  3374. out_disable_msi:
  3375. pci_disable_msi(priv->pci_dev);
  3376. iwlcore_free_geos(priv);
  3377. iwl_free_channel_map(priv);
  3378. out_unset_hw_params:
  3379. iwl3945_unset_hw_params(priv);
  3380. out_eeprom_free:
  3381. iwl_eeprom_free(priv);
  3382. out_iounmap:
  3383. pci_iounmap(pdev, priv->hw_base);
  3384. out_pci_release_regions:
  3385. pci_release_regions(pdev);
  3386. out_pci_disable_device:
  3387. pci_set_drvdata(pdev, NULL);
  3388. pci_disable_device(pdev);
  3389. out_ieee80211_free_hw:
  3390. iwl_free_traffic_mem(priv);
  3391. ieee80211_free_hw(priv->hw);
  3392. out:
  3393. return err;
  3394. }
  3395. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3396. {
  3397. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3398. unsigned long flags;
  3399. if (!priv)
  3400. return;
  3401. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3402. iwl_dbgfs_unregister(priv);
  3403. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3404. if (priv->mac80211_registered) {
  3405. ieee80211_unregister_hw(priv->hw);
  3406. priv->mac80211_registered = 0;
  3407. } else {
  3408. iwl3945_down(priv);
  3409. }
  3410. /* make sure we flush any pending irq or
  3411. * tasklet for the driver
  3412. */
  3413. spin_lock_irqsave(&priv->lock, flags);
  3414. iwl_disable_interrupts(priv);
  3415. spin_unlock_irqrestore(&priv->lock, flags);
  3416. iwl_synchronize_irq(priv);
  3417. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3418. cancel_delayed_work_sync(&priv->rfkill_poll);
  3419. iwl3945_dealloc_ucode_pci(priv);
  3420. if (priv->rxq.bd)
  3421. iwl3945_rx_queue_free(priv, &priv->rxq);
  3422. iwl3945_hw_txq_ctx_free(priv);
  3423. iwl3945_unset_hw_params(priv);
  3424. iwl_clear_stations_table(priv);
  3425. /*netif_stop_queue(dev); */
  3426. flush_workqueue(priv->workqueue);
  3427. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3428. * priv->workqueue... so we can't take down the workqueue
  3429. * until now... */
  3430. destroy_workqueue(priv->workqueue);
  3431. priv->workqueue = NULL;
  3432. iwl_free_traffic_mem(priv);
  3433. free_irq(pdev->irq, priv);
  3434. pci_disable_msi(pdev);
  3435. pci_iounmap(pdev, priv->hw_base);
  3436. pci_release_regions(pdev);
  3437. pci_disable_device(pdev);
  3438. pci_set_drvdata(pdev, NULL);
  3439. iwl_free_channel_map(priv);
  3440. iwlcore_free_geos(priv);
  3441. kfree(priv->scan);
  3442. if (priv->ibss_beacon)
  3443. dev_kfree_skb(priv->ibss_beacon);
  3444. ieee80211_free_hw(priv->hw);
  3445. }
  3446. /*****************************************************************************
  3447. *
  3448. * driver and module entry point
  3449. *
  3450. *****************************************************************************/
  3451. static struct pci_driver iwl3945_driver = {
  3452. .name = DRV_NAME,
  3453. .id_table = iwl3945_hw_card_ids,
  3454. .probe = iwl3945_pci_probe,
  3455. .remove = __devexit_p(iwl3945_pci_remove),
  3456. #ifdef CONFIG_PM
  3457. .suspend = iwl_pci_suspend,
  3458. .resume = iwl_pci_resume,
  3459. #endif
  3460. };
  3461. static int __init iwl3945_init(void)
  3462. {
  3463. int ret;
  3464. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3465. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3466. ret = iwl3945_rate_control_register();
  3467. if (ret) {
  3468. printk(KERN_ERR DRV_NAME
  3469. "Unable to register rate control algorithm: %d\n", ret);
  3470. return ret;
  3471. }
  3472. ret = pci_register_driver(&iwl3945_driver);
  3473. if (ret) {
  3474. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3475. goto error_register;
  3476. }
  3477. return ret;
  3478. error_register:
  3479. iwl3945_rate_control_unregister();
  3480. return ret;
  3481. }
  3482. static void __exit iwl3945_exit(void)
  3483. {
  3484. pci_unregister_driver(&iwl3945_driver);
  3485. iwl3945_rate_control_unregister();
  3486. }
  3487. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3488. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3489. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3490. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3491. MODULE_PARM_DESC(swcrypto,
  3492. "using software crypto (default 1 [software])\n");
  3493. #ifdef CONFIG_IWLWIFI_DEBUG
  3494. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3495. MODULE_PARM_DESC(debug, "debug output mask");
  3496. #endif
  3497. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3498. int, S_IRUGO);
  3499. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3500. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3501. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3502. module_exit(iwl3945_exit);
  3503. module_init(iwl3945_init);