common.c 16 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <linux/slab.h>
  12. #include <asm/acpi.h>
  13. #include <asm/segment.h>
  14. #include <asm/io.h>
  15. #include <asm/smp.h>
  16. #include <asm/pci_x86.h>
  17. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  18. PCI_PROBE_MMCONF;
  19. unsigned int pci_early_dump_regs;
  20. static int pci_bf_sort;
  21. static int smbios_type_b1_flag;
  22. int pci_routeirq;
  23. int noioapicquirk;
  24. #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
  25. int noioapicreroute = 0;
  26. #else
  27. int noioapicreroute = 1;
  28. #endif
  29. int pcibios_last_bus = -1;
  30. unsigned long pirq_table_addr;
  31. struct pci_bus *pci_root_bus;
  32. const struct pci_raw_ops *__read_mostly raw_pci_ops;
  33. const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
  34. int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
  35. int reg, int len, u32 *val)
  36. {
  37. if (domain == 0 && reg < 256 && raw_pci_ops)
  38. return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
  39. if (raw_pci_ext_ops)
  40. return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
  41. return -EINVAL;
  42. }
  43. int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
  44. int reg, int len, u32 val)
  45. {
  46. if (domain == 0 && reg < 256 && raw_pci_ops)
  47. return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
  48. if (raw_pci_ext_ops)
  49. return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
  50. return -EINVAL;
  51. }
  52. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  53. {
  54. return raw_pci_read(pci_domain_nr(bus), bus->number,
  55. devfn, where, size, value);
  56. }
  57. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  58. {
  59. return raw_pci_write(pci_domain_nr(bus), bus->number,
  60. devfn, where, size, value);
  61. }
  62. struct pci_ops pci_root_ops = {
  63. .read = pci_read,
  64. .write = pci_write,
  65. };
  66. /*
  67. * This interrupt-safe spinlock protects all accesses to PCI
  68. * configuration space.
  69. */
  70. DEFINE_RAW_SPINLOCK(pci_config_lock);
  71. static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
  72. {
  73. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  74. printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
  75. return 0;
  76. }
  77. static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitconst = {
  78. /*
  79. * Systems where PCI IO resource ISA alignment can be skipped
  80. * when the ISA enable bit in the bridge control is not set
  81. */
  82. {
  83. .callback = can_skip_ioresource_align,
  84. .ident = "IBM System x3800",
  85. .matches = {
  86. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  87. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  88. },
  89. },
  90. {
  91. .callback = can_skip_ioresource_align,
  92. .ident = "IBM System x3850",
  93. .matches = {
  94. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  95. DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
  96. },
  97. },
  98. {
  99. .callback = can_skip_ioresource_align,
  100. .ident = "IBM System x3950",
  101. .matches = {
  102. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  103. DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
  104. },
  105. },
  106. {}
  107. };
  108. void __init dmi_check_skip_isa_align(void)
  109. {
  110. dmi_check_system(can_skip_pciprobe_dmi_table);
  111. }
  112. static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
  113. {
  114. struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
  115. struct resource *bar_r;
  116. int bar;
  117. if (pci_probe & PCI_NOASSIGN_BARS) {
  118. /*
  119. * If the BIOS did not assign the BAR, zero out the
  120. * resource so the kernel doesn't attmept to assign
  121. * it later on in pci_assign_unassigned_resources
  122. */
  123. for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
  124. bar_r = &dev->resource[bar];
  125. if (bar_r->start == 0 && bar_r->end != 0) {
  126. bar_r->flags = 0;
  127. bar_r->end = 0;
  128. }
  129. }
  130. }
  131. if (pci_probe & PCI_NOASSIGN_ROMS) {
  132. if (rom_r->parent)
  133. return;
  134. if (rom_r->start) {
  135. /* we deal with BIOS assigned ROM later */
  136. return;
  137. }
  138. rom_r->start = rom_r->end = rom_r->flags = 0;
  139. }
  140. }
  141. /*
  142. * Called after each bus is probed, but before its children
  143. * are examined.
  144. */
  145. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  146. {
  147. struct pci_dev *dev;
  148. pci_read_bridge_bases(b);
  149. list_for_each_entry(dev, &b->devices, bus_list)
  150. pcibios_fixup_device_resources(dev);
  151. }
  152. /*
  153. * Only use DMI information to set this if nothing was passed
  154. * on the kernel command line (which was parsed earlier).
  155. */
  156. static int __devinit set_bf_sort(const struct dmi_system_id *d)
  157. {
  158. if (pci_bf_sort == pci_bf_sort_default) {
  159. pci_bf_sort = pci_dmi_bf;
  160. printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
  161. }
  162. return 0;
  163. }
  164. static void __devinit read_dmi_type_b1(const struct dmi_header *dm,
  165. void *private_data)
  166. {
  167. u8 *d = (u8 *)dm + 4;
  168. if (dm->type != 0xB1)
  169. return;
  170. switch (((*(u32 *)d) >> 9) & 0x03) {
  171. case 0x00:
  172. printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
  173. break;
  174. case 0x01: /* set pci=bfsort */
  175. smbios_type_b1_flag = 1;
  176. break;
  177. case 0x02: /* do not set pci=bfsort */
  178. smbios_type_b1_flag = 2;
  179. break;
  180. default:
  181. break;
  182. }
  183. }
  184. static int __devinit find_sort_method(const struct dmi_system_id *d)
  185. {
  186. dmi_walk(read_dmi_type_b1, NULL);
  187. if (smbios_type_b1_flag == 1) {
  188. set_bf_sort(d);
  189. return 0;
  190. }
  191. return -1;
  192. }
  193. /*
  194. * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
  195. */
  196. #ifdef __i386__
  197. static int __devinit assign_all_busses(const struct dmi_system_id *d)
  198. {
  199. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  200. printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
  201. " (pci=assign-busses)\n", d->ident);
  202. return 0;
  203. }
  204. #endif
  205. static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
  206. #ifdef __i386__
  207. /*
  208. * Laptops which need pci=assign-busses to see Cardbus cards
  209. */
  210. {
  211. .callback = assign_all_busses,
  212. .ident = "Samsung X20 Laptop",
  213. .matches = {
  214. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  215. DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
  216. },
  217. },
  218. #endif /* __i386__ */
  219. {
  220. .callback = set_bf_sort,
  221. .ident = "Dell PowerEdge 1950",
  222. .matches = {
  223. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  224. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
  225. },
  226. },
  227. {
  228. .callback = set_bf_sort,
  229. .ident = "Dell PowerEdge 1955",
  230. .matches = {
  231. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  232. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
  233. },
  234. },
  235. {
  236. .callback = set_bf_sort,
  237. .ident = "Dell PowerEdge 2900",
  238. .matches = {
  239. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  240. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
  241. },
  242. },
  243. {
  244. .callback = set_bf_sort,
  245. .ident = "Dell PowerEdge 2950",
  246. .matches = {
  247. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  248. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
  249. },
  250. },
  251. {
  252. .callback = set_bf_sort,
  253. .ident = "Dell PowerEdge R900",
  254. .matches = {
  255. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  256. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
  257. },
  258. },
  259. {
  260. .callback = find_sort_method,
  261. .ident = "Dell System",
  262. .matches = {
  263. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
  264. },
  265. },
  266. {
  267. .callback = set_bf_sort,
  268. .ident = "HP ProLiant BL20p G3",
  269. .matches = {
  270. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  271. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
  272. },
  273. },
  274. {
  275. .callback = set_bf_sort,
  276. .ident = "HP ProLiant BL20p G4",
  277. .matches = {
  278. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  279. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
  280. },
  281. },
  282. {
  283. .callback = set_bf_sort,
  284. .ident = "HP ProLiant BL30p G1",
  285. .matches = {
  286. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  287. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
  288. },
  289. },
  290. {
  291. .callback = set_bf_sort,
  292. .ident = "HP ProLiant BL25p G1",
  293. .matches = {
  294. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  295. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
  296. },
  297. },
  298. {
  299. .callback = set_bf_sort,
  300. .ident = "HP ProLiant BL35p G1",
  301. .matches = {
  302. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  303. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
  304. },
  305. },
  306. {
  307. .callback = set_bf_sort,
  308. .ident = "HP ProLiant BL45p G1",
  309. .matches = {
  310. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  311. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
  312. },
  313. },
  314. {
  315. .callback = set_bf_sort,
  316. .ident = "HP ProLiant BL45p G2",
  317. .matches = {
  318. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  319. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
  320. },
  321. },
  322. {
  323. .callback = set_bf_sort,
  324. .ident = "HP ProLiant BL460c G1",
  325. .matches = {
  326. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  327. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
  328. },
  329. },
  330. {
  331. .callback = set_bf_sort,
  332. .ident = "HP ProLiant BL465c G1",
  333. .matches = {
  334. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  335. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
  336. },
  337. },
  338. {
  339. .callback = set_bf_sort,
  340. .ident = "HP ProLiant BL480c G1",
  341. .matches = {
  342. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  343. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
  344. },
  345. },
  346. {
  347. .callback = set_bf_sort,
  348. .ident = "HP ProLiant BL685c G1",
  349. .matches = {
  350. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  351. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
  352. },
  353. },
  354. {
  355. .callback = set_bf_sort,
  356. .ident = "HP ProLiant DL360",
  357. .matches = {
  358. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  359. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
  360. },
  361. },
  362. {
  363. .callback = set_bf_sort,
  364. .ident = "HP ProLiant DL380",
  365. .matches = {
  366. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  367. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
  368. },
  369. },
  370. #ifdef __i386__
  371. {
  372. .callback = assign_all_busses,
  373. .ident = "Compaq EVO N800c",
  374. .matches = {
  375. DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
  376. DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
  377. },
  378. },
  379. #endif
  380. {
  381. .callback = set_bf_sort,
  382. .ident = "HP ProLiant DL385 G2",
  383. .matches = {
  384. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  385. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
  386. },
  387. },
  388. {
  389. .callback = set_bf_sort,
  390. .ident = "HP ProLiant DL585 G2",
  391. .matches = {
  392. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  393. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
  394. },
  395. },
  396. {}
  397. };
  398. void __init dmi_check_pciprobe(void)
  399. {
  400. dmi_check_system(pciprobe_dmi_table);
  401. }
  402. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  403. {
  404. struct pci_bus *bus = NULL;
  405. while ((bus = pci_find_next_bus(bus)) != NULL) {
  406. if (bus->number == busnum) {
  407. /* Already scanned */
  408. return bus;
  409. }
  410. }
  411. return pci_scan_bus_on_node(busnum, &pci_root_ops,
  412. get_mp_bus_to_node(busnum));
  413. }
  414. void __init pcibios_set_cache_line_size(void)
  415. {
  416. struct cpuinfo_x86 *c = &boot_cpu_data;
  417. /*
  418. * Set PCI cacheline size to that of the CPU if the CPU has reported it.
  419. * (For older CPUs that don't support cpuid, we se it to 32 bytes
  420. * It's also good for 386/486s (which actually have 16)
  421. * as quite a few PCI devices do not support smaller values.
  422. */
  423. if (c->x86_clflush_size > 0) {
  424. pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
  425. printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
  426. pci_dfl_cache_line_size << 2);
  427. } else {
  428. pci_dfl_cache_line_size = 32 >> 2;
  429. printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
  430. }
  431. }
  432. int __init pcibios_init(void)
  433. {
  434. if (!raw_pci_ops) {
  435. printk(KERN_WARNING "PCI: System does not support PCI\n");
  436. return 0;
  437. }
  438. pcibios_set_cache_line_size();
  439. pcibios_resource_survey();
  440. if (pci_bf_sort >= pci_force_bf)
  441. pci_sort_breadthfirst();
  442. return 0;
  443. }
  444. char * __devinit pcibios_setup(char *str)
  445. {
  446. if (!strcmp(str, "off")) {
  447. pci_probe = 0;
  448. return NULL;
  449. } else if (!strcmp(str, "bfsort")) {
  450. pci_bf_sort = pci_force_bf;
  451. return NULL;
  452. } else if (!strcmp(str, "nobfsort")) {
  453. pci_bf_sort = pci_force_nobf;
  454. return NULL;
  455. }
  456. #ifdef CONFIG_PCI_BIOS
  457. else if (!strcmp(str, "bios")) {
  458. pci_probe = PCI_PROBE_BIOS;
  459. return NULL;
  460. } else if (!strcmp(str, "nobios")) {
  461. pci_probe &= ~PCI_PROBE_BIOS;
  462. return NULL;
  463. } else if (!strcmp(str, "biosirq")) {
  464. pci_probe |= PCI_BIOS_IRQ_SCAN;
  465. return NULL;
  466. } else if (!strncmp(str, "pirqaddr=", 9)) {
  467. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  468. return NULL;
  469. }
  470. #endif
  471. #ifdef CONFIG_PCI_DIRECT
  472. else if (!strcmp(str, "conf1")) {
  473. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  474. return NULL;
  475. }
  476. else if (!strcmp(str, "conf2")) {
  477. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  478. return NULL;
  479. }
  480. #endif
  481. #ifdef CONFIG_PCI_MMCONFIG
  482. else if (!strcmp(str, "nommconf")) {
  483. pci_probe &= ~PCI_PROBE_MMCONF;
  484. return NULL;
  485. }
  486. else if (!strcmp(str, "check_enable_amd_mmconf")) {
  487. pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  488. return NULL;
  489. }
  490. #endif
  491. else if (!strcmp(str, "noacpi")) {
  492. acpi_noirq_set();
  493. return NULL;
  494. }
  495. else if (!strcmp(str, "noearly")) {
  496. pci_probe |= PCI_PROBE_NOEARLY;
  497. return NULL;
  498. }
  499. #ifndef CONFIG_X86_VISWS
  500. else if (!strcmp(str, "usepirqmask")) {
  501. pci_probe |= PCI_USE_PIRQ_MASK;
  502. return NULL;
  503. } else if (!strncmp(str, "irqmask=", 8)) {
  504. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  505. return NULL;
  506. } else if (!strncmp(str, "lastbus=", 8)) {
  507. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  508. return NULL;
  509. }
  510. #endif
  511. else if (!strcmp(str, "rom")) {
  512. pci_probe |= PCI_ASSIGN_ROMS;
  513. return NULL;
  514. } else if (!strcmp(str, "norom")) {
  515. pci_probe |= PCI_NOASSIGN_ROMS;
  516. return NULL;
  517. } else if (!strcmp(str, "nobar")) {
  518. pci_probe |= PCI_NOASSIGN_BARS;
  519. return NULL;
  520. } else if (!strcmp(str, "assign-busses")) {
  521. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  522. return NULL;
  523. } else if (!strcmp(str, "use_crs")) {
  524. pci_probe |= PCI_USE__CRS;
  525. return NULL;
  526. } else if (!strcmp(str, "nocrs")) {
  527. pci_probe |= PCI_ROOT_NO_CRS;
  528. return NULL;
  529. } else if (!strcmp(str, "earlydump")) {
  530. pci_early_dump_regs = 1;
  531. return NULL;
  532. } else if (!strcmp(str, "routeirq")) {
  533. pci_routeirq = 1;
  534. return NULL;
  535. } else if (!strcmp(str, "skip_isa_align")) {
  536. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  537. return NULL;
  538. } else if (!strcmp(str, "noioapicquirk")) {
  539. noioapicquirk = 1;
  540. return NULL;
  541. } else if (!strcmp(str, "ioapicreroute")) {
  542. if (noioapicreroute != -1)
  543. noioapicreroute = 0;
  544. return NULL;
  545. } else if (!strcmp(str, "noioapicreroute")) {
  546. if (noioapicreroute != -1)
  547. noioapicreroute = 1;
  548. return NULL;
  549. }
  550. return str;
  551. }
  552. unsigned int pcibios_assign_all_busses(void)
  553. {
  554. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  555. }
  556. int pcibios_enable_device(struct pci_dev *dev, int mask)
  557. {
  558. int err;
  559. if ((err = pci_enable_resources(dev, mask)) < 0)
  560. return err;
  561. if (!pci_dev_msi_enabled(dev))
  562. return pcibios_enable_irq(dev);
  563. return 0;
  564. }
  565. void pcibios_disable_device (struct pci_dev *dev)
  566. {
  567. if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
  568. pcibios_disable_irq(dev);
  569. }
  570. int pci_ext_cfg_avail(struct pci_dev *dev)
  571. {
  572. if (raw_pci_ext_ops)
  573. return 1;
  574. else
  575. return 0;
  576. }
  577. struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
  578. {
  579. LIST_HEAD(resources);
  580. struct pci_bus *bus = NULL;
  581. struct pci_sysdata *sd;
  582. /*
  583. * Allocate per-root-bus (not per bus) arch-specific data.
  584. * TODO: leak; this memory is never freed.
  585. * It's arguable whether it's worth the trouble to care.
  586. */
  587. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  588. if (!sd) {
  589. printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
  590. return NULL;
  591. }
  592. sd->node = node;
  593. x86_pci_root_bus_resources(busno, &resources);
  594. printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busno);
  595. bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
  596. if (!bus) {
  597. pci_free_resource_list(&resources);
  598. kfree(sd);
  599. }
  600. return bus;
  601. }
  602. struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
  603. {
  604. return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
  605. }
  606. /*
  607. * NUMA info for PCI busses
  608. *
  609. * Early arch code is responsible for filling in reasonable values here.
  610. * A node id of "-1" means "use current node". In other words, if a bus
  611. * has a -1 node id, it's not tightly coupled to any particular chunk
  612. * of memory (as is the case on some Nehalem systems).
  613. */
  614. #ifdef CONFIG_NUMA
  615. #define BUS_NR 256
  616. #ifdef CONFIG_X86_64
  617. static int mp_bus_to_node[BUS_NR] = {
  618. [0 ... BUS_NR - 1] = -1
  619. };
  620. void set_mp_bus_to_node(int busnum, int node)
  621. {
  622. if (busnum >= 0 && busnum < BUS_NR)
  623. mp_bus_to_node[busnum] = node;
  624. }
  625. int get_mp_bus_to_node(int busnum)
  626. {
  627. int node = -1;
  628. if (busnum < 0 || busnum > (BUS_NR - 1))
  629. return node;
  630. node = mp_bus_to_node[busnum];
  631. /*
  632. * let numa_node_id to decide it later in dma_alloc_pages
  633. * if there is no ram on that node
  634. */
  635. if (node != -1 && !node_online(node))
  636. node = -1;
  637. return node;
  638. }
  639. #else /* CONFIG_X86_32 */
  640. static int mp_bus_to_node[BUS_NR] = {
  641. [0 ... BUS_NR - 1] = -1
  642. };
  643. void set_mp_bus_to_node(int busnum, int node)
  644. {
  645. if (busnum >= 0 && busnum < BUS_NR)
  646. mp_bus_to_node[busnum] = (unsigned char) node;
  647. }
  648. int get_mp_bus_to_node(int busnum)
  649. {
  650. int node;
  651. if (busnum < 0 || busnum > (BUS_NR - 1))
  652. return 0;
  653. node = mp_bus_to_node[busnum];
  654. return node;
  655. }
  656. #endif /* CONFIG_X86_32 */
  657. #endif /* CONFIG_NUMA */