mpparse.c 28 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
  6. * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <asm/smp.h>
  19. #include <asm/mtrr.h>
  20. #include <asm/mpspec.h>
  21. #include <asm/pgalloc.h>
  22. #include <asm/io_apic.h>
  23. #include <asm/proto.h>
  24. #include <asm/acpi.h>
  25. #include <asm/bios_ebda.h>
  26. #include <asm/e820.h>
  27. #include <asm/trampoline.h>
  28. #include <mach_apic.h>
  29. #ifdef CONFIG_X86_32
  30. #include <mach_apicdef.h>
  31. #include <mach_mpparse.h>
  32. #endif
  33. /*
  34. * Checksum an MP configuration block.
  35. */
  36. static int __init mpf_checksum(unsigned char *mp, int len)
  37. {
  38. int sum = 0;
  39. while (len--)
  40. sum += *mp++;
  41. return sum & 0xFF;
  42. }
  43. #ifdef CONFIG_X86_NUMAQ
  44. /*
  45. * Have to match translation table entries to main table entries by counter
  46. * hence the mpc_record variable .... can't see a less disgusting way of
  47. * doing this ....
  48. */
  49. static int mpc_record;
  50. static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
  51. __cpuinitdata;
  52. #endif
  53. static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
  54. {
  55. int apicid;
  56. char *bootup_cpu = "";
  57. if (!(m->mpc_cpuflag & CPU_ENABLED)) {
  58. disabled_cpus++;
  59. return;
  60. }
  61. #ifdef CONFIG_X86_NUMAQ
  62. apicid = mpc_apic_id(m, translation_table[mpc_record]);
  63. #else
  64. apicid = m->mpc_apicid;
  65. #endif
  66. if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
  67. bootup_cpu = " (Bootup-CPU)";
  68. boot_cpu_physical_apicid = m->mpc_apicid;
  69. }
  70. printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
  71. generic_processor_info(apicid, m->mpc_apicver);
  72. }
  73. #ifdef CONFIG_X86_IO_APIC
  74. static void __init MP_bus_info(struct mpc_config_bus *m)
  75. {
  76. char str[7];
  77. memcpy(str, m->mpc_bustype, 6);
  78. str[6] = 0;
  79. #ifdef CONFIG_X86_NUMAQ
  80. mpc_oem_bus_info(m, str, translation_table[mpc_record]);
  81. #else
  82. printk(KERN_INFO "Bus #%d is %s\n", m->mpc_busid, str);
  83. #endif
  84. #if MAX_MP_BUSSES < 256
  85. if (m->mpc_busid >= MAX_MP_BUSSES) {
  86. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  87. " is too large, max. supported is %d\n",
  88. m->mpc_busid, str, MAX_MP_BUSSES - 1);
  89. return;
  90. }
  91. #endif
  92. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  93. set_bit(m->mpc_busid, mp_bus_not_pci);
  94. #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
  95. mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
  96. #endif
  97. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  98. #ifdef CONFIG_X86_NUMAQ
  99. mpc_oem_pci_bus(m, translation_table[mpc_record]);
  100. #endif
  101. clear_bit(m->mpc_busid, mp_bus_not_pci);
  102. #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
  103. mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
  104. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  105. mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
  106. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  107. mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
  108. #endif
  109. } else
  110. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  111. }
  112. #endif
  113. #ifdef CONFIG_X86_IO_APIC
  114. static int bad_ioapic(unsigned long address)
  115. {
  116. if (nr_ioapics >= MAX_IO_APICS) {
  117. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  118. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  119. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  120. }
  121. if (!address) {
  122. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  123. " found in table, skipping!\n");
  124. return 1;
  125. }
  126. return 0;
  127. }
  128. static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
  129. {
  130. if (!(m->mpc_flags & MPC_APIC_USABLE))
  131. return;
  132. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  133. m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
  134. if (bad_ioapic(m->mpc_apicaddr))
  135. return;
  136. mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr;
  137. mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid;
  138. mp_ioapics[nr_ioapics].mp_type = m->mpc_type;
  139. mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver;
  140. mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags;
  141. nr_ioapics++;
  142. }
  143. static void print_MP_intsrc_info(struct mpc_config_intsrc *m)
  144. {
  145. printk(KERN_CONT "Int: type %d, pol %d, trig %d, bus %02x,"
  146. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  147. m->mpc_irqtype, m->mpc_irqflag & 3,
  148. (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
  149. m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
  150. }
  151. static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq)
  152. {
  153. printk(KERN_CONT "Int: type %d, pol %d, trig %d, bus %02x,"
  154. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  155. mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3,
  156. (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus,
  157. mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq);
  158. }
  159. static void assign_to_mp_irq(struct mpc_config_intsrc *m,
  160. struct mp_config_intsrc *mp_irq)
  161. {
  162. mp_irq->mp_dstapic = m->mpc_dstapic;
  163. mp_irq->mp_type = m->mpc_type;
  164. mp_irq->mp_irqtype = m->mpc_irqtype;
  165. mp_irq->mp_irqflag = m->mpc_irqflag;
  166. mp_irq->mp_srcbus = m->mpc_srcbus;
  167. mp_irq->mp_srcbusirq = m->mpc_srcbusirq;
  168. mp_irq->mp_dstirq = m->mpc_dstirq;
  169. }
  170. static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq,
  171. struct mpc_config_intsrc *m)
  172. {
  173. m->mpc_dstapic = mp_irq->mp_dstapic;
  174. m->mpc_type = mp_irq->mp_type;
  175. m->mpc_irqtype = mp_irq->mp_irqtype;
  176. m->mpc_irqflag = mp_irq->mp_irqflag;
  177. m->mpc_srcbus = mp_irq->mp_srcbus;
  178. m->mpc_srcbusirq = mp_irq->mp_srcbusirq;
  179. m->mpc_dstirq = mp_irq->mp_dstirq;
  180. }
  181. static int mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq,
  182. struct mpc_config_intsrc *m)
  183. {
  184. if (mp_irq->mp_dstapic != m->mpc_dstapic)
  185. return 1;
  186. if (mp_irq->mp_type != m->mpc_type)
  187. return 2;
  188. if (mp_irq->mp_irqtype != m->mpc_irqtype)
  189. return 3;
  190. if (mp_irq->mp_irqflag != m->mpc_irqflag)
  191. return 4;
  192. if (mp_irq->mp_srcbus != m->mpc_srcbus)
  193. return 5;
  194. if (mp_irq->mp_srcbusirq != m->mpc_srcbusirq)
  195. return 6;
  196. if (mp_irq->mp_dstirq != m->mpc_dstirq)
  197. return 7;
  198. return 0;
  199. }
  200. void MP_intsrc_info(struct mpc_config_intsrc *m)
  201. {
  202. int i;
  203. print_MP_intsrc_info(m);
  204. for (i = 0; i < mp_irq_entries; i++) {
  205. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  206. return;
  207. }
  208. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  209. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  210. panic("Max # of irq sources exceeded!!\n");
  211. }
  212. #endif
  213. static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
  214. {
  215. printk(KERN_INFO "Lint: type %d, pol %d, trig %d, bus %02x,"
  216. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  217. m->mpc_irqtype, m->mpc_irqflag & 3,
  218. (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
  219. m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
  220. }
  221. #ifdef CONFIG_X86_NUMAQ
  222. static void __init MP_translation_info(struct mpc_config_translation *m)
  223. {
  224. printk(KERN_INFO
  225. "Translation: record %d, type %d, quad %d, global %d, local %d\n",
  226. mpc_record, m->trans_type, m->trans_quad, m->trans_global,
  227. m->trans_local);
  228. if (mpc_record >= MAX_MPC_ENTRY)
  229. printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
  230. else
  231. translation_table[mpc_record] = m; /* stash this for later */
  232. if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
  233. node_set_online(m->trans_quad);
  234. }
  235. /*
  236. * Read/parse the MPC oem tables
  237. */
  238. static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable,
  239. unsigned short oemsize)
  240. {
  241. int count = sizeof(*oemtable); /* the header size */
  242. unsigned char *oemptr = ((unsigned char *)oemtable) + count;
  243. mpc_record = 0;
  244. printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
  245. oemtable);
  246. if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) {
  247. printk(KERN_WARNING
  248. "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
  249. oemtable->oem_signature[0], oemtable->oem_signature[1],
  250. oemtable->oem_signature[2], oemtable->oem_signature[3]);
  251. return;
  252. }
  253. if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) {
  254. printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
  255. return;
  256. }
  257. while (count < oemtable->oem_length) {
  258. switch (*oemptr) {
  259. case MP_TRANSLATION:
  260. {
  261. struct mpc_config_translation *m =
  262. (struct mpc_config_translation *)oemptr;
  263. MP_translation_info(m);
  264. oemptr += sizeof(*m);
  265. count += sizeof(*m);
  266. ++mpc_record;
  267. break;
  268. }
  269. default:
  270. {
  271. printk(KERN_WARNING
  272. "Unrecognised OEM table entry type! - %d\n",
  273. (int)*oemptr);
  274. return;
  275. }
  276. }
  277. }
  278. }
  279. static inline void mps_oem_check(struct mp_config_table *mpc, char *oem,
  280. char *productid)
  281. {
  282. if (strncmp(oem, "IBM NUMA", 8))
  283. printk("Warning! May not be a NUMA-Q system!\n");
  284. if (mpc->mpc_oemptr)
  285. smp_read_mpc_oem((struct mp_config_oemtable *)mpc->mpc_oemptr,
  286. mpc->mpc_oemsize);
  287. }
  288. #endif /* CONFIG_X86_NUMAQ */
  289. /*
  290. * Read/parse the MPC
  291. */
  292. static int __init smp_check_mpc(struct mp_config_table *mpc, char *oem,
  293. char *str)
  294. {
  295. if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
  296. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  297. mpc->mpc_signature[0], mpc->mpc_signature[1],
  298. mpc->mpc_signature[2], mpc->mpc_signature[3]);
  299. return 0;
  300. }
  301. if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
  302. printk(KERN_ERR "MPTABLE: checksum error!\n");
  303. return 0;
  304. }
  305. if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
  306. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  307. mpc->mpc_spec);
  308. return 0;
  309. }
  310. if (!mpc->mpc_lapic) {
  311. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  312. return 0;
  313. }
  314. memcpy(oem, mpc->mpc_oem, 8);
  315. oem[8] = 0;
  316. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  317. memcpy(str, mpc->mpc_productid, 12);
  318. str[12] = 0;
  319. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  320. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
  321. return 1;
  322. }
  323. static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
  324. {
  325. char str[16];
  326. char oem[10];
  327. int count = sizeof(*mpc);
  328. unsigned char *mpt = ((unsigned char *)mpc) + count;
  329. if (!smp_check_mpc(mpc, oem, str))
  330. return 0;
  331. #ifdef CONFIG_X86_32
  332. mps_oem_check(mpc, oem, str);
  333. #endif
  334. /* save the local APIC address, it might be non-default */
  335. if (!acpi_lapic)
  336. mp_lapic_addr = mpc->mpc_lapic;
  337. if (early)
  338. return 1;
  339. /*
  340. * Now process the configuration blocks.
  341. */
  342. #ifdef CONFIG_X86_NUMAQ
  343. mpc_record = 0;
  344. #endif
  345. while (count < mpc->mpc_length) {
  346. switch (*mpt) {
  347. case MP_PROCESSOR:
  348. {
  349. struct mpc_config_processor *m =
  350. (struct mpc_config_processor *)mpt;
  351. /* ACPI may have already provided this data */
  352. if (!acpi_lapic)
  353. MP_processor_info(m);
  354. mpt += sizeof(*m);
  355. count += sizeof(*m);
  356. break;
  357. }
  358. case MP_BUS:
  359. {
  360. struct mpc_config_bus *m =
  361. (struct mpc_config_bus *)mpt;
  362. #ifdef CONFIG_X86_IO_APIC
  363. MP_bus_info(m);
  364. #endif
  365. mpt += sizeof(*m);
  366. count += sizeof(*m);
  367. break;
  368. }
  369. case MP_IOAPIC:
  370. {
  371. #ifdef CONFIG_X86_IO_APIC
  372. struct mpc_config_ioapic *m =
  373. (struct mpc_config_ioapic *)mpt;
  374. MP_ioapic_info(m);
  375. #endif
  376. mpt += sizeof(struct mpc_config_ioapic);
  377. count += sizeof(struct mpc_config_ioapic);
  378. break;
  379. }
  380. case MP_INTSRC:
  381. {
  382. #ifdef CONFIG_X86_IO_APIC
  383. struct mpc_config_intsrc *m =
  384. (struct mpc_config_intsrc *)mpt;
  385. MP_intsrc_info(m);
  386. #endif
  387. mpt += sizeof(struct mpc_config_intsrc);
  388. count += sizeof(struct mpc_config_intsrc);
  389. break;
  390. }
  391. case MP_LINTSRC:
  392. {
  393. struct mpc_config_lintsrc *m =
  394. (struct mpc_config_lintsrc *)mpt;
  395. MP_lintsrc_info(m);
  396. mpt += sizeof(*m);
  397. count += sizeof(*m);
  398. break;
  399. }
  400. default:
  401. /* wrong mptable */
  402. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  403. printk(KERN_ERR "type %x\n", *mpt);
  404. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  405. 1, mpc, mpc->mpc_length, 1);
  406. count = mpc->mpc_length;
  407. break;
  408. }
  409. #ifdef CONFIG_X86_NUMAQ
  410. ++mpc_record;
  411. #endif
  412. }
  413. setup_apic_routing();
  414. if (!num_processors)
  415. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  416. return num_processors;
  417. }
  418. #ifdef CONFIG_X86_IO_APIC
  419. static int __init ELCR_trigger(unsigned int irq)
  420. {
  421. unsigned int port;
  422. port = 0x4d0 + (irq >> 3);
  423. return (inb(port) >> (irq & 7)) & 1;
  424. }
  425. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  426. {
  427. struct mpc_config_intsrc intsrc;
  428. int i;
  429. int ELCR_fallback = 0;
  430. intsrc.mpc_type = MP_INTSRC;
  431. intsrc.mpc_irqflag = 0; /* conforming */
  432. intsrc.mpc_srcbus = 0;
  433. intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
  434. intsrc.mpc_irqtype = mp_INT;
  435. /*
  436. * If true, we have an ISA/PCI system with no IRQ entries
  437. * in the MP table. To prevent the PCI interrupts from being set up
  438. * incorrectly, we try to use the ELCR. The sanity check to see if
  439. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  440. * never be level sensitive, so we simply see if the ELCR agrees.
  441. * If it does, we assume it's valid.
  442. */
  443. if (mpc_default_type == 5) {
  444. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  445. "falling back to ELCR\n");
  446. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  447. ELCR_trigger(13))
  448. printk(KERN_ERR "ELCR contains invalid data... "
  449. "not using ELCR\n");
  450. else {
  451. printk(KERN_INFO
  452. "Using ELCR to identify PCI interrupts\n");
  453. ELCR_fallback = 1;
  454. }
  455. }
  456. for (i = 0; i < 16; i++) {
  457. switch (mpc_default_type) {
  458. case 2:
  459. if (i == 0 || i == 13)
  460. continue; /* IRQ0 & IRQ13 not connected */
  461. /* fall through */
  462. default:
  463. if (i == 2)
  464. continue; /* IRQ2 is never connected */
  465. }
  466. if (ELCR_fallback) {
  467. /*
  468. * If the ELCR indicates a level-sensitive interrupt, we
  469. * copy that information over to the MP table in the
  470. * irqflag field (level sensitive, active high polarity).
  471. */
  472. if (ELCR_trigger(i))
  473. intsrc.mpc_irqflag = 13;
  474. else
  475. intsrc.mpc_irqflag = 0;
  476. }
  477. intsrc.mpc_srcbusirq = i;
  478. intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  479. MP_intsrc_info(&intsrc);
  480. }
  481. intsrc.mpc_irqtype = mp_ExtINT;
  482. intsrc.mpc_srcbusirq = 0;
  483. intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
  484. MP_intsrc_info(&intsrc);
  485. }
  486. static void construct_ioapic_table(int mpc_default_type)
  487. {
  488. struct mpc_config_ioapic ioapic;
  489. struct mpc_config_bus bus;
  490. bus.mpc_type = MP_BUS;
  491. bus.mpc_busid = 0;
  492. switch (mpc_default_type) {
  493. default:
  494. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  495. mpc_default_type);
  496. /* fall through */
  497. case 1:
  498. case 5:
  499. memcpy(bus.mpc_bustype, "ISA ", 6);
  500. break;
  501. case 2:
  502. case 6:
  503. case 3:
  504. memcpy(bus.mpc_bustype, "EISA ", 6);
  505. break;
  506. case 4:
  507. case 7:
  508. memcpy(bus.mpc_bustype, "MCA ", 6);
  509. }
  510. MP_bus_info(&bus);
  511. if (mpc_default_type > 4) {
  512. bus.mpc_busid = 1;
  513. memcpy(bus.mpc_bustype, "PCI ", 6);
  514. MP_bus_info(&bus);
  515. }
  516. ioapic.mpc_type = MP_IOAPIC;
  517. ioapic.mpc_apicid = 2;
  518. ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  519. ioapic.mpc_flags = MPC_APIC_USABLE;
  520. ioapic.mpc_apicaddr = 0xFEC00000;
  521. MP_ioapic_info(&ioapic);
  522. /*
  523. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  524. */
  525. construct_default_ioirq_mptable(mpc_default_type);
  526. }
  527. #else
  528. static inline void construct_ioapic_table(int mpc_default_type) { }
  529. #endif
  530. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  531. {
  532. struct mpc_config_processor processor;
  533. struct mpc_config_lintsrc lintsrc;
  534. int linttypes[2] = { mp_ExtINT, mp_NMI };
  535. int i;
  536. /*
  537. * local APIC has default address
  538. */
  539. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  540. /*
  541. * 2 CPUs, numbered 0 & 1.
  542. */
  543. processor.mpc_type = MP_PROCESSOR;
  544. /* Either an integrated APIC or a discrete 82489DX. */
  545. processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  546. processor.mpc_cpuflag = CPU_ENABLED;
  547. processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
  548. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  549. processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
  550. processor.mpc_reserved[0] = 0;
  551. processor.mpc_reserved[1] = 0;
  552. for (i = 0; i < 2; i++) {
  553. processor.mpc_apicid = i;
  554. MP_processor_info(&processor);
  555. }
  556. construct_ioapic_table(mpc_default_type);
  557. lintsrc.mpc_type = MP_LINTSRC;
  558. lintsrc.mpc_irqflag = 0; /* conforming */
  559. lintsrc.mpc_srcbusid = 0;
  560. lintsrc.mpc_srcbusirq = 0;
  561. lintsrc.mpc_destapic = MP_APIC_ALL;
  562. for (i = 0; i < 2; i++) {
  563. lintsrc.mpc_irqtype = linttypes[i];
  564. lintsrc.mpc_destapiclint = i;
  565. MP_lintsrc_info(&lintsrc);
  566. }
  567. }
  568. static struct intel_mp_floating *mpf_found;
  569. /*
  570. * Scan the memory blocks for an SMP configuration block.
  571. */
  572. static void __init __get_smp_config(unsigned early)
  573. {
  574. struct intel_mp_floating *mpf = mpf_found;
  575. if (acpi_lapic && early)
  576. return;
  577. /*
  578. * ACPI supports both logical (e.g. Hyper-Threading) and physical
  579. * processors, where MPS only supports physical.
  580. */
  581. if (acpi_lapic && acpi_ioapic) {
  582. printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
  583. "information\n");
  584. return;
  585. } else if (acpi_lapic)
  586. printk(KERN_INFO "Using ACPI for processor (LAPIC) "
  587. "configuration information\n");
  588. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  589. mpf->mpf_specification);
  590. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  591. if (mpf->mpf_feature2 & (1 << 7)) {
  592. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  593. pic_mode = 1;
  594. } else {
  595. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  596. pic_mode = 0;
  597. }
  598. #endif
  599. /*
  600. * Now see if we need to read further.
  601. */
  602. if (mpf->mpf_feature1 != 0) {
  603. if (early) {
  604. /*
  605. * local APIC has default address
  606. */
  607. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  608. return;
  609. }
  610. printk(KERN_INFO "Default MP configuration #%d\n",
  611. mpf->mpf_feature1);
  612. construct_default_ISA_mptable(mpf->mpf_feature1);
  613. } else if (mpf->mpf_physptr) {
  614. /*
  615. * Read the physical hardware table. Anything here will
  616. * override the defaults.
  617. */
  618. if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
  619. #ifdef CONFIG_X86_LOCAL_APIC
  620. smp_found_config = 0;
  621. #endif
  622. printk(KERN_ERR
  623. "BIOS bug, MP table errors detected!...\n");
  624. printk(KERN_ERR "... disabling SMP support. "
  625. "(tell your hw vendor)\n");
  626. return;
  627. }
  628. if (early)
  629. return;
  630. #ifdef CONFIG_X86_IO_APIC
  631. /*
  632. * If there are no explicit MP IRQ entries, then we are
  633. * broken. We set up most of the low 16 IO-APIC pins to
  634. * ISA defaults and hope it will work.
  635. */
  636. if (!mp_irq_entries) {
  637. struct mpc_config_bus bus;
  638. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  639. "using default mptable. "
  640. "(tell your hw vendor)\n");
  641. bus.mpc_type = MP_BUS;
  642. bus.mpc_busid = 0;
  643. memcpy(bus.mpc_bustype, "ISA ", 6);
  644. MP_bus_info(&bus);
  645. construct_default_ioirq_mptable(0);
  646. }
  647. #endif
  648. } else
  649. BUG();
  650. if (!early)
  651. printk(KERN_INFO "Processors: %d\n", num_processors);
  652. /*
  653. * Only use the first configuration found.
  654. */
  655. }
  656. void __init early_get_smp_config(void)
  657. {
  658. __get_smp_config(1);
  659. }
  660. void __init get_smp_config(void)
  661. {
  662. __get_smp_config(0);
  663. }
  664. static int __init smp_scan_config(unsigned long base, unsigned long length,
  665. unsigned reserve)
  666. {
  667. unsigned int *bp = phys_to_virt(base);
  668. struct intel_mp_floating *mpf;
  669. printk(KERN_DEBUG "Scan SMP from %p for %ld bytes.\n", bp, length);
  670. BUILD_BUG_ON(sizeof(*mpf) != 16);
  671. while (length > 0) {
  672. mpf = (struct intel_mp_floating *)bp;
  673. if ((*bp == SMP_MAGIC_IDENT) &&
  674. (mpf->mpf_length == 1) &&
  675. !mpf_checksum((unsigned char *)bp, 16) &&
  676. ((mpf->mpf_specification == 1)
  677. || (mpf->mpf_specification == 4))) {
  678. #ifdef CONFIG_X86_LOCAL_APIC
  679. smp_found_config = 1;
  680. #endif
  681. mpf_found = mpf;
  682. #ifdef CONFIG_X86_32
  683. printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
  684. mpf, virt_to_phys(mpf));
  685. reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE,
  686. BOOTMEM_DEFAULT);
  687. if (mpf->mpf_physptr) {
  688. /*
  689. * We cannot access to MPC table to compute
  690. * table size yet, as only few megabytes from
  691. * the bottom is mapped now.
  692. * PC-9800's MPC table places on the very last
  693. * of physical memory; so that simply reserving
  694. * PAGE_SIZE from mpg->mpf_physptr yields BUG()
  695. * in reserve_bootmem.
  696. */
  697. unsigned long size = PAGE_SIZE;
  698. unsigned long end = max_low_pfn * PAGE_SIZE;
  699. if (mpf->mpf_physptr + size > end)
  700. size = end - mpf->mpf_physptr;
  701. reserve_bootmem(mpf->mpf_physptr, size,
  702. BOOTMEM_DEFAULT);
  703. }
  704. #else
  705. if (!reserve)
  706. return 1;
  707. reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
  708. if (mpf->mpf_physptr)
  709. reserve_bootmem_generic(mpf->mpf_physptr,
  710. PAGE_SIZE);
  711. #endif
  712. return 1;
  713. }
  714. bp += 4;
  715. length -= 16;
  716. }
  717. return 0;
  718. }
  719. static void __init __find_smp_config(unsigned reserve)
  720. {
  721. unsigned int address;
  722. /*
  723. * FIXME: Linux assumes you have 640K of base ram..
  724. * this continues the error...
  725. *
  726. * 1) Scan the bottom 1K for a signature
  727. * 2) Scan the top 1K of base RAM
  728. * 3) Scan the 64K of bios
  729. */
  730. if (smp_scan_config(0x0, 0x400, reserve) ||
  731. smp_scan_config(639 * 0x400, 0x400, reserve) ||
  732. smp_scan_config(0xF0000, 0x10000, reserve))
  733. return;
  734. /*
  735. * If it is an SMP machine we should know now, unless the
  736. * configuration is in an EISA/MCA bus machine with an
  737. * extended bios data area.
  738. *
  739. * there is a real-mode segmented pointer pointing to the
  740. * 4K EBDA area at 0x40E, calculate and scan it here.
  741. *
  742. * NOTE! There are Linux loaders that will corrupt the EBDA
  743. * area, and as such this kind of SMP config may be less
  744. * trustworthy, simply because the SMP table may have been
  745. * stomped on during early boot. These loaders are buggy and
  746. * should be fixed.
  747. *
  748. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  749. */
  750. address = get_bios_ebda();
  751. if (address)
  752. smp_scan_config(address, 0x400, reserve);
  753. }
  754. void __init early_find_smp_config(void)
  755. {
  756. __find_smp_config(0);
  757. }
  758. void __init find_smp_config(void)
  759. {
  760. __find_smp_config(1);
  761. }
  762. #ifdef CONFIG_X86_IO_APIC
  763. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  764. static int __init get_MP_intsrc_index(struct mpc_config_intsrc *m)
  765. {
  766. int i;
  767. if (m->mpc_irqtype != mp_INT)
  768. return 0;
  769. if (m->mpc_irqflag != 0x0f)
  770. return 0;
  771. /* not legacy */
  772. for (i = 0; i < mp_irq_entries; i++) {
  773. if (mp_irqs[i].mp_irqtype != mp_INT)
  774. continue;
  775. if (mp_irqs[i].mp_irqflag != 0x0f)
  776. continue;
  777. if (mp_irqs[i].mp_srcbus != m->mpc_srcbus)
  778. continue;
  779. if (mp_irqs[i].mp_srcbusirq != m->mpc_srcbusirq)
  780. continue;
  781. if (irq_used[i]) {
  782. /* already claimed */
  783. return -2;
  784. }
  785. irq_used[i] = 1;
  786. return i;
  787. }
  788. /* not found */
  789. return -1;
  790. }
  791. #define SPARE_SLOT_NUM 20
  792. static struct mpc_config_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  793. #endif
  794. static int __init replace_intsrc_all(struct mp_config_table *mpc,
  795. unsigned long mpc_new_phys,
  796. unsigned long mpc_new_length)
  797. {
  798. #ifdef CONFIG_X86_IO_APIC
  799. int i;
  800. int nr_m_spare = 0;
  801. #endif
  802. int count = sizeof(*mpc);
  803. unsigned char *mpt = ((unsigned char *)mpc) + count;
  804. printk(KERN_INFO "mpc_length %x\n", mpc->mpc_length);
  805. while (count < mpc->mpc_length) {
  806. switch (*mpt) {
  807. case MP_PROCESSOR:
  808. {
  809. struct mpc_config_processor *m =
  810. (struct mpc_config_processor *)mpt;
  811. mpt += sizeof(*m);
  812. count += sizeof(*m);
  813. break;
  814. }
  815. case MP_BUS:
  816. {
  817. struct mpc_config_bus *m =
  818. (struct mpc_config_bus *)mpt;
  819. mpt += sizeof(*m);
  820. count += sizeof(*m);
  821. break;
  822. }
  823. case MP_IOAPIC:
  824. {
  825. mpt += sizeof(struct mpc_config_ioapic);
  826. count += sizeof(struct mpc_config_ioapic);
  827. break;
  828. }
  829. case MP_INTSRC:
  830. {
  831. #ifdef CONFIG_X86_IO_APIC
  832. struct mpc_config_intsrc *m =
  833. (struct mpc_config_intsrc *)mpt;
  834. printk(KERN_INFO "OLD ");
  835. print_MP_intsrc_info(m);
  836. i = get_MP_intsrc_index(m);
  837. if (i > 0) {
  838. assign_to_mpc_intsrc(&mp_irqs[i], m);
  839. printk(KERN_INFO "NEW ");
  840. print_mp_irq_info(&mp_irqs[i]);
  841. } else if (!i) {
  842. /* legacy, do nothing */
  843. } else if (nr_m_spare < SPARE_SLOT_NUM) {
  844. /*
  845. * not found (-1), or duplicated (-2)
  846. * are invalid entries,
  847. * we need to use the slot later
  848. */
  849. m_spare[nr_m_spare] = m;
  850. nr_m_spare++;
  851. }
  852. #endif
  853. mpt += sizeof(struct mpc_config_intsrc);
  854. count += sizeof(struct mpc_config_intsrc);
  855. break;
  856. }
  857. case MP_LINTSRC:
  858. {
  859. struct mpc_config_lintsrc *m =
  860. (struct mpc_config_lintsrc *)mpt;
  861. mpt += sizeof(*m);
  862. count += sizeof(*m);
  863. break;
  864. }
  865. default:
  866. /* wrong mptable */
  867. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
  868. printk(KERN_ERR "type %x\n", *mpt);
  869. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  870. 1, mpc, mpc->mpc_length, 1);
  871. goto out;
  872. }
  873. }
  874. #ifdef CONFIG_X86_IO_APIC
  875. for (i = 0; i < mp_irq_entries; i++) {
  876. if (irq_used[i])
  877. continue;
  878. if (mp_irqs[i].mp_irqtype != mp_INT)
  879. continue;
  880. if (mp_irqs[i].mp_irqflag != 0x0f)
  881. continue;
  882. if (nr_m_spare > 0) {
  883. printk(KERN_INFO "*NEW* found ");
  884. nr_m_spare--;
  885. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  886. m_spare[nr_m_spare] = NULL;
  887. } else {
  888. struct mpc_config_intsrc *m =
  889. (struct mpc_config_intsrc *)mpt;
  890. count += sizeof(struct mpc_config_intsrc);
  891. if (!mpc_new_phys) {
  892. printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count);
  893. } else {
  894. if (count <= mpc_new_length)
  895. printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count);
  896. else {
  897. printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length);
  898. goto out;
  899. }
  900. }
  901. assign_to_mpc_intsrc(&mp_irqs[i], m);
  902. mpc->mpc_length = count;
  903. mpt += sizeof(struct mpc_config_intsrc);
  904. }
  905. print_mp_irq_info(&mp_irqs[i]);
  906. }
  907. #endif
  908. out:
  909. /* update checksum */
  910. mpc->mpc_checksum = 0;
  911. mpc->mpc_checksum -= mpf_checksum((unsigned char *)mpc,
  912. mpc->mpc_length);
  913. return 0;
  914. }
  915. int __initdata enable_update_mptable;
  916. static int __init update_mptable_setup(char *str)
  917. {
  918. enable_update_mptable = 1;
  919. return 0;
  920. }
  921. early_param("update_mptable", update_mptable_setup);
  922. static unsigned long __initdata mpc_new_phys;
  923. static unsigned long mpc_new_length __initdata = 4096;
  924. /* alloc_mptable or alloc_mptable=4k */
  925. static int __initdata alloc_mptable;
  926. static int __init parse_alloc_mptable_opt(char *p)
  927. {
  928. enable_update_mptable = 1;
  929. alloc_mptable = 1;
  930. if (!p)
  931. return 0;
  932. mpc_new_length = memparse(p, &p);
  933. return 0;
  934. }
  935. early_param("alloc_mptable", parse_alloc_mptable_opt);
  936. void __init early_reserve_e820_mpc_new(void)
  937. {
  938. if (enable_update_mptable && alloc_mptable) {
  939. u64 startt = 0;
  940. #ifdef CONFIG_X86_TRAMPOLINE
  941. startt = TRAMPOLINE_BASE;
  942. #endif
  943. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  944. }
  945. }
  946. static int __init update_mp_table(void)
  947. {
  948. char str[16];
  949. char oem[10];
  950. struct intel_mp_floating *mpf;
  951. struct mp_config_table *mpc;
  952. struct mp_config_table *mpc_new;
  953. if (!enable_update_mptable)
  954. return 0;
  955. mpf = mpf_found;
  956. if (!mpf)
  957. return 0;
  958. /*
  959. * Now see if we need to go further.
  960. */
  961. if (mpf->mpf_feature1 != 0)
  962. return 0;
  963. if (!mpf->mpf_physptr)
  964. return 0;
  965. mpc = phys_to_virt(mpf->mpf_physptr);
  966. if (!smp_check_mpc(mpc, oem, str))
  967. return 0;
  968. printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf));
  969. printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr);
  970. if (mpc_new_phys && mpc->mpc_length > mpc_new_length) {
  971. mpc_new_phys = 0;
  972. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  973. mpc_new_length);
  974. }
  975. if (!mpc_new_phys) {
  976. unsigned char old, new;
  977. /* check if we can change the postion */
  978. mpc->mpc_checksum = 0;
  979. old = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
  980. mpc->mpc_checksum = 0xff;
  981. new = mpf_checksum((unsigned char *)mpc, mpc->mpc_length);
  982. if (old == new) {
  983. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  984. return 0;
  985. }
  986. printk(KERN_INFO "use in-positon replacing\n");
  987. } else {
  988. mpf->mpf_physptr = mpc_new_phys;
  989. mpc_new = phys_to_virt(mpc_new_phys);
  990. memcpy(mpc_new, mpc, mpc->mpc_length);
  991. mpc = mpc_new;
  992. /* check if we can modify that */
  993. if (mpc_new_phys - mpf->mpf_physptr) {
  994. struct intel_mp_floating *mpf_new;
  995. /* steal 16 bytes from [0, 1k) */
  996. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  997. mpf_new = phys_to_virt(0x400 - 16);
  998. memcpy(mpf_new, mpf, 16);
  999. mpf = mpf_new;
  1000. mpf->mpf_physptr = mpc_new_phys;
  1001. }
  1002. mpf->mpf_checksum = 0;
  1003. mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16);
  1004. printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr);
  1005. }
  1006. /*
  1007. * only replace the one with mp_INT and
  1008. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  1009. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  1010. * may need pci=routeirq for all coverage
  1011. */
  1012. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  1013. return 0;
  1014. }
  1015. late_initcall(update_mp_table);