ahci_platform.c 8.0 KB

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  1. /*
  2. * AHCI SATA platform driver
  3. *
  4. * Copyright 2004-2005 Red Hat, Inc.
  5. * Jeff Garzik <jgarzik@pobox.com>
  6. * Copyright 2010 MontaVista Software, LLC.
  7. * Anton Vorontsov <avorontsov@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2, or (at your option)
  12. * any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gfp.h>
  17. #include <linux/module.h>
  18. #include <linux/pm.h>
  19. #include <linux/init.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/device.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/libata.h>
  24. #include <linux/ahci_platform.h>
  25. #include "ahci.h"
  26. enum ahci_type {
  27. AHCI, /* standard platform ahci */
  28. IMX53_AHCI, /* ahci on i.mx53 */
  29. STRICT_AHCI, /* delayed DMA engine start */
  30. };
  31. static struct platform_device_id ahci_devtype[] = {
  32. {
  33. .name = "ahci",
  34. .driver_data = AHCI,
  35. }, {
  36. .name = "imx53-ahci",
  37. .driver_data = IMX53_AHCI,
  38. }, {
  39. .name = "strict-ahci",
  40. .driver_data = STRICT_AHCI,
  41. }, {
  42. /* sentinel */
  43. }
  44. };
  45. MODULE_DEVICE_TABLE(platform, ahci_devtype);
  46. static const struct ata_port_info ahci_port_info[] = {
  47. /* by features */
  48. [AHCI] = {
  49. .flags = AHCI_FLAG_COMMON,
  50. .pio_mask = ATA_PIO4,
  51. .udma_mask = ATA_UDMA6,
  52. .port_ops = &ahci_ops,
  53. },
  54. [IMX53_AHCI] = {
  55. .flags = AHCI_FLAG_COMMON,
  56. .pio_mask = ATA_PIO4,
  57. .udma_mask = ATA_UDMA6,
  58. .port_ops = &ahci_pmp_retry_srst_ops,
  59. },
  60. [STRICT_AHCI] = {
  61. AHCI_HFLAGS (AHCI_HFLAG_DELAY_ENGINE),
  62. .flags = AHCI_FLAG_COMMON,
  63. .pio_mask = ATA_PIO4,
  64. .udma_mask = ATA_UDMA6,
  65. .port_ops = &ahci_ops,
  66. },
  67. };
  68. static struct scsi_host_template ahci_platform_sht = {
  69. AHCI_SHT("ahci_platform"),
  70. };
  71. static int __init ahci_probe(struct platform_device *pdev)
  72. {
  73. struct device *dev = &pdev->dev;
  74. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  75. const struct platform_device_id *id = platform_get_device_id(pdev);
  76. struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
  77. const struct ata_port_info *ppi[] = { &pi, NULL };
  78. struct ahci_host_priv *hpriv;
  79. struct ata_host *host;
  80. struct resource *mem;
  81. int irq;
  82. int n_ports;
  83. int i;
  84. int rc;
  85. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  86. if (!mem) {
  87. dev_err(dev, "no mmio space\n");
  88. return -EINVAL;
  89. }
  90. irq = platform_get_irq(pdev, 0);
  91. if (irq <= 0) {
  92. dev_err(dev, "no irq\n");
  93. return -EINVAL;
  94. }
  95. if (pdata && pdata->ata_port_info)
  96. pi = *pdata->ata_port_info;
  97. hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
  98. if (!hpriv) {
  99. dev_err(dev, "can't alloc ahci_host_priv\n");
  100. return -ENOMEM;
  101. }
  102. hpriv->flags |= (unsigned long)pi.private_data;
  103. hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
  104. if (!hpriv->mmio) {
  105. dev_err(dev, "can't map %pR\n", mem);
  106. return -ENOMEM;
  107. }
  108. hpriv->clk = clk_get(dev, NULL);
  109. if (IS_ERR(hpriv->clk)) {
  110. dev_err(dev, "can't get clock\n");
  111. } else {
  112. rc = clk_prepare_enable(hpriv->clk);
  113. if (rc) {
  114. dev_err(dev, "clock prepare enable failed");
  115. goto free_clk;
  116. }
  117. }
  118. /*
  119. * Some platforms might need to prepare for mmio region access,
  120. * which could be done in the following init call. So, the mmio
  121. * region shouldn't be accessed before init (if provided) has
  122. * returned successfully.
  123. */
  124. if (pdata && pdata->init) {
  125. rc = pdata->init(dev, hpriv->mmio);
  126. if (rc)
  127. goto disable_unprepare_clk;
  128. }
  129. ahci_save_initial_config(dev, hpriv,
  130. pdata ? pdata->force_port_map : 0,
  131. pdata ? pdata->mask_port_map : 0);
  132. /* prepare host */
  133. if (hpriv->cap & HOST_CAP_NCQ)
  134. pi.flags |= ATA_FLAG_NCQ;
  135. if (hpriv->cap & HOST_CAP_PMP)
  136. pi.flags |= ATA_FLAG_PMP;
  137. ahci_set_em_messages(hpriv, &pi);
  138. /* CAP.NP sometimes indicate the index of the last enabled
  139. * port, at other times, that of the last possible port, so
  140. * determining the maximum port number requires looking at
  141. * both CAP.NP and port_map.
  142. */
  143. n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
  144. host = ata_host_alloc_pinfo(dev, ppi, n_ports);
  145. if (!host) {
  146. rc = -ENOMEM;
  147. goto pdata_exit;
  148. }
  149. host->private_data = hpriv;
  150. if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
  151. host->flags |= ATA_HOST_PARALLEL_SCAN;
  152. else
  153. printk(KERN_INFO "ahci: SSS flag set, parallel bus scan disabled\n");
  154. if (pi.flags & ATA_FLAG_EM)
  155. ahci_reset_em(host);
  156. for (i = 0; i < host->n_ports; i++) {
  157. struct ata_port *ap = host->ports[i];
  158. ata_port_desc(ap, "mmio %pR", mem);
  159. ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
  160. /* set enclosure management message type */
  161. if (ap->flags & ATA_FLAG_EM)
  162. ap->em_message_type = hpriv->em_msg_type;
  163. /* disabled/not-implemented port */
  164. if (!(hpriv->port_map & (1 << i)))
  165. ap->ops = &ata_dummy_port_ops;
  166. }
  167. rc = ahci_reset_controller(host);
  168. if (rc)
  169. goto pdata_exit;
  170. ahci_init_controller(host);
  171. ahci_print_info(host, "platform");
  172. rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
  173. &ahci_platform_sht);
  174. if (rc)
  175. goto pdata_exit;
  176. return 0;
  177. pdata_exit:
  178. if (pdata && pdata->exit)
  179. pdata->exit(dev);
  180. disable_unprepare_clk:
  181. if (!IS_ERR(hpriv->clk))
  182. clk_disable_unprepare(hpriv->clk);
  183. free_clk:
  184. if (!IS_ERR(hpriv->clk))
  185. clk_put(hpriv->clk);
  186. return rc;
  187. }
  188. static int __devexit ahci_remove(struct platform_device *pdev)
  189. {
  190. struct device *dev = &pdev->dev;
  191. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  192. struct ata_host *host = dev_get_drvdata(dev);
  193. struct ahci_host_priv *hpriv = host->private_data;
  194. ata_host_detach(host);
  195. if (pdata && pdata->exit)
  196. pdata->exit(dev);
  197. if (!IS_ERR(hpriv->clk)) {
  198. clk_disable_unprepare(hpriv->clk);
  199. clk_put(hpriv->clk);
  200. }
  201. return 0;
  202. }
  203. #ifdef CONFIG_PM_SLEEP
  204. static int ahci_suspend(struct device *dev)
  205. {
  206. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  207. struct ata_host *host = dev_get_drvdata(dev);
  208. struct ahci_host_priv *hpriv = host->private_data;
  209. void __iomem *mmio = hpriv->mmio;
  210. u32 ctl;
  211. int rc;
  212. if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
  213. dev_err(dev, "firmware update required for suspend/resume\n");
  214. return -EIO;
  215. }
  216. /*
  217. * AHCI spec rev1.1 section 8.3.3:
  218. * Software must disable interrupts prior to requesting a
  219. * transition of the HBA to D3 state.
  220. */
  221. ctl = readl(mmio + HOST_CTL);
  222. ctl &= ~HOST_IRQ_EN;
  223. writel(ctl, mmio + HOST_CTL);
  224. readl(mmio + HOST_CTL); /* flush */
  225. rc = ata_host_suspend(host, PMSG_SUSPEND);
  226. if (rc)
  227. return rc;
  228. if (pdata && pdata->suspend)
  229. return pdata->suspend(dev);
  230. if (!IS_ERR(hpriv->clk))
  231. clk_disable_unprepare(hpriv->clk);
  232. return 0;
  233. }
  234. static int ahci_resume(struct device *dev)
  235. {
  236. struct ahci_platform_data *pdata = dev_get_platdata(dev);
  237. struct ata_host *host = dev_get_drvdata(dev);
  238. struct ahci_host_priv *hpriv = host->private_data;
  239. int rc;
  240. if (!IS_ERR(hpriv->clk)) {
  241. rc = clk_prepare_enable(hpriv->clk);
  242. if (rc) {
  243. dev_err(dev, "clock prepare enable failed");
  244. return rc;
  245. }
  246. }
  247. if (pdata && pdata->resume) {
  248. rc = pdata->resume(dev);
  249. if (rc)
  250. goto disable_unprepare_clk;
  251. }
  252. if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
  253. rc = ahci_reset_controller(host);
  254. if (rc)
  255. goto disable_unprepare_clk;
  256. ahci_init_controller(host);
  257. }
  258. ata_host_resume(host);
  259. return 0;
  260. disable_unprepare_clk:
  261. if (!IS_ERR(hpriv->clk))
  262. clk_disable_unprepare(hpriv->clk);
  263. return rc;
  264. }
  265. #endif
  266. SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
  267. static const struct of_device_id ahci_of_match[] = {
  268. { .compatible = "snps,spear-ahci", },
  269. {},
  270. };
  271. MODULE_DEVICE_TABLE(of, ahci_of_match);
  272. static struct platform_driver ahci_driver = {
  273. .remove = __devexit_p(ahci_remove),
  274. .driver = {
  275. .name = "ahci",
  276. .owner = THIS_MODULE,
  277. .of_match_table = ahci_of_match,
  278. .pm = &ahci_pm_ops,
  279. },
  280. .id_table = ahci_devtype,
  281. };
  282. static int __init ahci_init(void)
  283. {
  284. return platform_driver_probe(&ahci_driver, ahci_probe);
  285. }
  286. module_init(ahci_init);
  287. static void __exit ahci_exit(void)
  288. {
  289. platform_driver_unregister(&ahci_driver);
  290. }
  291. module_exit(ahci_exit);
  292. MODULE_DESCRIPTION("AHCI SATA platform driver");
  293. MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
  294. MODULE_LICENSE("GPL");
  295. MODULE_ALIAS("platform:ahci");