board-mop500-pins.c 29 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License terms: GNU General Public License (GPL) version 2
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/init.h>
  8. #include <linux/bug.h>
  9. #include <linux/string.h>
  10. #include <linux/pinctrl/machine.h>
  11. #include <asm/mach-types.h>
  12. #include <plat/pincfg.h>
  13. #include <plat/gpio-nomadik.h>
  14. #include <mach/hardware.h>
  15. #include "pins-db8500.h"
  16. #include "board-mop500.h"
  17. enum custom_pin_cfg_t {
  18. PINS_FOR_DEFAULT,
  19. PINS_FOR_U9500,
  20. };
  21. static enum custom_pin_cfg_t pinsfor;
  22. /* These simply sets bias for pins */
  23. #define BIAS(a,b) static unsigned long a[] = { b }
  24. BIAS(pd, PIN_PULL_DOWN);
  25. BIAS(in_nopull, PIN_INPUT_NOPULL);
  26. BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
  27. BIAS(in_pu, PIN_INPUT_PULLUP);
  28. BIAS(in_pd, PIN_INPUT_PULLDOWN);
  29. BIAS(out_hi, PIN_OUTPUT_HIGH);
  30. BIAS(out_lo, PIN_OUTPUT_LOW);
  31. BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
  32. /* These also force them into GPIO mode */
  33. BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
  34. BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
  35. BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
  36. BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
  37. BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
  38. BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
  39. /* Sleep modes */
  40. BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|
  41. PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE);
  42. BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|
  43. PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  44. BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|
  45. PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  46. BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|
  47. PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  48. BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED|
  49. PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED);
  50. BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|
  51. PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
  52. BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|
  53. PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  54. BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|
  55. PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  56. BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|
  57. PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  58. BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP|
  59. PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
  60. BIAS(out_lo_wkup_pdis, PIN_SLPM_OUTPUT_LOW|
  61. PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  62. BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
  63. PIN_SLPM_PDIS_ENABLED);
  64. BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
  65. PIN_SLPM_PDIS_DISABLED);
  66. /* We use these to define hog settings that are always done on boot */
  67. #define DB8500_MUX_HOG(group,func) \
  68. PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
  69. #define DB8500_PIN_HOG(pin,conf) \
  70. PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
  71. #define DB8500_PIN_SLEEP(pin, conf, dev) \
  72. PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
  73. pin, conf)
  74. /* These are default states associated with device and changed runtime */
  75. #define DB8500_MUX(group,func,dev) \
  76. PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
  77. #define DB8500_PIN(pin,conf,dev) \
  78. PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
  79. #define DB8500_PIN_IDLE(pin, conf, dev) \
  80. PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_IDLE, "pinctrl-db8500", \
  81. pin, conf)
  82. #define DB8500_PIN_SLEEP(pin, conf, dev) \
  83. PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
  84. pin, conf)
  85. /* Pin control settings */
  86. static struct pinctrl_map __initdata mop500_family_pinmap[] = {
  87. /*
  88. * uMSP0, mux in 4 pins, regular placement of RX/TX
  89. * explicitly set the pins to no pull
  90. */
  91. DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
  92. DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
  93. DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
  94. DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
  95. DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
  96. DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
  97. /* MSP2 for HDMI, pull down TXD, TCK, TFS */
  98. DB8500_MUX_HOG("msp2_a_1", "msp2"),
  99. DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
  100. DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
  101. DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
  102. DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
  103. /*
  104. * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
  105. * pull-up
  106. * TODO: is this really correct? Snowball doesn't have a LCD.
  107. */
  108. DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
  109. DB8500_PIN_HOG("GPIO68_E1", in_pu),
  110. DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
  111. /*
  112. * STMPE1601/tc35893 keypad IRQ GPIO 218
  113. * TODO: set for snowball and HREF really??
  114. */
  115. DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
  116. /*
  117. * UART0, we do not mux in u0 here.
  118. * uart-0 pins gpio configuration should be kept intact to prevent
  119. * a glitch in tx line when the tty dev is opened. Later these pins
  120. * are configured to uart mop500_pins_uart0
  121. */
  122. DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
  123. DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
  124. DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
  125. DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
  126. /*
  127. * Mux in UART2 on altfunction C and set pull-ups.
  128. * TODO: is this used on U8500 variants and Snowball really?
  129. * The setting on GPIO31 conflicts with magnetometer use on hrefv60
  130. */
  131. DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
  132. DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
  133. DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
  134. DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
  135. DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
  136. DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
  137. /*
  138. * The following pin sets were known as "runtime pins" before being
  139. * converted to the pinctrl model. Here we model them as "default"
  140. * states.
  141. */
  142. /* Mux in UART0 after initialization */
  143. DB8500_MUX("u0_a_1", "u0", "uart0"),
  144. DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
  145. DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
  146. DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
  147. DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
  148. /* UART0 sleep state */
  149. DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"),
  150. DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"),
  151. DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"),
  152. DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"),
  153. /* MSP1 for ALSA codec */
  154. DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
  155. DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
  156. DB8500_PIN("GPIO33_AF2", out_lo_slpm_nowkup, "ux500-msp-i2s.1"),
  157. DB8500_PIN("GPIO34_AE1", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
  158. DB8500_PIN("GPIO35_AE2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
  159. DB8500_PIN("GPIO36_AG2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
  160. /* MSP1 sleep state */
  161. DB8500_PIN_SLEEP("GPIO33_AF2", slpm_out_lo_wkup, "ux500-msp-i2s.1"),
  162. DB8500_PIN_SLEEP("GPIO34_AE1", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
  163. DB8500_PIN_SLEEP("GPIO35_AE2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
  164. DB8500_PIN_SLEEP("GPIO36_AG2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
  165. /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
  166. DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
  167. DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
  168. /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
  169. DB8500_MUX("lcdvsi1_a_1", "lcd", "0-0070"),
  170. DB8500_PIN("GPIO69_E2", in_pu, "0-0070"),
  171. /* LCD VSI1 sleep state */
  172. DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"),
  173. /* Mux in i2c0 block, default state */
  174. DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
  175. /* i2c0 sleep state */
  176. DB8500_PIN_SLEEP("GPIO147_C15", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SDA */
  177. DB8500_PIN_SLEEP("GPIO148_B16", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SCL */
  178. /* Mux in i2c1 block, default state */
  179. DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
  180. /* i2c1 sleep state */
  181. DB8500_PIN_SLEEP("GPIO16_AD3", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SDA */
  182. DB8500_PIN_SLEEP("GPIO17_AD4", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SCL */
  183. /* Mux in i2c2 block, default state */
  184. DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
  185. /* i2c2 sleep state */
  186. DB8500_PIN_SLEEP("GPIO10_AF5", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SDA */
  187. DB8500_PIN_SLEEP("GPIO11_AG4", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SCL */
  188. /* Mux in i2c3 block, default state */
  189. DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
  190. /* i2c3 sleep state */
  191. DB8500_PIN_SLEEP("GPIO229_AG7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SDA */
  192. DB8500_PIN_SLEEP("GPIO230_AF7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SCL */
  193. /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
  194. DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
  195. DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
  196. DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
  197. DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
  198. DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
  199. DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
  200. DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
  201. DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
  202. DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
  203. DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
  204. DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
  205. /* SDI0 sleep state */
  206. DB8500_PIN_SLEEP("GPIO18_AC2", slpm_out_hi_wkup_pdis, "sdi0"),
  207. DB8500_PIN_SLEEP("GPIO19_AC1", slpm_out_hi_wkup_pdis, "sdi0"),
  208. DB8500_PIN_SLEEP("GPIO20_AB4", slpm_out_hi_wkup_pdis, "sdi0"),
  209. DB8500_PIN_SLEEP("GPIO22_AA3", slpm_in_wkup_pdis, "sdi0"),
  210. DB8500_PIN_SLEEP("GPIO23_AA4", slpm_out_lo_wkup_pdis, "sdi0"),
  211. DB8500_PIN_SLEEP("GPIO24_AB2", slpm_in_wkup_pdis, "sdi0"),
  212. DB8500_PIN_SLEEP("GPIO25_Y4", slpm_in_wkup_pdis, "sdi0"),
  213. DB8500_PIN_SLEEP("GPIO26_Y2", slpm_in_wkup_pdis, "sdi0"),
  214. DB8500_PIN_SLEEP("GPIO27_AA2", slpm_in_wkup_pdis, "sdi0"),
  215. DB8500_PIN_SLEEP("GPIO28_AA1", slpm_in_wkup_pdis, "sdi0"),
  216. /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
  217. DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
  218. DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
  219. DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
  220. DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
  221. DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
  222. DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
  223. DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
  224. DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
  225. /* SDI1 sleep state */
  226. DB8500_PIN_SLEEP("GPIO208_AH16", slpm_out_lo_wkup_pdis, "sdi1"), /* CLK */
  227. DB8500_PIN_SLEEP("GPIO209_AG15", slpm_in_wkup_pdis, "sdi1"), /* FBCLK */
  228. DB8500_PIN_SLEEP("GPIO210_AJ15", slpm_in_wkup_pdis, "sdi1"), /* CMD */
  229. DB8500_PIN_SLEEP("GPIO211_AG14", slpm_in_wkup_pdis, "sdi1"), /* DAT0 */
  230. DB8500_PIN_SLEEP("GPIO212_AF13", slpm_in_wkup_pdis, "sdi1"), /* DAT1 */
  231. DB8500_PIN_SLEEP("GPIO213_AG13", slpm_in_wkup_pdis, "sdi1"), /* DAT2 */
  232. DB8500_PIN_SLEEP("GPIO214_AH15", slpm_in_wkup_pdis, "sdi1"), /* DAT3 */
  233. /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
  234. DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
  235. DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
  236. DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
  237. DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
  238. DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
  239. DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
  240. DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
  241. DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
  242. DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
  243. DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
  244. DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
  245. DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
  246. /* SDI2 sleep state */
  247. DB8500_PIN_SLEEP("GPIO128_A5", out_lo_wkup_pdis, "sdi2"), /* CLK */
  248. DB8500_PIN_SLEEP("GPIO129_B4", in_wkup_pdis_en, "sdi2"), /* CMD */
  249. DB8500_PIN_SLEEP("GPIO130_C8", in_wkup_pdis_en, "sdi2"), /* FBCLK */
  250. DB8500_PIN_SLEEP("GPIO131_A12", in_wkup_pdis, "sdi2"), /* DAT0 */
  251. DB8500_PIN_SLEEP("GPIO132_C10", in_wkup_pdis, "sdi2"), /* DAT1 */
  252. DB8500_PIN_SLEEP("GPIO133_B10", in_wkup_pdis, "sdi2"), /* DAT2 */
  253. DB8500_PIN_SLEEP("GPIO134_B9", in_wkup_pdis, "sdi2"), /* DAT3 */
  254. DB8500_PIN_SLEEP("GPIO135_A9", in_wkup_pdis, "sdi2"), /* DAT4 */
  255. DB8500_PIN_SLEEP("GPIO136_C7", in_wkup_pdis, "sdi2"), /* DAT5 */
  256. DB8500_PIN_SLEEP("GPIO137_A7", in_wkup_pdis, "sdi2"), /* DAT6 */
  257. DB8500_PIN_SLEEP("GPIO138_C5", in_wkup_pdis, "sdi2"), /* DAT7 */
  258. /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
  259. DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
  260. DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
  261. DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
  262. DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
  263. DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
  264. DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
  265. DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
  266. DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
  267. DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
  268. DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
  269. DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
  270. DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
  271. /*SDI4 sleep state */
  272. DB8500_PIN_SLEEP("GPIO197_AH24", slpm_in_wkup_pdis, "sdi4"), /* DAT3 */
  273. DB8500_PIN_SLEEP("GPIO198_AG25", slpm_in_wkup_pdis, "sdi4"), /* DAT2 */
  274. DB8500_PIN_SLEEP("GPIO199_AH23", slpm_in_wkup_pdis, "sdi4"), /* DAT1 */
  275. DB8500_PIN_SLEEP("GPIO200_AH26", slpm_in_wkup_pdis, "sdi4"), /* DAT0 */
  276. DB8500_PIN_SLEEP("GPIO201_AF24", slpm_in_wkup_pdis, "sdi4"), /* CMD */
  277. DB8500_PIN_SLEEP("GPIO202_AF25", slpm_in_wkup_pdis, "sdi4"), /* FBCLK */
  278. DB8500_PIN_SLEEP("GPIO203_AE23", slpm_out_lo_wkup_pdis, "sdi4"), /* CLK */
  279. DB8500_PIN_SLEEP("GPIO204_AF23", slpm_in_wkup_pdis, "sdi4"), /* DAT7 */
  280. DB8500_PIN_SLEEP("GPIO205_AG23", slpm_in_wkup_pdis, "sdi4"), /* DAT6 */
  281. DB8500_PIN_SLEEP("GPIO206_AG24", slpm_in_wkup_pdis, "sdi4"), /* DAT5 */
  282. DB8500_PIN_SLEEP("GPIO207_AJ23", slpm_in_wkup_pdis, "sdi4"), /* DAT4 */
  283. /* Mux in USB pins, drive STP high */
  284. DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
  285. DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
  286. /* Mux in SPI2 pins on the "other C1" altfunction */
  287. DB8500_MUX("spi2_oc1_2", "spi2", "spi2"),
  288. DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
  289. DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
  290. DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
  291. DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
  292. /* SPI2 idle state */
  293. DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
  294. DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
  295. DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
  296. /* SPI2 sleep state */
  297. DB8500_PIN_SLEEP("GPIO216_AG12", slpm_in_wkup_pdis, "spi2"), /* FRM */
  298. DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
  299. DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
  300. DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
  301. /* ske default state */
  302. DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
  303. DB8500_PIN("GPIO153_B17", in_pd, "nmk-ske-keypad"), /* I7 */
  304. DB8500_PIN("GPIO154_C16", in_pd, "nmk-ske-keypad"), /* I6 */
  305. DB8500_PIN("GPIO155_C19", in_pd, "nmk-ske-keypad"), /* I5 */
  306. DB8500_PIN("GPIO156_C17", in_pd, "nmk-ske-keypad"), /* I4 */
  307. DB8500_PIN("GPIO161_D21", in_pd, "nmk-ske-keypad"), /* I3 */
  308. DB8500_PIN("GPIO162_D20", in_pd, "nmk-ske-keypad"), /* I2 */
  309. DB8500_PIN("GPIO163_C20", in_pd, "nmk-ske-keypad"), /* I1 */
  310. DB8500_PIN("GPIO164_B21", in_pd, "nmk-ske-keypad"), /* I0 */
  311. DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
  312. DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
  313. DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
  314. DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
  315. DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
  316. DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
  317. DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
  318. DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
  319. /* ske sleep state */
  320. DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
  321. DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
  322. DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
  323. DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
  324. DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
  325. DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
  326. DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
  327. DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
  328. DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
  329. DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
  330. DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
  331. DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
  332. DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
  333. DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
  334. DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
  335. DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
  336. };
  337. /*
  338. * These are specifically for the MOP500 and HREFP (pre-v60) version of the
  339. * board, which utilized a TC35892 GPIO expander instead of using a lot of
  340. * on-chip pins as the HREFv60 and later does.
  341. */
  342. static struct pinctrl_map __initdata mop500_pinmap[] = {
  343. /* Mux in SSP0, pull down RXD pin */
  344. DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
  345. DB8500_PIN_HOG("GPIO145_C13", pd),
  346. /*
  347. * XENON Flashgun on image processor GPIO (controlled from image
  348. * processor firmware), mux in these image processor GPIO lines 0
  349. * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
  350. * the pins.
  351. */
  352. DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
  353. DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
  354. DB8500_PIN_HOG("GPIO6_AF6", in_pu),
  355. DB8500_PIN_HOG("GPIO7_AG5", in_pu),
  356. /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
  357. DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
  358. /* Mux in UART1 and set the pull-ups */
  359. DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
  360. DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
  361. DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
  362. DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
  363. DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
  364. DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
  365. /*
  366. * Runtime stuff: make it possible to mux in the SKE keypad
  367. * and bias the pins
  368. */
  369. /* ske default state */
  370. DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
  371. DB8500_PIN("GPIO153_B17", in_pu, "nmk-ske-keypad"), /* I7 */
  372. DB8500_PIN("GPIO154_C16", in_pu, "nmk-ske-keypad"), /* I6 */
  373. DB8500_PIN("GPIO155_C19", in_pu, "nmk-ske-keypad"), /* I5 */
  374. DB8500_PIN("GPIO156_C17", in_pu, "nmk-ske-keypad"), /* I4 */
  375. DB8500_PIN("GPIO161_D21", in_pu, "nmk-ske-keypad"), /* I3 */
  376. DB8500_PIN("GPIO162_D20", in_pu, "nmk-ske-keypad"), /* I2 */
  377. DB8500_PIN("GPIO163_C20", in_pu, "nmk-ske-keypad"), /* I1 */
  378. DB8500_PIN("GPIO164_B21", in_pu, "nmk-ske-keypad"), /* I0 */
  379. DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
  380. DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
  381. DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
  382. DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
  383. DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
  384. DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
  385. DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
  386. DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
  387. /* ske sleep state */
  388. DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
  389. DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
  390. DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
  391. DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
  392. DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
  393. DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
  394. DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
  395. DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
  396. DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
  397. DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
  398. DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
  399. DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
  400. DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
  401. DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
  402. DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
  403. DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
  404. /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
  405. DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
  406. DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
  407. };
  408. /*
  409. * The HREFv60 series of platforms is using available pins on the DB8500
  410. * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
  411. * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
  412. */
  413. static struct pinctrl_map __initdata hrefv60_pinmap[] = {
  414. /* Drive WLAN_ENA low */
  415. DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
  416. /*
  417. * XENON Flashgun on image processor GPIO (controlled from image
  418. * processor firmware), mux in these image processor GPIO lines 0
  419. * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
  420. * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
  421. * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
  422. */
  423. DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
  424. DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
  425. DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
  426. DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
  427. DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
  428. DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
  429. DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
  430. /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
  431. DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
  432. DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
  433. /*
  434. * Display Interface 1 uses GPIO 65 for RST (reset).
  435. * Display Interface 2 uses GPIO 66 for RST (reset).
  436. * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
  437. */
  438. DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
  439. DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
  440. /*
  441. * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
  442. * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
  443. * reset signals low.
  444. */
  445. DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
  446. DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
  447. DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
  448. /*
  449. * Drive D19-D23 for the ETM PTM trace interface low,
  450. * (presumably pins are unconnected therefore grounded here,
  451. * the "other alt C1" setting enables these pins)
  452. */
  453. DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
  454. DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
  455. DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
  456. DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
  457. DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
  458. /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
  459. DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
  460. DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
  461. /* NFC ENA and RESET to low, pulldown IRQ line */
  462. DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
  463. DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
  464. DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
  465. /*
  466. * SKE keyboard partly on alt A and partly on "Other alt C1"
  467. * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
  468. * rows of 6 keys, then pull up force sensing interrup and
  469. * drive reset and force sensing WU low.
  470. */
  471. DB8500_MUX_HOG("kp_a_1", "kp"),
  472. DB8500_MUX_HOG("kp_oc1_1", "kp"),
  473. DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
  474. DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
  475. DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
  476. DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
  477. DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
  478. DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
  479. DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
  480. DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
  481. DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
  482. DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
  483. DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
  484. /* DiPro Sensor interrupt */
  485. DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
  486. /* Audio Amplifier HF enable */
  487. DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
  488. /* GBF interface, pull low to reset state */
  489. DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
  490. /* MSP : HDTV INTERFACE GPIO line */
  491. DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
  492. /* Accelerometer interrupt lines */
  493. DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
  494. DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
  495. /* SD card detect GPIO pin */
  496. DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
  497. /*
  498. * Runtime stuff
  499. * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
  500. * etc.
  501. */
  502. DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
  503. DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
  504. DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
  505. };
  506. static struct pinctrl_map __initdata u9500_pinmap[] = {
  507. /* Mux in UART1 (just RX/TX) and set the pull-ups */
  508. DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
  509. DB8500_PIN_HOG("GPIO4_AH6", in_pu),
  510. DB8500_PIN_HOG("GPIO5_AG6", out_hi),
  511. /* WLAN_IRQ line */
  512. DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
  513. /* HSI */
  514. DB8500_MUX_HOG("hsir_a_1", "hsi"),
  515. DB8500_MUX_HOG("hsit_a_2", "hsi"),
  516. DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
  517. DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
  518. DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
  519. DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
  520. DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
  521. DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
  522. DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
  523. DB8500_PIN_HOG("GPIO226_AF8", gpio_out_hi), /* ACWAKE0 */
  524. };
  525. static struct pinctrl_map __initdata u8500_pinmap[] = {
  526. DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
  527. DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
  528. };
  529. static struct pinctrl_map __initdata snowball_pinmap[] = {
  530. /* Mux in SSP0 connected to AB8500, pull down RXD pin */
  531. DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
  532. DB8500_PIN_HOG("GPIO145_C13", pd),
  533. /* Always drive the MC0 DAT31DIR line high on these boards */
  534. DB8500_PIN_HOG("GPIO21_AB3", out_hi),
  535. /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
  536. DB8500_MUX_HOG("sm_b_1", "sm"),
  537. /* Drive RSTn_LAN high */
  538. DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
  539. /* Accelerometer/Magnetometer */
  540. DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
  541. DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
  542. DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
  543. /* WLAN/GBF */
  544. DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
  545. DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
  546. DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
  547. DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
  548. };
  549. /*
  550. * passing "pinsfor=" in kernel cmdline allows for custom
  551. * configuration of GPIOs on u8500 derived boards.
  552. */
  553. static int __init early_pinsfor(char *p)
  554. {
  555. pinsfor = PINS_FOR_DEFAULT;
  556. if (strcmp(p, "u9500-21") == 0)
  557. pinsfor = PINS_FOR_U9500;
  558. return 0;
  559. }
  560. early_param("pinsfor", early_pinsfor);
  561. int pins_for_u9500(void)
  562. {
  563. if (pinsfor == PINS_FOR_U9500)
  564. return 1;
  565. return 0;
  566. }
  567. static void __init mop500_href_family_pinmaps_init(void)
  568. {
  569. switch (pinsfor) {
  570. case PINS_FOR_U9500:
  571. pinctrl_register_mappings(u9500_pinmap,
  572. ARRAY_SIZE(u9500_pinmap));
  573. break;
  574. case PINS_FOR_DEFAULT:
  575. pinctrl_register_mappings(u8500_pinmap,
  576. ARRAY_SIZE(u8500_pinmap));
  577. default:
  578. break;
  579. }
  580. }
  581. void __init mop500_pinmaps_init(void)
  582. {
  583. pinctrl_register_mappings(mop500_family_pinmap,
  584. ARRAY_SIZE(mop500_family_pinmap));
  585. pinctrl_register_mappings(mop500_pinmap,
  586. ARRAY_SIZE(mop500_pinmap));
  587. mop500_href_family_pinmaps_init();
  588. }
  589. void __init snowball_pinmaps_init(void)
  590. {
  591. pinctrl_register_mappings(mop500_family_pinmap,
  592. ARRAY_SIZE(mop500_family_pinmap));
  593. pinctrl_register_mappings(snowball_pinmap,
  594. ARRAY_SIZE(snowball_pinmap));
  595. pinctrl_register_mappings(u8500_pinmap,
  596. ARRAY_SIZE(u8500_pinmap));
  597. }
  598. void __init hrefv60_pinmaps_init(void)
  599. {
  600. pinctrl_register_mappings(mop500_family_pinmap,
  601. ARRAY_SIZE(mop500_family_pinmap));
  602. pinctrl_register_mappings(hrefv60_pinmap,
  603. ARRAY_SIZE(hrefv60_pinmap));
  604. mop500_href_family_pinmaps_init();
  605. }