aerdrv_core.c 21 KB

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  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/delay.h>
  25. #include "aerdrv.h"
  26. static int forceload;
  27. static int nosourceid;
  28. module_param(forceload, bool, 0);
  29. module_param(nosourceid, bool, 0);
  30. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  31. {
  32. u16 reg16 = 0;
  33. int pos;
  34. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  35. if (!pos)
  36. return -EIO;
  37. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  38. if (!pos)
  39. return -EIO;
  40. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  41. reg16 = reg16 |
  42. PCI_EXP_DEVCTL_CERE |
  43. PCI_EXP_DEVCTL_NFERE |
  44. PCI_EXP_DEVCTL_FERE |
  45. PCI_EXP_DEVCTL_URRE;
  46. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  47. reg16);
  48. return 0;
  49. }
  50. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  51. {
  52. u16 reg16 = 0;
  53. int pos;
  54. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  55. if (!pos)
  56. return -EIO;
  57. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  58. reg16 = reg16 & ~(PCI_EXP_DEVCTL_CERE |
  59. PCI_EXP_DEVCTL_NFERE |
  60. PCI_EXP_DEVCTL_FERE |
  61. PCI_EXP_DEVCTL_URRE);
  62. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  63. reg16);
  64. return 0;
  65. }
  66. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  67. {
  68. int pos;
  69. u32 status, mask;
  70. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  71. if (!pos)
  72. return -EIO;
  73. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  74. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
  75. if (dev->error_state == pci_channel_io_normal)
  76. status &= ~mask; /* Clear corresponding nonfatal bits */
  77. else
  78. status &= mask; /* Clear corresponding fatal bits */
  79. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  80. return 0;
  81. }
  82. #if 0
  83. int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
  84. {
  85. int pos;
  86. u32 status;
  87. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  88. if (!pos)
  89. return -EIO;
  90. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
  91. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, status);
  92. return 0;
  93. }
  94. #endif /* 0 */
  95. static int set_device_error_reporting(struct pci_dev *dev, void *data)
  96. {
  97. bool enable = *((bool *)data);
  98. if (dev->pcie_type == PCIE_RC_PORT ||
  99. dev->pcie_type == PCIE_SW_UPSTREAM_PORT ||
  100. dev->pcie_type == PCIE_SW_DOWNSTREAM_PORT) {
  101. if (enable)
  102. pci_enable_pcie_error_reporting(dev);
  103. else
  104. pci_disable_pcie_error_reporting(dev);
  105. }
  106. if (enable)
  107. pcie_set_ecrc_checking(dev);
  108. return 0;
  109. }
  110. /**
  111. * set_downstream_devices_error_reporting - enable/disable the error reporting bits on the root port and its downstream ports.
  112. * @dev: pointer to root port's pci_dev data structure
  113. * @enable: true = enable error reporting, false = disable error reporting.
  114. */
  115. static void set_downstream_devices_error_reporting(struct pci_dev *dev,
  116. bool enable)
  117. {
  118. set_device_error_reporting(dev, &enable);
  119. if (!dev->subordinate)
  120. return;
  121. pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable);
  122. }
  123. static inline int compare_device_id(struct pci_dev *dev,
  124. struct aer_err_info *e_info)
  125. {
  126. if (e_info->id == ((dev->bus->number << 8) | dev->devfn)) {
  127. /*
  128. * Device ID match
  129. */
  130. return 1;
  131. }
  132. return 0;
  133. }
  134. #define PCI_BUS(x) (((x) >> 8) & 0xff)
  135. static int find_device_iter(struct pci_dev *dev, void *data)
  136. {
  137. int pos;
  138. u32 status;
  139. u32 mask;
  140. u16 reg16;
  141. int result;
  142. struct aer_err_info *e_info = (struct aer_err_info *)data;
  143. /*
  144. * When bus id is equal to 0, it might be a bad id
  145. * reported by root port.
  146. */
  147. if (!nosourceid && (PCI_BUS(e_info->id) != 0)) {
  148. result = compare_device_id(dev, e_info);
  149. if (result)
  150. e_info->dev = dev;
  151. return result;
  152. }
  153. /*
  154. * Next is to check when bus id is equal to 0 or
  155. * nosourceid==y. Some ports might lose the bus
  156. * id of error source id. We check AER status
  157. * registers to find the initial reporter.
  158. */
  159. if (atomic_read(&dev->enable_cnt) == 0)
  160. return 0;
  161. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  162. if (!pos)
  163. return 0;
  164. /* Check if AER is enabled */
  165. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  166. if (!(reg16 & (
  167. PCI_EXP_DEVCTL_CERE |
  168. PCI_EXP_DEVCTL_NFERE |
  169. PCI_EXP_DEVCTL_FERE |
  170. PCI_EXP_DEVCTL_URRE)))
  171. return 0;
  172. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  173. if (!pos)
  174. return 0;
  175. status = 0;
  176. mask = 0;
  177. if (e_info->severity == AER_CORRECTABLE) {
  178. pci_read_config_dword(dev,
  179. pos + PCI_ERR_COR_STATUS,
  180. &status);
  181. pci_read_config_dword(dev,
  182. pos + PCI_ERR_COR_MASK,
  183. &mask);
  184. if (status & ERR_CORRECTABLE_ERROR_MASK & ~mask) {
  185. e_info->dev = dev;
  186. return 1;
  187. }
  188. } else {
  189. pci_read_config_dword(dev,
  190. pos + PCI_ERR_UNCOR_STATUS,
  191. &status);
  192. pci_read_config_dword(dev,
  193. pos + PCI_ERR_UNCOR_MASK,
  194. &mask);
  195. if (status & ERR_UNCORRECTABLE_ERROR_MASK & ~mask) {
  196. e_info->dev = dev;
  197. return 1;
  198. }
  199. }
  200. return 0;
  201. }
  202. /**
  203. * find_source_device - search through device hierarchy for source device
  204. * @parent: pointer to Root Port pci_dev data structure
  205. * @err_info: including detailed error information such like id
  206. *
  207. * Invoked when error is detected at the Root Port.
  208. */
  209. static void find_source_device(struct pci_dev *parent,
  210. struct aer_err_info *e_info)
  211. {
  212. struct pci_dev *dev = parent;
  213. int result;
  214. /* Is Root Port an agent that sends error message? */
  215. result = find_device_iter(dev, e_info);
  216. if (result)
  217. return;
  218. pci_walk_bus(parent->subordinate, find_device_iter, e_info);
  219. }
  220. static int report_error_detected(struct pci_dev *dev, void *data)
  221. {
  222. pci_ers_result_t vote;
  223. struct pci_error_handlers *err_handler;
  224. struct aer_broadcast_data *result_data;
  225. result_data = (struct aer_broadcast_data *) data;
  226. dev->error_state = result_data->state;
  227. if (!dev->driver ||
  228. !dev->driver->err_handler ||
  229. !dev->driver->err_handler->error_detected) {
  230. if (result_data->state == pci_channel_io_frozen &&
  231. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  232. /*
  233. * In case of fatal recovery, if one of down-
  234. * stream device has no driver. We might be
  235. * unable to recover because a later insmod
  236. * of a driver for this device is unaware of
  237. * its hw state.
  238. */
  239. dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n",
  240. dev->driver ?
  241. "no AER-aware driver" : "no driver");
  242. }
  243. return 0;
  244. }
  245. err_handler = dev->driver->err_handler;
  246. vote = err_handler->error_detected(dev, result_data->state);
  247. result_data->result = merge_result(result_data->result, vote);
  248. return 0;
  249. }
  250. static int report_mmio_enabled(struct pci_dev *dev, void *data)
  251. {
  252. pci_ers_result_t vote;
  253. struct pci_error_handlers *err_handler;
  254. struct aer_broadcast_data *result_data;
  255. result_data = (struct aer_broadcast_data *) data;
  256. if (!dev->driver ||
  257. !dev->driver->err_handler ||
  258. !dev->driver->err_handler->mmio_enabled)
  259. return 0;
  260. err_handler = dev->driver->err_handler;
  261. vote = err_handler->mmio_enabled(dev);
  262. result_data->result = merge_result(result_data->result, vote);
  263. return 0;
  264. }
  265. static int report_slot_reset(struct pci_dev *dev, void *data)
  266. {
  267. pci_ers_result_t vote;
  268. struct pci_error_handlers *err_handler;
  269. struct aer_broadcast_data *result_data;
  270. result_data = (struct aer_broadcast_data *) data;
  271. if (!dev->driver ||
  272. !dev->driver->err_handler ||
  273. !dev->driver->err_handler->slot_reset)
  274. return 0;
  275. err_handler = dev->driver->err_handler;
  276. vote = err_handler->slot_reset(dev);
  277. result_data->result = merge_result(result_data->result, vote);
  278. return 0;
  279. }
  280. static int report_resume(struct pci_dev *dev, void *data)
  281. {
  282. struct pci_error_handlers *err_handler;
  283. dev->error_state = pci_channel_io_normal;
  284. if (!dev->driver ||
  285. !dev->driver->err_handler ||
  286. !dev->driver->err_handler->resume)
  287. return 0;
  288. err_handler = dev->driver->err_handler;
  289. err_handler->resume(dev);
  290. return 0;
  291. }
  292. /**
  293. * broadcast_error_message - handle message broadcast to downstream drivers
  294. * @dev: pointer to from where in a hierarchy message is broadcasted down
  295. * @state: error state
  296. * @error_mesg: message to print
  297. * @cb: callback to be broadcasted
  298. *
  299. * Invoked during error recovery process. Once being invoked, the content
  300. * of error severity will be broadcasted to all downstream drivers in a
  301. * hierarchy in question.
  302. */
  303. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  304. enum pci_channel_state state,
  305. char *error_mesg,
  306. int (*cb)(struct pci_dev *, void *))
  307. {
  308. struct aer_broadcast_data result_data;
  309. dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg);
  310. result_data.state = state;
  311. if (cb == report_error_detected)
  312. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  313. else
  314. result_data.result = PCI_ERS_RESULT_RECOVERED;
  315. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  316. /*
  317. * If the error is reported by a bridge, we think this error
  318. * is related to the downstream link of the bridge, so we
  319. * do error recovery on all subordinates of the bridge instead
  320. * of the bridge and clear the error status of the bridge.
  321. */
  322. if (cb == report_error_detected)
  323. dev->error_state = state;
  324. pci_walk_bus(dev->subordinate, cb, &result_data);
  325. if (cb == report_resume) {
  326. pci_cleanup_aer_uncorrect_error_status(dev);
  327. dev->error_state = pci_channel_io_normal;
  328. }
  329. }
  330. else {
  331. /*
  332. * If the error is reported by an end point, we think this
  333. * error is related to the upstream link of the end point.
  334. */
  335. pci_walk_bus(dev->bus, cb, &result_data);
  336. }
  337. return result_data.result;
  338. }
  339. struct find_aer_service_data {
  340. struct pcie_port_service_driver *aer_driver;
  341. int is_downstream;
  342. };
  343. static int find_aer_service_iter(struct device *device, void *data)
  344. {
  345. struct device_driver *driver;
  346. struct pcie_port_service_driver *service_driver;
  347. struct find_aer_service_data *result;
  348. result = (struct find_aer_service_data *) data;
  349. if (device->bus == &pcie_port_bus_type) {
  350. struct pcie_port_data *port_data;
  351. port_data = pci_get_drvdata(to_pcie_device(device)->port);
  352. if (port_data->port_type == PCIE_SW_DOWNSTREAM_PORT)
  353. result->is_downstream = 1;
  354. driver = device->driver;
  355. if (driver) {
  356. service_driver = to_service_driver(driver);
  357. if (service_driver->service == PCIE_PORT_SERVICE_AER) {
  358. result->aer_driver = service_driver;
  359. return 1;
  360. }
  361. }
  362. }
  363. return 0;
  364. }
  365. static void find_aer_service(struct pci_dev *dev,
  366. struct find_aer_service_data *data)
  367. {
  368. int retval;
  369. retval = device_for_each_child(&dev->dev, data, find_aer_service_iter);
  370. }
  371. static pci_ers_result_t reset_link(struct pcie_device *aerdev,
  372. struct pci_dev *dev)
  373. {
  374. struct pci_dev *udev;
  375. pci_ers_result_t status;
  376. struct find_aer_service_data data;
  377. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)
  378. udev = dev;
  379. else
  380. udev= dev->bus->self;
  381. data.is_downstream = 0;
  382. data.aer_driver = NULL;
  383. find_aer_service(udev, &data);
  384. /*
  385. * Use the aer driver of the error agent firstly.
  386. * If it hasn't the aer driver, use the root port's
  387. */
  388. if (!data.aer_driver || !data.aer_driver->reset_link) {
  389. if (data.is_downstream &&
  390. aerdev->device.driver &&
  391. to_service_driver(aerdev->device.driver)->reset_link) {
  392. data.aer_driver =
  393. to_service_driver(aerdev->device.driver);
  394. } else {
  395. dev_printk(KERN_DEBUG, &dev->dev, "no link-reset "
  396. "support\n");
  397. return PCI_ERS_RESULT_DISCONNECT;
  398. }
  399. }
  400. status = data.aer_driver->reset_link(udev);
  401. if (status != PCI_ERS_RESULT_RECOVERED) {
  402. dev_printk(KERN_DEBUG, &dev->dev, "link reset at upstream "
  403. "device %s failed\n", pci_name(udev));
  404. return PCI_ERS_RESULT_DISCONNECT;
  405. }
  406. return status;
  407. }
  408. /**
  409. * do_recovery - handle nonfatal/fatal error recovery process
  410. * @aerdev: pointer to a pcie_device data structure of root port
  411. * @dev: pointer to a pci_dev data structure of agent detecting an error
  412. * @severity: error severity type
  413. *
  414. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  415. * error detected message to all downstream drivers within a hierarchy in
  416. * question and return the returned code.
  417. */
  418. static pci_ers_result_t do_recovery(struct pcie_device *aerdev,
  419. struct pci_dev *dev,
  420. int severity)
  421. {
  422. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  423. enum pci_channel_state state;
  424. if (severity == AER_FATAL)
  425. state = pci_channel_io_frozen;
  426. else
  427. state = pci_channel_io_normal;
  428. status = broadcast_error_message(dev,
  429. state,
  430. "error_detected",
  431. report_error_detected);
  432. if (severity == AER_FATAL) {
  433. result = reset_link(aerdev, dev);
  434. if (result != PCI_ERS_RESULT_RECOVERED) {
  435. /* TODO: Should panic here? */
  436. return result;
  437. }
  438. }
  439. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  440. status = broadcast_error_message(dev,
  441. state,
  442. "mmio_enabled",
  443. report_mmio_enabled);
  444. if (status == PCI_ERS_RESULT_NEED_RESET) {
  445. /*
  446. * TODO: Should call platform-specific
  447. * functions to reset slot before calling
  448. * drivers' slot_reset callbacks?
  449. */
  450. status = broadcast_error_message(dev,
  451. state,
  452. "slot_reset",
  453. report_slot_reset);
  454. }
  455. if (status == PCI_ERS_RESULT_RECOVERED)
  456. broadcast_error_message(dev,
  457. state,
  458. "resume",
  459. report_resume);
  460. return status;
  461. }
  462. /**
  463. * handle_error_source - handle logging error into an event log
  464. * @aerdev: pointer to pcie_device data structure of the root port
  465. * @dev: pointer to pci_dev data structure of error source device
  466. * @info: comprehensive error information
  467. *
  468. * Invoked when an error being detected by Root Port.
  469. */
  470. static void handle_error_source(struct pcie_device * aerdev,
  471. struct pci_dev *dev,
  472. struct aer_err_info *info)
  473. {
  474. pci_ers_result_t status = 0;
  475. int pos;
  476. if (info->severity == AER_CORRECTABLE) {
  477. /*
  478. * Correctable error does not need software intevention.
  479. * No need to go through error recovery process.
  480. */
  481. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  482. if (pos)
  483. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  484. info->status);
  485. } else {
  486. status = do_recovery(aerdev, dev, info->severity);
  487. if (status == PCI_ERS_RESULT_RECOVERED) {
  488. dev_printk(KERN_DEBUG, &dev->dev, "AER driver "
  489. "successfully recovered\n");
  490. } else {
  491. /* TODO: Should kernel panic here? */
  492. dev_printk(KERN_DEBUG, &dev->dev, "AER driver didn't "
  493. "recover\n");
  494. }
  495. }
  496. }
  497. /**
  498. * aer_enable_rootport - enable Root Port's interrupts when receiving messages
  499. * @rpc: pointer to a Root Port data structure
  500. *
  501. * Invoked when PCIE bus loads AER service driver.
  502. */
  503. void aer_enable_rootport(struct aer_rpc *rpc)
  504. {
  505. struct pci_dev *pdev = rpc->rpd->port;
  506. int pos, aer_pos;
  507. u16 reg16;
  508. u32 reg32;
  509. pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
  510. /* Clear PCIE Capability's Device Status */
  511. pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
  512. pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
  513. /* Disable system error generation in response to error messages */
  514. pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16);
  515. reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
  516. pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
  517. aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  518. /* Clear error status */
  519. pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, &reg32);
  520. pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, reg32);
  521. pci_read_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, &reg32);
  522. pci_write_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, reg32);
  523. pci_read_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, &reg32);
  524. pci_write_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, reg32);
  525. /*
  526. * Enable error reporting for the root port device and downstream port
  527. * devices.
  528. */
  529. set_downstream_devices_error_reporting(pdev, true);
  530. /* Enable Root Port's interrupt in response to error messages */
  531. pci_write_config_dword(pdev,
  532. aer_pos + PCI_ERR_ROOT_COMMAND,
  533. ROOT_PORT_INTR_ON_MESG_MASK);
  534. }
  535. /**
  536. * disable_root_aer - disable Root Port's interrupts when receiving messages
  537. * @rpc: pointer to a Root Port data structure
  538. *
  539. * Invoked when PCIE bus unloads AER service driver.
  540. */
  541. static void disable_root_aer(struct aer_rpc *rpc)
  542. {
  543. struct pci_dev *pdev = rpc->rpd->port;
  544. u32 reg32;
  545. int pos;
  546. /*
  547. * Disable error reporting for the root port device and downstream port
  548. * devices.
  549. */
  550. set_downstream_devices_error_reporting(pdev, false);
  551. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  552. /* Disable Root's interrupt in response to error messages */
  553. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, 0);
  554. /* Clear Root's error status reg */
  555. pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  556. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, reg32);
  557. }
  558. /**
  559. * get_e_source - retrieve an error source
  560. * @rpc: pointer to the root port which holds an error
  561. *
  562. * Invoked by DPC handler to consume an error.
  563. */
  564. static struct aer_err_source* get_e_source(struct aer_rpc *rpc)
  565. {
  566. struct aer_err_source *e_source;
  567. unsigned long flags;
  568. /* Lock access to Root error producer/consumer index */
  569. spin_lock_irqsave(&rpc->e_lock, flags);
  570. if (rpc->prod_idx == rpc->cons_idx) {
  571. spin_unlock_irqrestore(&rpc->e_lock, flags);
  572. return NULL;
  573. }
  574. e_source = &rpc->e_sources[rpc->cons_idx];
  575. rpc->cons_idx++;
  576. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  577. rpc->cons_idx = 0;
  578. spin_unlock_irqrestore(&rpc->e_lock, flags);
  579. return e_source;
  580. }
  581. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  582. {
  583. int pos;
  584. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  585. /* The device might not support AER */
  586. if (!pos)
  587. return AER_SUCCESS;
  588. if (info->severity == AER_CORRECTABLE) {
  589. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  590. &info->status);
  591. if (!(info->status & ERR_CORRECTABLE_ERROR_MASK))
  592. return AER_UNSUCCESS;
  593. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  594. info->severity == AER_NONFATAL) {
  595. /* Link is still healthy for IO reads */
  596. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  597. &info->status);
  598. if (!(info->status & ERR_UNCORRECTABLE_ERROR_MASK))
  599. return AER_UNSUCCESS;
  600. if (info->status & AER_LOG_TLP_MASKS) {
  601. info->flags |= AER_TLP_HEADER_VALID_FLAG;
  602. pci_read_config_dword(dev,
  603. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  604. pci_read_config_dword(dev,
  605. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  606. pci_read_config_dword(dev,
  607. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  608. pci_read_config_dword(dev,
  609. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  610. }
  611. }
  612. return AER_SUCCESS;
  613. }
  614. /**
  615. * aer_isr_one_error - consume an error detected by root port
  616. * @p_device: pointer to error root port service device
  617. * @e_src: pointer to an error source
  618. */
  619. static void aer_isr_one_error(struct pcie_device *p_device,
  620. struct aer_err_source *e_src)
  621. {
  622. struct aer_err_info *e_info;
  623. int i;
  624. /* struct aer_err_info might be big, so we allocate it with slab */
  625. e_info = kmalloc(sizeof(struct aer_err_info), GFP_KERNEL);
  626. if (e_info == NULL) {
  627. dev_printk(KERN_DEBUG, &p_device->port->dev,
  628. "Can't allocate mem when processing AER errors\n");
  629. return;
  630. }
  631. /*
  632. * There is a possibility that both correctable error and
  633. * uncorrectable error being logged. Report correctable error first.
  634. */
  635. for (i = 1; i & ROOT_ERR_STATUS_MASKS ; i <<= 2) {
  636. if (i > 4)
  637. break;
  638. if (!(e_src->status & i))
  639. continue;
  640. memset(e_info, 0, sizeof(struct aer_err_info));
  641. /* Init comprehensive error information */
  642. if (i & PCI_ERR_ROOT_COR_RCV) {
  643. e_info->id = ERR_COR_ID(e_src->id);
  644. e_info->severity = AER_CORRECTABLE;
  645. } else {
  646. e_info->id = ERR_UNCOR_ID(e_src->id);
  647. e_info->severity = ((e_src->status >> 6) & 1);
  648. }
  649. if (e_src->status &
  650. (PCI_ERR_ROOT_MULTI_COR_RCV |
  651. PCI_ERR_ROOT_MULTI_UNCOR_RCV))
  652. e_info->flags |= AER_MULTI_ERROR_VALID_FLAG;
  653. find_source_device(p_device->port, e_info);
  654. if (e_info->dev == NULL) {
  655. printk(KERN_DEBUG "%s->can't find device of ID%04x\n",
  656. __func__, e_info->id);
  657. continue;
  658. }
  659. if (get_device_error_info(e_info->dev, e_info) ==
  660. AER_SUCCESS) {
  661. aer_print_error(e_info->dev, e_info);
  662. handle_error_source(p_device,
  663. e_info->dev,
  664. e_info);
  665. }
  666. }
  667. kfree(e_info);
  668. }
  669. /**
  670. * aer_isr - consume errors detected by root port
  671. * @work: definition of this work item
  672. *
  673. * Invoked, as DPC, when root port records new detected error
  674. */
  675. void aer_isr(struct work_struct *work)
  676. {
  677. struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
  678. struct pcie_device *p_device = rpc->rpd;
  679. struct aer_err_source *e_src;
  680. mutex_lock(&rpc->rpc_mutex);
  681. e_src = get_e_source(rpc);
  682. while (e_src) {
  683. aer_isr_one_error(p_device, e_src);
  684. e_src = get_e_source(rpc);
  685. }
  686. mutex_unlock(&rpc->rpc_mutex);
  687. wake_up(&rpc->wait_release);
  688. }
  689. /**
  690. * aer_delete_rootport - disable root port aer and delete service data
  691. * @rpc: pointer to a root port device being deleted
  692. *
  693. * Invoked when AER service unloaded on a specific Root Port
  694. */
  695. void aer_delete_rootport(struct aer_rpc *rpc)
  696. {
  697. /* Disable root port AER itself */
  698. disable_root_aer(rpc);
  699. kfree(rpc);
  700. }
  701. /**
  702. * aer_init - provide AER initialization
  703. * @dev: pointer to AER pcie device
  704. *
  705. * Invoked when AER service driver is loaded.
  706. */
  707. int aer_init(struct pcie_device *dev)
  708. {
  709. if (aer_osc_setup(dev) && !forceload)
  710. return -ENXIO;
  711. return AER_SUCCESS;
  712. }
  713. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  714. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  715. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);