events.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849
  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <asm/ptrace.h>
  30. #include <asm/irq.h>
  31. #include <asm/sync_bitops.h>
  32. #include <asm/xen/hypercall.h>
  33. #include <asm/xen/hypervisor.h>
  34. #include <xen/xen-ops.h>
  35. #include <xen/events.h>
  36. #include <xen/interface/xen.h>
  37. #include <xen/interface/event_channel.h>
  38. /*
  39. * This lock protects updates to the following mapping and reference-count
  40. * arrays. The lock does not need to be acquired to read the mapping tables.
  41. */
  42. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  43. /* IRQ <-> VIRQ mapping. */
  44. static DEFINE_PER_CPU(int, virq_to_irq[NR_VIRQS]) = {[0 ... NR_VIRQS-1] = -1};
  45. /* IRQ <-> IPI mapping */
  46. static DEFINE_PER_CPU(int, ipi_to_irq[XEN_NR_IPIS]) = {[0 ... XEN_NR_IPIS-1] = -1};
  47. /* Packed IRQ information: binding type, sub-type index, and event channel. */
  48. struct packed_irq
  49. {
  50. unsigned short evtchn;
  51. unsigned char index;
  52. unsigned char type;
  53. };
  54. static struct packed_irq irq_info[NR_IRQS];
  55. /* Binding types. */
  56. enum {
  57. IRQT_UNBOUND,
  58. IRQT_PIRQ,
  59. IRQT_VIRQ,
  60. IRQT_IPI,
  61. IRQT_EVTCHN
  62. };
  63. /* Convenient shorthand for packed representation of an unbound IRQ. */
  64. #define IRQ_UNBOUND mk_irq_info(IRQT_UNBOUND, 0, 0)
  65. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  66. [0 ... NR_EVENT_CHANNELS-1] = -1
  67. };
  68. struct cpu_evtchn_s {
  69. unsigned long bits[NR_EVENT_CHANNELS/BITS_PER_LONG];
  70. };
  71. static struct cpu_evtchn_s *cpu_evtchn_mask_p;
  72. static inline unsigned long *cpu_evtchn_mask(int cpu)
  73. {
  74. return cpu_evtchn_mask_p[cpu].bits;
  75. }
  76. static u8 cpu_evtchn[NR_EVENT_CHANNELS];
  77. /* Reference counts for bindings to IRQs. */
  78. static int irq_bindcount[NR_IRQS];
  79. /* Xen will never allocate port zero for any purpose. */
  80. #define VALID_EVTCHN(chn) ((chn) != 0)
  81. static struct irq_chip xen_dynamic_chip;
  82. /* Constructor for packed IRQ information. */
  83. static inline struct packed_irq mk_irq_info(u32 type, u32 index, u32 evtchn)
  84. {
  85. return (struct packed_irq) { evtchn, index, type };
  86. }
  87. /*
  88. * Accessors for packed IRQ information.
  89. */
  90. static inline unsigned int evtchn_from_irq(int irq)
  91. {
  92. return irq_info[irq].evtchn;
  93. }
  94. static inline unsigned int index_from_irq(int irq)
  95. {
  96. return irq_info[irq].index;
  97. }
  98. static inline unsigned int type_from_irq(int irq)
  99. {
  100. return irq_info[irq].type;
  101. }
  102. static inline unsigned long active_evtchns(unsigned int cpu,
  103. struct shared_info *sh,
  104. unsigned int idx)
  105. {
  106. return (sh->evtchn_pending[idx] &
  107. cpu_evtchn_mask(cpu)[idx] &
  108. ~sh->evtchn_mask[idx]);
  109. }
  110. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  111. {
  112. int irq = evtchn_to_irq[chn];
  113. BUG_ON(irq == -1);
  114. #ifdef CONFIG_SMP
  115. cpumask_copy(irq_to_desc(irq)->affinity, cpumask_of(cpu));
  116. #endif
  117. __clear_bit(chn, cpu_evtchn_mask(cpu_evtchn[chn]));
  118. __set_bit(chn, cpu_evtchn_mask(cpu));
  119. cpu_evtchn[chn] = cpu;
  120. }
  121. static void init_evtchn_cpu_bindings(void)
  122. {
  123. #ifdef CONFIG_SMP
  124. struct irq_desc *desc;
  125. int i;
  126. /* By default all event channels notify CPU#0. */
  127. for_each_irq_desc(i, desc) {
  128. cpumask_copy(desc->affinity, cpumask_of(0));
  129. }
  130. #endif
  131. memset(cpu_evtchn, 0, sizeof(cpu_evtchn));
  132. memset(cpu_evtchn_mask(0), ~0, sizeof(cpu_evtchn_mask(0)));
  133. }
  134. static inline unsigned int cpu_from_evtchn(unsigned int evtchn)
  135. {
  136. return cpu_evtchn[evtchn];
  137. }
  138. static inline void clear_evtchn(int port)
  139. {
  140. struct shared_info *s = HYPERVISOR_shared_info;
  141. sync_clear_bit(port, &s->evtchn_pending[0]);
  142. }
  143. static inline void set_evtchn(int port)
  144. {
  145. struct shared_info *s = HYPERVISOR_shared_info;
  146. sync_set_bit(port, &s->evtchn_pending[0]);
  147. }
  148. static inline int test_evtchn(int port)
  149. {
  150. struct shared_info *s = HYPERVISOR_shared_info;
  151. return sync_test_bit(port, &s->evtchn_pending[0]);
  152. }
  153. /**
  154. * notify_remote_via_irq - send event to remote end of event channel via irq
  155. * @irq: irq of event channel to send event to
  156. *
  157. * Unlike notify_remote_via_evtchn(), this is safe to use across
  158. * save/restore. Notifications on a broken connection are silently
  159. * dropped.
  160. */
  161. void notify_remote_via_irq(int irq)
  162. {
  163. int evtchn = evtchn_from_irq(irq);
  164. if (VALID_EVTCHN(evtchn))
  165. notify_remote_via_evtchn(evtchn);
  166. }
  167. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  168. static void mask_evtchn(int port)
  169. {
  170. struct shared_info *s = HYPERVISOR_shared_info;
  171. sync_set_bit(port, &s->evtchn_mask[0]);
  172. }
  173. static void unmask_evtchn(int port)
  174. {
  175. struct shared_info *s = HYPERVISOR_shared_info;
  176. unsigned int cpu = get_cpu();
  177. BUG_ON(!irqs_disabled());
  178. /* Slow path (hypercall) if this is a non-local port. */
  179. if (unlikely(cpu != cpu_from_evtchn(port))) {
  180. struct evtchn_unmask unmask = { .port = port };
  181. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  182. } else {
  183. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  184. sync_clear_bit(port, &s->evtchn_mask[0]);
  185. /*
  186. * The following is basically the equivalent of
  187. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  188. * the interrupt edge' if the channel is masked.
  189. */
  190. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  191. !sync_test_and_set_bit(port / BITS_PER_LONG,
  192. &vcpu_info->evtchn_pending_sel))
  193. vcpu_info->evtchn_upcall_pending = 1;
  194. }
  195. put_cpu();
  196. }
  197. static int find_unbound_irq(void)
  198. {
  199. int irq;
  200. struct irq_desc *desc;
  201. /* Only allocate from dynirq range */
  202. for (irq = 0; irq < nr_irqs; irq++)
  203. if (irq_bindcount[irq] == 0)
  204. break;
  205. if (irq == nr_irqs)
  206. panic("No available IRQ to bind to: increase nr_irqs!\n");
  207. desc = irq_to_desc_alloc_cpu(irq, 0);
  208. if (WARN_ON(desc == NULL))
  209. return -1;
  210. return irq;
  211. }
  212. int bind_evtchn_to_irq(unsigned int evtchn)
  213. {
  214. int irq;
  215. spin_lock(&irq_mapping_update_lock);
  216. irq = evtchn_to_irq[evtchn];
  217. if (irq == -1) {
  218. irq = find_unbound_irq();
  219. dynamic_irq_init(irq);
  220. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  221. handle_level_irq, "event");
  222. evtchn_to_irq[evtchn] = irq;
  223. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  224. }
  225. irq_bindcount[irq]++;
  226. spin_unlock(&irq_mapping_update_lock);
  227. return irq;
  228. }
  229. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  230. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  231. {
  232. struct evtchn_bind_ipi bind_ipi;
  233. int evtchn, irq;
  234. spin_lock(&irq_mapping_update_lock);
  235. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  236. if (irq == -1) {
  237. irq = find_unbound_irq();
  238. if (irq < 0)
  239. goto out;
  240. dynamic_irq_init(irq);
  241. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  242. handle_level_irq, "ipi");
  243. bind_ipi.vcpu = cpu;
  244. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  245. &bind_ipi) != 0)
  246. BUG();
  247. evtchn = bind_ipi.port;
  248. evtchn_to_irq[evtchn] = irq;
  249. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  250. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  251. bind_evtchn_to_cpu(evtchn, cpu);
  252. }
  253. irq_bindcount[irq]++;
  254. out:
  255. spin_unlock(&irq_mapping_update_lock);
  256. return irq;
  257. }
  258. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  259. {
  260. struct evtchn_bind_virq bind_virq;
  261. int evtchn, irq;
  262. spin_lock(&irq_mapping_update_lock);
  263. irq = per_cpu(virq_to_irq, cpu)[virq];
  264. if (irq == -1) {
  265. bind_virq.virq = virq;
  266. bind_virq.vcpu = cpu;
  267. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  268. &bind_virq) != 0)
  269. BUG();
  270. evtchn = bind_virq.port;
  271. irq = find_unbound_irq();
  272. dynamic_irq_init(irq);
  273. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  274. handle_level_irq, "virq");
  275. evtchn_to_irq[evtchn] = irq;
  276. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  277. per_cpu(virq_to_irq, cpu)[virq] = irq;
  278. bind_evtchn_to_cpu(evtchn, cpu);
  279. }
  280. irq_bindcount[irq]++;
  281. spin_unlock(&irq_mapping_update_lock);
  282. return irq;
  283. }
  284. static void unbind_from_irq(unsigned int irq)
  285. {
  286. struct evtchn_close close;
  287. int evtchn = evtchn_from_irq(irq);
  288. spin_lock(&irq_mapping_update_lock);
  289. if ((--irq_bindcount[irq] == 0) && VALID_EVTCHN(evtchn)) {
  290. close.port = evtchn;
  291. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  292. BUG();
  293. switch (type_from_irq(irq)) {
  294. case IRQT_VIRQ:
  295. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  296. [index_from_irq(irq)] = -1;
  297. break;
  298. case IRQT_IPI:
  299. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  300. [index_from_irq(irq)] = -1;
  301. break;
  302. default:
  303. break;
  304. }
  305. /* Closed ports are implicitly re-bound to VCPU0. */
  306. bind_evtchn_to_cpu(evtchn, 0);
  307. evtchn_to_irq[evtchn] = -1;
  308. irq_info[irq] = IRQ_UNBOUND;
  309. dynamic_irq_cleanup(irq);
  310. }
  311. spin_unlock(&irq_mapping_update_lock);
  312. }
  313. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  314. irq_handler_t handler,
  315. unsigned long irqflags,
  316. const char *devname, void *dev_id)
  317. {
  318. unsigned int irq;
  319. int retval;
  320. irq = bind_evtchn_to_irq(evtchn);
  321. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  322. if (retval != 0) {
  323. unbind_from_irq(irq);
  324. return retval;
  325. }
  326. return irq;
  327. }
  328. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  329. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  330. irq_handler_t handler,
  331. unsigned long irqflags, const char *devname, void *dev_id)
  332. {
  333. unsigned int irq;
  334. int retval;
  335. irq = bind_virq_to_irq(virq, cpu);
  336. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  337. if (retval != 0) {
  338. unbind_from_irq(irq);
  339. return retval;
  340. }
  341. return irq;
  342. }
  343. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  344. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  345. unsigned int cpu,
  346. irq_handler_t handler,
  347. unsigned long irqflags,
  348. const char *devname,
  349. void *dev_id)
  350. {
  351. int irq, retval;
  352. irq = bind_ipi_to_irq(ipi, cpu);
  353. if (irq < 0)
  354. return irq;
  355. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  356. if (retval != 0) {
  357. unbind_from_irq(irq);
  358. return retval;
  359. }
  360. return irq;
  361. }
  362. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  363. {
  364. free_irq(irq, dev_id);
  365. unbind_from_irq(irq);
  366. }
  367. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  368. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  369. {
  370. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  371. BUG_ON(irq < 0);
  372. notify_remote_via_irq(irq);
  373. }
  374. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  375. {
  376. struct shared_info *sh = HYPERVISOR_shared_info;
  377. int cpu = smp_processor_id();
  378. int i;
  379. unsigned long flags;
  380. static DEFINE_SPINLOCK(debug_lock);
  381. spin_lock_irqsave(&debug_lock, flags);
  382. printk("vcpu %d\n ", cpu);
  383. for_each_online_cpu(i) {
  384. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  385. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  386. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  387. v->evtchn_upcall_pending,
  388. v->evtchn_pending_sel);
  389. }
  390. printk("pending:\n ");
  391. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  392. printk("%08lx%s", sh->evtchn_pending[i],
  393. i % 8 == 0 ? "\n " : " ");
  394. printk("\nmasks:\n ");
  395. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  396. printk("%08lx%s", sh->evtchn_mask[i],
  397. i % 8 == 0 ? "\n " : " ");
  398. printk("\nunmasked:\n ");
  399. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  400. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  401. i % 8 == 0 ? "\n " : " ");
  402. printk("\npending list:\n");
  403. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  404. if (sync_test_bit(i, sh->evtchn_pending)) {
  405. printk(" %d: event %d -> irq %d\n",
  406. cpu_evtchn[i], i,
  407. evtchn_to_irq[i]);
  408. }
  409. }
  410. spin_unlock_irqrestore(&debug_lock, flags);
  411. return IRQ_HANDLED;
  412. }
  413. /*
  414. * Search the CPUs pending events bitmasks. For each one found, map
  415. * the event number to an irq, and feed it into do_IRQ() for
  416. * handling.
  417. *
  418. * Xen uses a two-level bitmap to speed searching. The first level is
  419. * a bitset of words which contain pending event bits. The second
  420. * level is a bitset of pending events themselves.
  421. */
  422. void xen_evtchn_do_upcall(struct pt_regs *regs)
  423. {
  424. int cpu = get_cpu();
  425. struct shared_info *s = HYPERVISOR_shared_info;
  426. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  427. static DEFINE_PER_CPU(unsigned, nesting_count);
  428. unsigned count;
  429. do {
  430. unsigned long pending_words;
  431. vcpu_info->evtchn_upcall_pending = 0;
  432. if (__get_cpu_var(nesting_count)++)
  433. goto out;
  434. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  435. /* Clear master flag /before/ clearing selector flag. */
  436. wmb();
  437. #endif
  438. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  439. while (pending_words != 0) {
  440. unsigned long pending_bits;
  441. int word_idx = __ffs(pending_words);
  442. pending_words &= ~(1UL << word_idx);
  443. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  444. int bit_idx = __ffs(pending_bits);
  445. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  446. int irq = evtchn_to_irq[port];
  447. if (irq != -1)
  448. xen_do_IRQ(irq, regs);
  449. }
  450. }
  451. BUG_ON(!irqs_disabled());
  452. count = __get_cpu_var(nesting_count);
  453. __get_cpu_var(nesting_count) = 0;
  454. } while(count != 1);
  455. out:
  456. put_cpu();
  457. }
  458. /* Rebind a new event channel to an existing irq. */
  459. void rebind_evtchn_irq(int evtchn, int irq)
  460. {
  461. /* Make sure the irq is masked, since the new event channel
  462. will also be masked. */
  463. disable_irq(irq);
  464. spin_lock(&irq_mapping_update_lock);
  465. /* After resume the irq<->evtchn mappings are all cleared out */
  466. BUG_ON(evtchn_to_irq[evtchn] != -1);
  467. /* Expect irq to have been bound before,
  468. so the bindcount should be non-0 */
  469. BUG_ON(irq_bindcount[irq] == 0);
  470. evtchn_to_irq[evtchn] = irq;
  471. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  472. spin_unlock(&irq_mapping_update_lock);
  473. /* new event channels are always bound to cpu 0 */
  474. irq_set_affinity(irq, cpumask_of(0));
  475. /* Unmask the event channel. */
  476. enable_irq(irq);
  477. }
  478. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  479. static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  480. {
  481. struct evtchn_bind_vcpu bind_vcpu;
  482. int evtchn = evtchn_from_irq(irq);
  483. if (!VALID_EVTCHN(evtchn))
  484. return;
  485. /* Send future instances of this interrupt to other vcpu. */
  486. bind_vcpu.port = evtchn;
  487. bind_vcpu.vcpu = tcpu;
  488. /*
  489. * If this fails, it usually just indicates that we're dealing with a
  490. * virq or IPI channel, which don't actually need to be rebound. Ignore
  491. * it, but don't do the xenlinux-level rebind in that case.
  492. */
  493. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  494. bind_evtchn_to_cpu(evtchn, tcpu);
  495. }
  496. static void set_affinity_irq(unsigned irq, const struct cpumask *dest)
  497. {
  498. unsigned tcpu = cpumask_first(dest);
  499. rebind_irq_to_cpu(irq, tcpu);
  500. }
  501. int resend_irq_on_evtchn(unsigned int irq)
  502. {
  503. int masked, evtchn = evtchn_from_irq(irq);
  504. struct shared_info *s = HYPERVISOR_shared_info;
  505. if (!VALID_EVTCHN(evtchn))
  506. return 1;
  507. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  508. sync_set_bit(evtchn, s->evtchn_pending);
  509. if (!masked)
  510. unmask_evtchn(evtchn);
  511. return 1;
  512. }
  513. static void enable_dynirq(unsigned int irq)
  514. {
  515. int evtchn = evtchn_from_irq(irq);
  516. if (VALID_EVTCHN(evtchn))
  517. unmask_evtchn(evtchn);
  518. }
  519. static void disable_dynirq(unsigned int irq)
  520. {
  521. int evtchn = evtchn_from_irq(irq);
  522. if (VALID_EVTCHN(evtchn))
  523. mask_evtchn(evtchn);
  524. }
  525. static void ack_dynirq(unsigned int irq)
  526. {
  527. int evtchn = evtchn_from_irq(irq);
  528. move_native_irq(irq);
  529. if (VALID_EVTCHN(evtchn))
  530. clear_evtchn(evtchn);
  531. }
  532. static int retrigger_dynirq(unsigned int irq)
  533. {
  534. int evtchn = evtchn_from_irq(irq);
  535. struct shared_info *sh = HYPERVISOR_shared_info;
  536. int ret = 0;
  537. if (VALID_EVTCHN(evtchn)) {
  538. int masked;
  539. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  540. sync_set_bit(evtchn, sh->evtchn_pending);
  541. if (!masked)
  542. unmask_evtchn(evtchn);
  543. ret = 1;
  544. }
  545. return ret;
  546. }
  547. static void restore_cpu_virqs(unsigned int cpu)
  548. {
  549. struct evtchn_bind_virq bind_virq;
  550. int virq, irq, evtchn;
  551. for (virq = 0; virq < NR_VIRQS; virq++) {
  552. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  553. continue;
  554. BUG_ON(irq_info[irq].type != IRQT_VIRQ);
  555. BUG_ON(irq_info[irq].index != virq);
  556. /* Get a new binding from Xen. */
  557. bind_virq.virq = virq;
  558. bind_virq.vcpu = cpu;
  559. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  560. &bind_virq) != 0)
  561. BUG();
  562. evtchn = bind_virq.port;
  563. /* Record the new mapping. */
  564. evtchn_to_irq[evtchn] = irq;
  565. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  566. bind_evtchn_to_cpu(evtchn, cpu);
  567. /* Ready for use. */
  568. unmask_evtchn(evtchn);
  569. }
  570. }
  571. static void restore_cpu_ipis(unsigned int cpu)
  572. {
  573. struct evtchn_bind_ipi bind_ipi;
  574. int ipi, irq, evtchn;
  575. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  576. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  577. continue;
  578. BUG_ON(irq_info[irq].type != IRQT_IPI);
  579. BUG_ON(irq_info[irq].index != ipi);
  580. /* Get a new binding from Xen. */
  581. bind_ipi.vcpu = cpu;
  582. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  583. &bind_ipi) != 0)
  584. BUG();
  585. evtchn = bind_ipi.port;
  586. /* Record the new mapping. */
  587. evtchn_to_irq[evtchn] = irq;
  588. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  589. bind_evtchn_to_cpu(evtchn, cpu);
  590. /* Ready for use. */
  591. unmask_evtchn(evtchn);
  592. }
  593. }
  594. /* Clear an irq's pending state, in preparation for polling on it */
  595. void xen_clear_irq_pending(int irq)
  596. {
  597. int evtchn = evtchn_from_irq(irq);
  598. if (VALID_EVTCHN(evtchn))
  599. clear_evtchn(evtchn);
  600. }
  601. void xen_set_irq_pending(int irq)
  602. {
  603. int evtchn = evtchn_from_irq(irq);
  604. if (VALID_EVTCHN(evtchn))
  605. set_evtchn(evtchn);
  606. }
  607. bool xen_test_irq_pending(int irq)
  608. {
  609. int evtchn = evtchn_from_irq(irq);
  610. bool ret = false;
  611. if (VALID_EVTCHN(evtchn))
  612. ret = test_evtchn(evtchn);
  613. return ret;
  614. }
  615. /* Poll waiting for an irq to become pending. In the usual case, the
  616. irq will be disabled so it won't deliver an interrupt. */
  617. void xen_poll_irq(int irq)
  618. {
  619. evtchn_port_t evtchn = evtchn_from_irq(irq);
  620. if (VALID_EVTCHN(evtchn)) {
  621. struct sched_poll poll;
  622. poll.nr_ports = 1;
  623. poll.timeout = 0;
  624. set_xen_guest_handle(poll.ports, &evtchn);
  625. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  626. BUG();
  627. }
  628. }
  629. void xen_irq_resume(void)
  630. {
  631. unsigned int cpu, irq, evtchn;
  632. init_evtchn_cpu_bindings();
  633. /* New event-channel space is not 'live' yet. */
  634. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  635. mask_evtchn(evtchn);
  636. /* No IRQ <-> event-channel mappings. */
  637. for (irq = 0; irq < nr_irqs; irq++)
  638. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  639. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  640. evtchn_to_irq[evtchn] = -1;
  641. for_each_possible_cpu(cpu) {
  642. restore_cpu_virqs(cpu);
  643. restore_cpu_ipis(cpu);
  644. }
  645. }
  646. static struct irq_chip xen_dynamic_chip __read_mostly = {
  647. .name = "xen-dyn",
  648. .mask = disable_dynirq,
  649. .unmask = enable_dynirq,
  650. .ack = ack_dynirq,
  651. .set_affinity = set_affinity_irq,
  652. .retrigger = retrigger_dynirq,
  653. };
  654. void __init xen_init_IRQ(void)
  655. {
  656. int i;
  657. size_t size = nr_cpu_ids * sizeof(struct cpu_evtchn_s);
  658. cpu_evtchn_mask_p = alloc_bootmem(size);
  659. BUG_ON(cpu_evtchn_mask_p == NULL);
  660. init_evtchn_cpu_bindings();
  661. /* No event channels are 'live' right now. */
  662. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  663. mask_evtchn(i);
  664. /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
  665. for (i = 0; i < nr_irqs; i++)
  666. irq_bindcount[i] = 0;
  667. irq_ctx_init(smp_processor_id());
  668. }