patch_hdmi.c 76 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
  45. struct hdmi_spec_per_cvt {
  46. hda_nid_t cvt_nid;
  47. int assigned;
  48. unsigned int channels_min;
  49. unsigned int channels_max;
  50. u32 rates;
  51. u64 formats;
  52. unsigned int maxbps;
  53. };
  54. /* max. connections to a widget */
  55. #define HDA_MAX_CONNECTIONS 32
  56. struct hdmi_spec_per_pin {
  57. hda_nid_t pin_nid;
  58. int num_mux_nids;
  59. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  60. struct hda_codec *codec;
  61. struct hdmi_eld sink_eld;
  62. struct delayed_work work;
  63. struct snd_kcontrol *eld_ctl;
  64. int repoll_count;
  65. bool setup; /* the stream has been set up by prepare callback */
  66. int channels; /* current number of channels */
  67. bool non_pcm;
  68. bool chmap_set; /* channel-map override by ALSA API? */
  69. unsigned char chmap[8]; /* ALSA API channel-map */
  70. char pcm_name[8]; /* filled in build_pcm callbacks */
  71. };
  72. struct hdmi_spec {
  73. int num_cvts;
  74. struct snd_array cvts; /* struct hdmi_spec_per_cvt */
  75. hda_nid_t cvt_nids[4]; /* only for haswell fix */
  76. int num_pins;
  77. struct snd_array pins; /* struct hdmi_spec_per_pin */
  78. struct snd_array pcm_rec; /* struct hda_pcm */
  79. unsigned int channels_max; /* max over all cvts */
  80. struct hdmi_eld temp_eld;
  81. /*
  82. * Non-generic ATI/NVIDIA specific
  83. */
  84. struct hda_multi_out multiout;
  85. struct hda_pcm_stream pcm_playback;
  86. };
  87. struct hdmi_audio_infoframe {
  88. u8 type; /* 0x84 */
  89. u8 ver; /* 0x01 */
  90. u8 len; /* 0x0a */
  91. u8 checksum;
  92. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  93. u8 SS01_SF24;
  94. u8 CXT04;
  95. u8 CA;
  96. u8 LFEPBL01_LSV36_DM_INH7;
  97. };
  98. struct dp_audio_infoframe {
  99. u8 type; /* 0x84 */
  100. u8 len; /* 0x1b */
  101. u8 ver; /* 0x11 << 2 */
  102. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  103. u8 SS01_SF24;
  104. u8 CXT04;
  105. u8 CA;
  106. u8 LFEPBL01_LSV36_DM_INH7;
  107. };
  108. union audio_infoframe {
  109. struct hdmi_audio_infoframe hdmi;
  110. struct dp_audio_infoframe dp;
  111. u8 bytes[0];
  112. };
  113. /*
  114. * CEA speaker placement:
  115. *
  116. * FLH FCH FRH
  117. * FLW FL FLC FC FRC FR FRW
  118. *
  119. * LFE
  120. * TC
  121. *
  122. * RL RLC RC RRC RR
  123. *
  124. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  125. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  126. */
  127. enum cea_speaker_placement {
  128. FL = (1 << 0), /* Front Left */
  129. FC = (1 << 1), /* Front Center */
  130. FR = (1 << 2), /* Front Right */
  131. FLC = (1 << 3), /* Front Left Center */
  132. FRC = (1 << 4), /* Front Right Center */
  133. RL = (1 << 5), /* Rear Left */
  134. RC = (1 << 6), /* Rear Center */
  135. RR = (1 << 7), /* Rear Right */
  136. RLC = (1 << 8), /* Rear Left Center */
  137. RRC = (1 << 9), /* Rear Right Center */
  138. LFE = (1 << 10), /* Low Frequency Effect */
  139. FLW = (1 << 11), /* Front Left Wide */
  140. FRW = (1 << 12), /* Front Right Wide */
  141. FLH = (1 << 13), /* Front Left High */
  142. FCH = (1 << 14), /* Front Center High */
  143. FRH = (1 << 15), /* Front Right High */
  144. TC = (1 << 16), /* Top Center */
  145. };
  146. /*
  147. * ELD SA bits in the CEA Speaker Allocation data block
  148. */
  149. static int eld_speaker_allocation_bits[] = {
  150. [0] = FL | FR,
  151. [1] = LFE,
  152. [2] = FC,
  153. [3] = RL | RR,
  154. [4] = RC,
  155. [5] = FLC | FRC,
  156. [6] = RLC | RRC,
  157. /* the following are not defined in ELD yet */
  158. [7] = FLW | FRW,
  159. [8] = FLH | FRH,
  160. [9] = TC,
  161. [10] = FCH,
  162. };
  163. struct cea_channel_speaker_allocation {
  164. int ca_index;
  165. int speakers[8];
  166. /* derived values, just for convenience */
  167. int channels;
  168. int spk_mask;
  169. };
  170. /*
  171. * ALSA sequence is:
  172. *
  173. * surround40 surround41 surround50 surround51 surround71
  174. * ch0 front left = = = =
  175. * ch1 front right = = = =
  176. * ch2 rear left = = = =
  177. * ch3 rear right = = = =
  178. * ch4 LFE center center center
  179. * ch5 LFE LFE
  180. * ch6 side left
  181. * ch7 side right
  182. *
  183. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  184. */
  185. static int hdmi_channel_mapping[0x32][8] = {
  186. /* stereo */
  187. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  188. /* 2.1 */
  189. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  190. /* Dolby Surround */
  191. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  192. /* surround40 */
  193. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  194. /* 4ch */
  195. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  196. /* surround41 */
  197. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  198. /* surround50 */
  199. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  200. /* surround51 */
  201. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  202. /* 7.1 */
  203. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  204. };
  205. /*
  206. * This is an ordered list!
  207. *
  208. * The preceding ones have better chances to be selected by
  209. * hdmi_channel_allocation().
  210. */
  211. static struct cea_channel_speaker_allocation channel_allocations[] = {
  212. /* channel: 7 6 5 4 3 2 1 0 */
  213. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  214. /* 2.1 */
  215. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  216. /* Dolby Surround */
  217. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  218. /* surround40 */
  219. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  220. /* surround41 */
  221. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  222. /* surround50 */
  223. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  224. /* surround51 */
  225. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  226. /* 6.1 */
  227. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  228. /* surround71 */
  229. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  230. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  231. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  232. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  233. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  234. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  235. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  236. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  237. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  238. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  239. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  240. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  241. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  242. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  243. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  244. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  245. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  246. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  247. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  248. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  249. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  250. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  251. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  252. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  253. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  254. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  255. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  256. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  257. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  258. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  259. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  260. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  261. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  262. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  263. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  264. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  265. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  266. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  267. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  268. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  269. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  270. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  271. };
  272. /*
  273. * HDMI routines
  274. */
  275. #define get_pin(spec, idx) \
  276. ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
  277. #define get_cvt(spec, idx) \
  278. ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
  279. #define get_pcm_rec(spec, idx) \
  280. ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
  281. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  282. {
  283. int pin_idx;
  284. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  285. if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
  286. return pin_idx;
  287. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  288. return -EINVAL;
  289. }
  290. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  291. struct hda_pcm_stream *hinfo)
  292. {
  293. int pin_idx;
  294. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  295. if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
  296. return pin_idx;
  297. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  298. return -EINVAL;
  299. }
  300. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  301. {
  302. int cvt_idx;
  303. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  304. if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
  305. return cvt_idx;
  306. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  307. return -EINVAL;
  308. }
  309. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  310. struct snd_ctl_elem_info *uinfo)
  311. {
  312. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  313. struct hdmi_spec *spec = codec->spec;
  314. struct hdmi_eld *eld;
  315. int pin_idx;
  316. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  317. pin_idx = kcontrol->private_value;
  318. eld = &get_pin(spec, pin_idx)->sink_eld;
  319. mutex_lock(&eld->lock);
  320. uinfo->count = eld->eld_valid ? eld->eld_size : 0;
  321. mutex_unlock(&eld->lock);
  322. return 0;
  323. }
  324. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  325. struct snd_ctl_elem_value *ucontrol)
  326. {
  327. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  328. struct hdmi_spec *spec = codec->spec;
  329. struct hdmi_eld *eld;
  330. int pin_idx;
  331. pin_idx = kcontrol->private_value;
  332. eld = &get_pin(spec, pin_idx)->sink_eld;
  333. mutex_lock(&eld->lock);
  334. if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
  335. mutex_unlock(&eld->lock);
  336. snd_BUG();
  337. return -EINVAL;
  338. }
  339. memset(ucontrol->value.bytes.data, 0,
  340. ARRAY_SIZE(ucontrol->value.bytes.data));
  341. if (eld->eld_valid)
  342. memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
  343. eld->eld_size);
  344. mutex_unlock(&eld->lock);
  345. return 0;
  346. }
  347. static struct snd_kcontrol_new eld_bytes_ctl = {
  348. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  349. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  350. .name = "ELD",
  351. .info = hdmi_eld_ctl_info,
  352. .get = hdmi_eld_ctl_get,
  353. };
  354. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  355. int device)
  356. {
  357. struct snd_kcontrol *kctl;
  358. struct hdmi_spec *spec = codec->spec;
  359. int err;
  360. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  361. if (!kctl)
  362. return -ENOMEM;
  363. kctl->private_value = pin_idx;
  364. kctl->id.device = device;
  365. err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
  366. if (err < 0)
  367. return err;
  368. get_pin(spec, pin_idx)->eld_ctl = kctl;
  369. return 0;
  370. }
  371. #ifdef BE_PARANOID
  372. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  373. int *packet_index, int *byte_index)
  374. {
  375. int val;
  376. val = snd_hda_codec_read(codec, pin_nid, 0,
  377. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  378. *packet_index = val >> 5;
  379. *byte_index = val & 0x1f;
  380. }
  381. #endif
  382. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  383. int packet_index, int byte_index)
  384. {
  385. int val;
  386. val = (packet_index << 5) | (byte_index & 0x1f);
  387. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  388. }
  389. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  390. unsigned char val)
  391. {
  392. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  393. }
  394. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  395. {
  396. /* Unmute */
  397. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  398. snd_hda_codec_write(codec, pin_nid, 0,
  399. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  400. /* Enable pin out: some machines with GM965 gets broken output when
  401. * the pin is disabled or changed while using with HDMI
  402. */
  403. snd_hda_codec_write(codec, pin_nid, 0,
  404. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  405. }
  406. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  407. {
  408. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  409. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  410. }
  411. static void hdmi_set_channel_count(struct hda_codec *codec,
  412. hda_nid_t cvt_nid, int chs)
  413. {
  414. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  415. snd_hda_codec_write(codec, cvt_nid, 0,
  416. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  417. }
  418. /*
  419. * Channel mapping routines
  420. */
  421. /*
  422. * Compute derived values in channel_allocations[].
  423. */
  424. static void init_channel_allocations(void)
  425. {
  426. int i, j;
  427. struct cea_channel_speaker_allocation *p;
  428. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  429. p = channel_allocations + i;
  430. p->channels = 0;
  431. p->spk_mask = 0;
  432. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  433. if (p->speakers[j]) {
  434. p->channels++;
  435. p->spk_mask |= p->speakers[j];
  436. }
  437. }
  438. }
  439. static int get_channel_allocation_order(int ca)
  440. {
  441. int i;
  442. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  443. if (channel_allocations[i].ca_index == ca)
  444. break;
  445. }
  446. return i;
  447. }
  448. /*
  449. * The transformation takes two steps:
  450. *
  451. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  452. * spk_mask => (channel_allocations[]) => ai->CA
  453. *
  454. * TODO: it could select the wrong CA from multiple candidates.
  455. */
  456. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  457. {
  458. int i;
  459. int ca = 0;
  460. int spk_mask = 0;
  461. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  462. /*
  463. * CA defaults to 0 for basic stereo audio
  464. */
  465. if (channels <= 2)
  466. return 0;
  467. /*
  468. * expand ELD's speaker allocation mask
  469. *
  470. * ELD tells the speaker mask in a compact(paired) form,
  471. * expand ELD's notions to match the ones used by Audio InfoFrame.
  472. */
  473. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  474. if (eld->info.spk_alloc & (1 << i))
  475. spk_mask |= eld_speaker_allocation_bits[i];
  476. }
  477. /* search for the first working match in the CA table */
  478. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  479. if (channels == channel_allocations[i].channels &&
  480. (spk_mask & channel_allocations[i].spk_mask) ==
  481. channel_allocations[i].spk_mask) {
  482. ca = channel_allocations[i].ca_index;
  483. break;
  484. }
  485. }
  486. if (!ca) {
  487. /* if there was no match, select the regular ALSA channel
  488. * allocation with the matching number of channels */
  489. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  490. if (channels == channel_allocations[i].channels) {
  491. ca = channel_allocations[i].ca_index;
  492. break;
  493. }
  494. }
  495. }
  496. snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
  497. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  498. ca, channels, buf);
  499. return ca;
  500. }
  501. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  502. hda_nid_t pin_nid)
  503. {
  504. #ifdef CONFIG_SND_DEBUG_VERBOSE
  505. int i;
  506. int slot;
  507. for (i = 0; i < 8; i++) {
  508. slot = snd_hda_codec_read(codec, pin_nid, 0,
  509. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  510. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  511. slot >> 4, slot & 0xf);
  512. }
  513. #endif
  514. }
  515. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  516. hda_nid_t pin_nid,
  517. bool non_pcm,
  518. int ca)
  519. {
  520. int i;
  521. int err;
  522. int order;
  523. int non_pcm_mapping[8];
  524. order = get_channel_allocation_order(ca);
  525. if (hdmi_channel_mapping[ca][1] == 0) {
  526. for (i = 0; i < channel_allocations[order].channels; i++)
  527. hdmi_channel_mapping[ca][i] = i | (i << 4);
  528. for (; i < 8; i++)
  529. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  530. }
  531. if (non_pcm) {
  532. for (i = 0; i < channel_allocations[order].channels; i++)
  533. non_pcm_mapping[i] = i | (i << 4);
  534. for (; i < 8; i++)
  535. non_pcm_mapping[i] = 0xf | (i << 4);
  536. }
  537. for (i = 0; i < 8; i++) {
  538. err = snd_hda_codec_write(codec, pin_nid, 0,
  539. AC_VERB_SET_HDMI_CHAN_SLOT,
  540. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  541. if (err) {
  542. snd_printdd(KERN_NOTICE
  543. "HDMI: channel mapping failed\n");
  544. break;
  545. }
  546. }
  547. hdmi_debug_channel_mapping(codec, pin_nid);
  548. }
  549. struct channel_map_table {
  550. unsigned char map; /* ALSA API channel map position */
  551. unsigned char cea_slot; /* CEA slot value */
  552. int spk_mask; /* speaker position bit mask */
  553. };
  554. static struct channel_map_table map_tables[] = {
  555. { SNDRV_CHMAP_FL, 0x00, FL },
  556. { SNDRV_CHMAP_FR, 0x01, FR },
  557. { SNDRV_CHMAP_RL, 0x04, RL },
  558. { SNDRV_CHMAP_RR, 0x05, RR },
  559. { SNDRV_CHMAP_LFE, 0x02, LFE },
  560. { SNDRV_CHMAP_FC, 0x03, FC },
  561. { SNDRV_CHMAP_RLC, 0x06, RLC },
  562. { SNDRV_CHMAP_RRC, 0x07, RRC },
  563. {} /* terminator */
  564. };
  565. /* from ALSA API channel position to speaker bit mask */
  566. static int to_spk_mask(unsigned char c)
  567. {
  568. struct channel_map_table *t = map_tables;
  569. for (; t->map; t++) {
  570. if (t->map == c)
  571. return t->spk_mask;
  572. }
  573. return 0;
  574. }
  575. /* from ALSA API channel position to CEA slot */
  576. static int to_cea_slot(unsigned char c)
  577. {
  578. struct channel_map_table *t = map_tables;
  579. for (; t->map; t++) {
  580. if (t->map == c)
  581. return t->cea_slot;
  582. }
  583. return 0x0f;
  584. }
  585. /* from CEA slot to ALSA API channel position */
  586. static int from_cea_slot(unsigned char c)
  587. {
  588. struct channel_map_table *t = map_tables;
  589. for (; t->map; t++) {
  590. if (t->cea_slot == c)
  591. return t->map;
  592. }
  593. return 0;
  594. }
  595. /* from speaker bit mask to ALSA API channel position */
  596. static int spk_to_chmap(int spk)
  597. {
  598. struct channel_map_table *t = map_tables;
  599. for (; t->map; t++) {
  600. if (t->spk_mask == spk)
  601. return t->map;
  602. }
  603. return 0;
  604. }
  605. /* get the CA index corresponding to the given ALSA API channel map */
  606. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  607. {
  608. int i, spks = 0, spk_mask = 0;
  609. for (i = 0; i < chs; i++) {
  610. int mask = to_spk_mask(map[i]);
  611. if (mask) {
  612. spk_mask |= mask;
  613. spks++;
  614. }
  615. }
  616. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  617. if ((chs == channel_allocations[i].channels ||
  618. spks == channel_allocations[i].channels) &&
  619. (spk_mask & channel_allocations[i].spk_mask) ==
  620. channel_allocations[i].spk_mask)
  621. return channel_allocations[i].ca_index;
  622. }
  623. return -1;
  624. }
  625. /* set up the channel slots for the given ALSA API channel map */
  626. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  627. hda_nid_t pin_nid,
  628. int chs, unsigned char *map)
  629. {
  630. int i;
  631. for (i = 0; i < 8; i++) {
  632. int val, err;
  633. if (i < chs)
  634. val = to_cea_slot(map[i]);
  635. else
  636. val = 0xf;
  637. val |= (i << 4);
  638. err = snd_hda_codec_write(codec, pin_nid, 0,
  639. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  640. if (err)
  641. return -EINVAL;
  642. }
  643. return 0;
  644. }
  645. /* store ALSA API channel map from the current default map */
  646. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  647. {
  648. int i;
  649. for (i = 0; i < 8; i++) {
  650. if (i < channel_allocations[ca].channels)
  651. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  652. else
  653. map[i] = 0;
  654. }
  655. }
  656. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  657. hda_nid_t pin_nid, bool non_pcm, int ca,
  658. int channels, unsigned char *map,
  659. bool chmap_set)
  660. {
  661. if (!non_pcm && chmap_set) {
  662. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  663. channels, map);
  664. } else {
  665. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  666. hdmi_setup_fake_chmap(map, ca);
  667. }
  668. }
  669. /*
  670. * Audio InfoFrame routines
  671. */
  672. /*
  673. * Enable Audio InfoFrame Transmission
  674. */
  675. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  676. hda_nid_t pin_nid)
  677. {
  678. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  679. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  680. AC_DIPXMIT_BEST);
  681. }
  682. /*
  683. * Disable Audio InfoFrame Transmission
  684. */
  685. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  686. hda_nid_t pin_nid)
  687. {
  688. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  689. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  690. AC_DIPXMIT_DISABLE);
  691. }
  692. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  693. {
  694. #ifdef CONFIG_SND_DEBUG_VERBOSE
  695. int i;
  696. int size;
  697. size = snd_hdmi_get_eld_size(codec, pin_nid);
  698. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  699. for (i = 0; i < 8; i++) {
  700. size = snd_hda_codec_read(codec, pin_nid, 0,
  701. AC_VERB_GET_HDMI_DIP_SIZE, i);
  702. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  703. }
  704. #endif
  705. }
  706. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  707. {
  708. #ifdef BE_PARANOID
  709. int i, j;
  710. int size;
  711. int pi, bi;
  712. for (i = 0; i < 8; i++) {
  713. size = snd_hda_codec_read(codec, pin_nid, 0,
  714. AC_VERB_GET_HDMI_DIP_SIZE, i);
  715. if (size == 0)
  716. continue;
  717. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  718. for (j = 1; j < 1000; j++) {
  719. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  720. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  721. if (pi != i)
  722. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  723. bi, pi, i);
  724. if (bi == 0) /* byte index wrapped around */
  725. break;
  726. }
  727. snd_printd(KERN_INFO
  728. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  729. i, size, j);
  730. }
  731. #endif
  732. }
  733. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  734. {
  735. u8 *bytes = (u8 *)hdmi_ai;
  736. u8 sum = 0;
  737. int i;
  738. hdmi_ai->checksum = 0;
  739. for (i = 0; i < sizeof(*hdmi_ai); i++)
  740. sum += bytes[i];
  741. hdmi_ai->checksum = -sum;
  742. }
  743. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  744. hda_nid_t pin_nid,
  745. u8 *dip, int size)
  746. {
  747. int i;
  748. hdmi_debug_dip_size(codec, pin_nid);
  749. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  750. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  751. for (i = 0; i < size; i++)
  752. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  753. }
  754. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  755. u8 *dip, int size)
  756. {
  757. u8 val;
  758. int i;
  759. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  760. != AC_DIPXMIT_BEST)
  761. return false;
  762. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  763. for (i = 0; i < size; i++) {
  764. val = snd_hda_codec_read(codec, pin_nid, 0,
  765. AC_VERB_GET_HDMI_DIP_DATA, 0);
  766. if (val != dip[i])
  767. return false;
  768. }
  769. return true;
  770. }
  771. static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
  772. struct hdmi_spec_per_pin *per_pin,
  773. bool non_pcm)
  774. {
  775. hda_nid_t pin_nid = per_pin->pin_nid;
  776. int channels = per_pin->channels;
  777. struct hdmi_eld *eld;
  778. int ca;
  779. union audio_infoframe ai;
  780. if (!channels)
  781. return;
  782. if (is_haswell(codec))
  783. snd_hda_codec_write(codec, pin_nid, 0,
  784. AC_VERB_SET_AMP_GAIN_MUTE,
  785. AMP_OUT_UNMUTE);
  786. eld = &per_pin->sink_eld;
  787. if (!eld->monitor_present)
  788. return;
  789. if (!non_pcm && per_pin->chmap_set)
  790. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  791. else
  792. ca = hdmi_channel_allocation(eld, channels);
  793. if (ca < 0)
  794. ca = 0;
  795. memset(&ai, 0, sizeof(ai));
  796. if (eld->info.conn_type == 0) { /* HDMI */
  797. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  798. hdmi_ai->type = 0x84;
  799. hdmi_ai->ver = 0x01;
  800. hdmi_ai->len = 0x0a;
  801. hdmi_ai->CC02_CT47 = channels - 1;
  802. hdmi_ai->CA = ca;
  803. hdmi_checksum_audio_infoframe(hdmi_ai);
  804. } else if (eld->info.conn_type == 1) { /* DisplayPort */
  805. struct dp_audio_infoframe *dp_ai = &ai.dp;
  806. dp_ai->type = 0x84;
  807. dp_ai->len = 0x1b;
  808. dp_ai->ver = 0x11 << 2;
  809. dp_ai->CC02_CT47 = channels - 1;
  810. dp_ai->CA = ca;
  811. } else {
  812. snd_printd("HDMI: unknown connection type at pin %d\n",
  813. pin_nid);
  814. return;
  815. }
  816. /*
  817. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  818. * sizeof(*dp_ai) to avoid partial match/update problems when
  819. * the user switches between HDMI/DP monitors.
  820. */
  821. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  822. sizeof(ai))) {
  823. snd_printdd("hdmi_setup_audio_infoframe: "
  824. "pin=%d channels=%d\n",
  825. pin_nid,
  826. channels);
  827. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  828. channels, per_pin->chmap,
  829. per_pin->chmap_set);
  830. hdmi_stop_infoframe_trans(codec, pin_nid);
  831. hdmi_fill_audio_infoframe(codec, pin_nid,
  832. ai.bytes, sizeof(ai));
  833. hdmi_start_infoframe_trans(codec, pin_nid);
  834. } else {
  835. /* For non-pcm audio switch, setup new channel mapping
  836. * accordingly */
  837. if (per_pin->non_pcm != non_pcm)
  838. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  839. channels, per_pin->chmap,
  840. per_pin->chmap_set);
  841. }
  842. per_pin->non_pcm = non_pcm;
  843. }
  844. /*
  845. * Unsolicited events
  846. */
  847. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  848. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  849. {
  850. struct hdmi_spec *spec = codec->spec;
  851. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  852. int pin_nid;
  853. int pin_idx;
  854. struct hda_jack_tbl *jack;
  855. int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
  856. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  857. if (!jack)
  858. return;
  859. pin_nid = jack->nid;
  860. jack->jack_dirty = 1;
  861. _snd_printd(SND_PR_VERBOSE,
  862. "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
  863. codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
  864. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  865. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  866. if (pin_idx < 0)
  867. return;
  868. hdmi_present_sense(get_pin(spec, pin_idx), 1);
  869. snd_hda_jack_report_sync(codec);
  870. }
  871. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  872. {
  873. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  874. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  875. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  876. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  877. printk(KERN_INFO
  878. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  879. codec->addr,
  880. tag,
  881. subtag,
  882. cp_state,
  883. cp_ready);
  884. /* TODO */
  885. if (cp_state)
  886. ;
  887. if (cp_ready)
  888. ;
  889. }
  890. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  891. {
  892. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  893. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  894. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  895. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  896. return;
  897. }
  898. if (subtag == 0)
  899. hdmi_intrinsic_event(codec, res);
  900. else
  901. hdmi_non_intrinsic_event(codec, res);
  902. }
  903. static void haswell_verify_D0(struct hda_codec *codec,
  904. hda_nid_t cvt_nid, hda_nid_t nid)
  905. {
  906. int pwr;
  907. /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
  908. * thus pins could only choose converter 0 for use. Make sure the
  909. * converters are in correct power state */
  910. if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
  911. snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  912. if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
  913. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
  914. AC_PWRST_D0);
  915. msleep(40);
  916. pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
  917. pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
  918. snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
  919. }
  920. }
  921. /*
  922. * Callbacks
  923. */
  924. /* HBR should be Non-PCM, 8 channels */
  925. #define is_hbr_format(format) \
  926. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  927. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  928. hda_nid_t pin_nid, u32 stream_tag, int format)
  929. {
  930. int pinctl;
  931. int new_pinctl = 0;
  932. if (is_haswell(codec))
  933. haswell_verify_D0(codec, cvt_nid, pin_nid);
  934. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  935. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  936. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  937. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  938. if (is_hbr_format(format))
  939. new_pinctl |= AC_PINCTL_EPT_HBR;
  940. else
  941. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  942. snd_printdd("hdmi_setup_stream: "
  943. "NID=0x%x, %spinctl=0x%x\n",
  944. pin_nid,
  945. pinctl == new_pinctl ? "" : "new-",
  946. new_pinctl);
  947. if (pinctl != new_pinctl)
  948. snd_hda_codec_write(codec, pin_nid, 0,
  949. AC_VERB_SET_PIN_WIDGET_CONTROL,
  950. new_pinctl);
  951. }
  952. if (is_hbr_format(format) && !new_pinctl) {
  953. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  954. return -EINVAL;
  955. }
  956. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  957. return 0;
  958. }
  959. static int hdmi_choose_cvt(struct hda_codec *codec,
  960. int pin_idx, int *cvt_id, int *mux_id)
  961. {
  962. struct hdmi_spec *spec = codec->spec;
  963. struct hdmi_spec_per_pin *per_pin;
  964. struct hdmi_spec_per_cvt *per_cvt = NULL;
  965. int cvt_idx, mux_idx = 0;
  966. per_pin = get_pin(spec, pin_idx);
  967. /* Dynamically assign converter to stream */
  968. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  969. per_cvt = get_cvt(spec, cvt_idx);
  970. /* Must not already be assigned */
  971. if (per_cvt->assigned)
  972. continue;
  973. /* Must be in pin's mux's list of converters */
  974. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  975. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  976. break;
  977. /* Not in mux list */
  978. if (mux_idx == per_pin->num_mux_nids)
  979. continue;
  980. break;
  981. }
  982. /* No free converters */
  983. if (cvt_idx == spec->num_cvts)
  984. return -ENODEV;
  985. if (cvt_id)
  986. *cvt_id = cvt_idx;
  987. if (mux_id)
  988. *mux_id = mux_idx;
  989. return 0;
  990. }
  991. static void haswell_config_cvts(struct hda_codec *codec,
  992. hda_nid_t pin_nid, int mux_idx)
  993. {
  994. struct hdmi_spec *spec = codec->spec;
  995. hda_nid_t nid, end_nid;
  996. int cvt_idx, curr;
  997. struct hdmi_spec_per_cvt *per_cvt;
  998. /* configure all pins, including "no physical connection" ones */
  999. end_nid = codec->start_nid + codec->num_nodes;
  1000. for (nid = codec->start_nid; nid < end_nid; nid++) {
  1001. unsigned int wid_caps = get_wcaps(codec, nid);
  1002. unsigned int wid_type = get_wcaps_type(wid_caps);
  1003. if (wid_type != AC_WID_PIN)
  1004. continue;
  1005. if (nid == pin_nid)
  1006. continue;
  1007. curr = snd_hda_codec_read(codec, nid, 0,
  1008. AC_VERB_GET_CONNECT_SEL, 0);
  1009. if (curr != mux_idx)
  1010. continue;
  1011. /* choose an unassigned converter. The conveters in the
  1012. * connection list are in the same order as in the codec.
  1013. */
  1014. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  1015. per_cvt = get_cvt(spec, cvt_idx);
  1016. if (!per_cvt->assigned) {
  1017. snd_printdd("choose cvt %d for pin nid %d\n",
  1018. cvt_idx, nid);
  1019. snd_hda_codec_write_cache(codec, nid, 0,
  1020. AC_VERB_SET_CONNECT_SEL,
  1021. cvt_idx);
  1022. break;
  1023. }
  1024. }
  1025. }
  1026. }
  1027. /*
  1028. * HDA PCM callbacks
  1029. */
  1030. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  1031. struct hda_codec *codec,
  1032. struct snd_pcm_substream *substream)
  1033. {
  1034. struct hdmi_spec *spec = codec->spec;
  1035. struct snd_pcm_runtime *runtime = substream->runtime;
  1036. int pin_idx, cvt_idx, mux_idx = 0;
  1037. struct hdmi_spec_per_pin *per_pin;
  1038. struct hdmi_eld *eld;
  1039. struct hdmi_spec_per_cvt *per_cvt = NULL;
  1040. int err;
  1041. /* Validate hinfo */
  1042. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1043. if (snd_BUG_ON(pin_idx < 0))
  1044. return -EINVAL;
  1045. per_pin = get_pin(spec, pin_idx);
  1046. eld = &per_pin->sink_eld;
  1047. err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
  1048. if (err < 0)
  1049. return err;
  1050. per_cvt = get_cvt(spec, cvt_idx);
  1051. /* Claim converter */
  1052. per_cvt->assigned = 1;
  1053. hinfo->nid = per_cvt->cvt_nid;
  1054. snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
  1055. AC_VERB_SET_CONNECT_SEL,
  1056. mux_idx);
  1057. /* configure unused pins to choose other converters */
  1058. if (is_haswell(codec))
  1059. haswell_config_cvts(codec, per_pin->pin_nid, mux_idx);
  1060. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  1061. /* Initially set the converter's capabilities */
  1062. hinfo->channels_min = per_cvt->channels_min;
  1063. hinfo->channels_max = per_cvt->channels_max;
  1064. hinfo->rates = per_cvt->rates;
  1065. hinfo->formats = per_cvt->formats;
  1066. hinfo->maxbps = per_cvt->maxbps;
  1067. /* Restrict capabilities by ELD if this isn't disabled */
  1068. if (!static_hdmi_pcm && eld->eld_valid) {
  1069. snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
  1070. if (hinfo->channels_min > hinfo->channels_max ||
  1071. !hinfo->rates || !hinfo->formats) {
  1072. per_cvt->assigned = 0;
  1073. hinfo->nid = 0;
  1074. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1075. return -ENODEV;
  1076. }
  1077. }
  1078. /* Store the updated parameters */
  1079. runtime->hw.channels_min = hinfo->channels_min;
  1080. runtime->hw.channels_max = hinfo->channels_max;
  1081. runtime->hw.formats = hinfo->formats;
  1082. runtime->hw.rates = hinfo->rates;
  1083. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1084. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1085. return 0;
  1086. }
  1087. /*
  1088. * HDA/HDMI auto parsing
  1089. */
  1090. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  1091. {
  1092. struct hdmi_spec *spec = codec->spec;
  1093. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1094. hda_nid_t pin_nid = per_pin->pin_nid;
  1095. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  1096. snd_printk(KERN_WARNING
  1097. "HDMI: pin %d wcaps %#x "
  1098. "does not support connection list\n",
  1099. pin_nid, get_wcaps(codec, pin_nid));
  1100. return -EINVAL;
  1101. }
  1102. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  1103. per_pin->mux_nids,
  1104. HDA_MAX_CONNECTIONS);
  1105. return 0;
  1106. }
  1107. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  1108. {
  1109. struct hda_codec *codec = per_pin->codec;
  1110. struct hdmi_spec *spec = codec->spec;
  1111. struct hdmi_eld *eld = &spec->temp_eld;
  1112. struct hdmi_eld *pin_eld = &per_pin->sink_eld;
  1113. hda_nid_t pin_nid = per_pin->pin_nid;
  1114. /*
  1115. * Always execute a GetPinSense verb here, even when called from
  1116. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  1117. * response's PD bit is not the real PD value, but indicates that
  1118. * the real PD value changed. An older version of the HD-audio
  1119. * specification worked this way. Hence, we just ignore the data in
  1120. * the unsolicited response to avoid custom WARs.
  1121. */
  1122. int present = snd_hda_pin_sense(codec, pin_nid);
  1123. bool update_eld = false;
  1124. bool eld_changed = false;
  1125. pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1126. if (pin_eld->monitor_present)
  1127. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  1128. else
  1129. eld->eld_valid = false;
  1130. _snd_printd(SND_PR_VERBOSE,
  1131. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1132. codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
  1133. if (eld->eld_valid) {
  1134. if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
  1135. &eld->eld_size) < 0)
  1136. eld->eld_valid = false;
  1137. else {
  1138. memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
  1139. if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
  1140. eld->eld_size) < 0)
  1141. eld->eld_valid = false;
  1142. }
  1143. if (eld->eld_valid) {
  1144. snd_hdmi_show_eld(&eld->info);
  1145. update_eld = true;
  1146. }
  1147. else if (repoll) {
  1148. queue_delayed_work(codec->bus->workq,
  1149. &per_pin->work,
  1150. msecs_to_jiffies(300));
  1151. return;
  1152. }
  1153. }
  1154. mutex_lock(&pin_eld->lock);
  1155. if (pin_eld->eld_valid && !eld->eld_valid) {
  1156. update_eld = true;
  1157. eld_changed = true;
  1158. }
  1159. if (update_eld) {
  1160. bool old_eld_valid = pin_eld->eld_valid;
  1161. pin_eld->eld_valid = eld->eld_valid;
  1162. eld_changed = pin_eld->eld_size != eld->eld_size ||
  1163. memcmp(pin_eld->eld_buffer, eld->eld_buffer,
  1164. eld->eld_size) != 0;
  1165. if (eld_changed)
  1166. memcpy(pin_eld->eld_buffer, eld->eld_buffer,
  1167. eld->eld_size);
  1168. pin_eld->eld_size = eld->eld_size;
  1169. pin_eld->info = eld->info;
  1170. /* Haswell-specific workaround: re-setup when the transcoder is
  1171. * changed during the stream playback
  1172. */
  1173. if (is_haswell(codec) &&
  1174. eld->eld_valid && !old_eld_valid && per_pin->setup)
  1175. hdmi_setup_audio_infoframe(codec, per_pin,
  1176. per_pin->non_pcm);
  1177. }
  1178. mutex_unlock(&pin_eld->lock);
  1179. if (eld_changed)
  1180. snd_ctl_notify(codec->bus->card,
  1181. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  1182. &per_pin->eld_ctl->id);
  1183. }
  1184. static void hdmi_repoll_eld(struct work_struct *work)
  1185. {
  1186. struct hdmi_spec_per_pin *per_pin =
  1187. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1188. if (per_pin->repoll_count++ > 6)
  1189. per_pin->repoll_count = 0;
  1190. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1191. }
  1192. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1193. hda_nid_t nid);
  1194. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1195. {
  1196. struct hdmi_spec *spec = codec->spec;
  1197. unsigned int caps, config;
  1198. int pin_idx;
  1199. struct hdmi_spec_per_pin *per_pin;
  1200. int err;
  1201. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1202. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1203. return 0;
  1204. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1205. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1206. return 0;
  1207. if (is_haswell(codec))
  1208. intel_haswell_fixup_connect_list(codec, pin_nid);
  1209. pin_idx = spec->num_pins;
  1210. per_pin = snd_array_new(&spec->pins);
  1211. if (!per_pin)
  1212. return -ENOMEM;
  1213. per_pin->pin_nid = pin_nid;
  1214. per_pin->non_pcm = false;
  1215. err = hdmi_read_pin_conn(codec, pin_idx);
  1216. if (err < 0)
  1217. return err;
  1218. spec->num_pins++;
  1219. return 0;
  1220. }
  1221. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1222. {
  1223. struct hdmi_spec *spec = codec->spec;
  1224. struct hdmi_spec_per_cvt *per_cvt;
  1225. unsigned int chans;
  1226. int err;
  1227. chans = get_wcaps(codec, cvt_nid);
  1228. chans = get_wcaps_channels(chans);
  1229. per_cvt = snd_array_new(&spec->cvts);
  1230. if (!per_cvt)
  1231. return -ENOMEM;
  1232. per_cvt->cvt_nid = cvt_nid;
  1233. per_cvt->channels_min = 2;
  1234. if (chans <= 16) {
  1235. per_cvt->channels_max = chans;
  1236. if (chans > spec->channels_max)
  1237. spec->channels_max = chans;
  1238. }
  1239. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1240. &per_cvt->rates,
  1241. &per_cvt->formats,
  1242. &per_cvt->maxbps);
  1243. if (err < 0)
  1244. return err;
  1245. if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
  1246. spec->cvt_nids[spec->num_cvts] = cvt_nid;
  1247. spec->num_cvts++;
  1248. return 0;
  1249. }
  1250. static int hdmi_parse_codec(struct hda_codec *codec)
  1251. {
  1252. hda_nid_t nid;
  1253. int i, nodes;
  1254. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1255. if (!nid || nodes < 0) {
  1256. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1257. return -EINVAL;
  1258. }
  1259. for (i = 0; i < nodes; i++, nid++) {
  1260. unsigned int caps;
  1261. unsigned int type;
  1262. caps = get_wcaps(codec, nid);
  1263. type = get_wcaps_type(caps);
  1264. if (!(caps & AC_WCAP_DIGITAL))
  1265. continue;
  1266. switch (type) {
  1267. case AC_WID_AUD_OUT:
  1268. hdmi_add_cvt(codec, nid);
  1269. break;
  1270. case AC_WID_PIN:
  1271. hdmi_add_pin(codec, nid);
  1272. break;
  1273. }
  1274. }
  1275. #ifdef CONFIG_PM
  1276. /* We're seeing some problems with unsolicited hot plug events on
  1277. * PantherPoint after S3, if this is not enabled */
  1278. if (codec->vendor_id == 0x80862806)
  1279. codec->bus->power_keep_link_on = 1;
  1280. /*
  1281. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1282. * can be lost and presence sense verb will become inaccurate if the
  1283. * HDA link is powered off at hot plug or hw initialization time.
  1284. */
  1285. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1286. AC_PWRST_EPSS))
  1287. codec->bus->power_keep_link_on = 1;
  1288. #endif
  1289. return 0;
  1290. }
  1291. /*
  1292. */
  1293. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1294. {
  1295. struct hda_spdif_out *spdif;
  1296. bool non_pcm;
  1297. mutex_lock(&codec->spdif_mutex);
  1298. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1299. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1300. mutex_unlock(&codec->spdif_mutex);
  1301. return non_pcm;
  1302. }
  1303. /*
  1304. * HDMI callbacks
  1305. */
  1306. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1307. struct hda_codec *codec,
  1308. unsigned int stream_tag,
  1309. unsigned int format,
  1310. struct snd_pcm_substream *substream)
  1311. {
  1312. hda_nid_t cvt_nid = hinfo->nid;
  1313. struct hdmi_spec *spec = codec->spec;
  1314. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1315. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1316. hda_nid_t pin_nid = per_pin->pin_nid;
  1317. bool non_pcm;
  1318. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1319. per_pin->channels = substream->runtime->channels;
  1320. per_pin->setup = true;
  1321. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1322. hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
  1323. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1324. }
  1325. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1326. struct hda_codec *codec,
  1327. struct snd_pcm_substream *substream)
  1328. {
  1329. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1330. return 0;
  1331. }
  1332. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1333. struct hda_codec *codec,
  1334. struct snd_pcm_substream *substream)
  1335. {
  1336. struct hdmi_spec *spec = codec->spec;
  1337. int cvt_idx, pin_idx;
  1338. struct hdmi_spec_per_cvt *per_cvt;
  1339. struct hdmi_spec_per_pin *per_pin;
  1340. if (hinfo->nid) {
  1341. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1342. if (snd_BUG_ON(cvt_idx < 0))
  1343. return -EINVAL;
  1344. per_cvt = get_cvt(spec, cvt_idx);
  1345. snd_BUG_ON(!per_cvt->assigned);
  1346. per_cvt->assigned = 0;
  1347. hinfo->nid = 0;
  1348. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1349. if (snd_BUG_ON(pin_idx < 0))
  1350. return -EINVAL;
  1351. per_pin = get_pin(spec, pin_idx);
  1352. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1353. per_pin->chmap_set = false;
  1354. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1355. per_pin->setup = false;
  1356. per_pin->channels = 0;
  1357. }
  1358. return 0;
  1359. }
  1360. static const struct hda_pcm_ops generic_ops = {
  1361. .open = hdmi_pcm_open,
  1362. .close = hdmi_pcm_close,
  1363. .prepare = generic_hdmi_playback_pcm_prepare,
  1364. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1365. };
  1366. /*
  1367. * ALSA API channel-map control callbacks
  1368. */
  1369. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1370. struct snd_ctl_elem_info *uinfo)
  1371. {
  1372. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1373. struct hda_codec *codec = info->private_data;
  1374. struct hdmi_spec *spec = codec->spec;
  1375. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1376. uinfo->count = spec->channels_max;
  1377. uinfo->value.integer.min = 0;
  1378. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1379. return 0;
  1380. }
  1381. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1382. unsigned int size, unsigned int __user *tlv)
  1383. {
  1384. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1385. struct hda_codec *codec = info->private_data;
  1386. struct hdmi_spec *spec = codec->spec;
  1387. const unsigned int valid_mask =
  1388. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1389. unsigned int __user *dst;
  1390. int chs, count = 0;
  1391. if (size < 8)
  1392. return -ENOMEM;
  1393. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1394. return -EFAULT;
  1395. size -= 8;
  1396. dst = tlv + 2;
  1397. for (chs = 2; chs <= spec->channels_max; chs++) {
  1398. int i, c;
  1399. struct cea_channel_speaker_allocation *cap;
  1400. cap = channel_allocations;
  1401. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1402. int chs_bytes = chs * 4;
  1403. if (cap->channels != chs)
  1404. continue;
  1405. if (cap->spk_mask & ~valid_mask)
  1406. continue;
  1407. if (size < 8)
  1408. return -ENOMEM;
  1409. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1410. put_user(chs_bytes, dst + 1))
  1411. return -EFAULT;
  1412. dst += 2;
  1413. size -= 8;
  1414. count += 8;
  1415. if (size < chs_bytes)
  1416. return -ENOMEM;
  1417. size -= chs_bytes;
  1418. count += chs_bytes;
  1419. for (c = 7; c >= 0; c--) {
  1420. int spk = cap->speakers[c];
  1421. if (!spk)
  1422. continue;
  1423. if (put_user(spk_to_chmap(spk), dst))
  1424. return -EFAULT;
  1425. dst++;
  1426. }
  1427. }
  1428. }
  1429. if (put_user(count, tlv + 1))
  1430. return -EFAULT;
  1431. return 0;
  1432. }
  1433. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1434. struct snd_ctl_elem_value *ucontrol)
  1435. {
  1436. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1437. struct hda_codec *codec = info->private_data;
  1438. struct hdmi_spec *spec = codec->spec;
  1439. int pin_idx = kcontrol->private_value;
  1440. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1441. int i;
  1442. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1443. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1444. return 0;
  1445. }
  1446. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1447. struct snd_ctl_elem_value *ucontrol)
  1448. {
  1449. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1450. struct hda_codec *codec = info->private_data;
  1451. struct hdmi_spec *spec = codec->spec;
  1452. int pin_idx = kcontrol->private_value;
  1453. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1454. unsigned int ctl_idx;
  1455. struct snd_pcm_substream *substream;
  1456. unsigned char chmap[8];
  1457. int i, ca, prepared = 0;
  1458. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1459. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1460. if (!substream || !substream->runtime)
  1461. return 0; /* just for avoiding error from alsactl restore */
  1462. switch (substream->runtime->status->state) {
  1463. case SNDRV_PCM_STATE_OPEN:
  1464. case SNDRV_PCM_STATE_SETUP:
  1465. break;
  1466. case SNDRV_PCM_STATE_PREPARED:
  1467. prepared = 1;
  1468. break;
  1469. default:
  1470. return -EBUSY;
  1471. }
  1472. memset(chmap, 0, sizeof(chmap));
  1473. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1474. chmap[i] = ucontrol->value.integer.value[i];
  1475. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1476. return 0;
  1477. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1478. if (ca < 0)
  1479. return -EINVAL;
  1480. per_pin->chmap_set = true;
  1481. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1482. if (prepared)
  1483. hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
  1484. return 0;
  1485. }
  1486. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1487. {
  1488. struct hdmi_spec *spec = codec->spec;
  1489. int pin_idx;
  1490. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1491. struct hda_pcm *info;
  1492. struct hda_pcm_stream *pstr;
  1493. struct hdmi_spec_per_pin *per_pin;
  1494. per_pin = get_pin(spec, pin_idx);
  1495. sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
  1496. info = snd_array_new(&spec->pcm_rec);
  1497. if (!info)
  1498. return -ENOMEM;
  1499. info->name = per_pin->pcm_name;
  1500. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1501. info->own_chmap = true;
  1502. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1503. pstr->substreams = 1;
  1504. pstr->ops = generic_ops;
  1505. /* other pstr fields are set in open */
  1506. }
  1507. codec->num_pcms = spec->num_pins;
  1508. codec->pcm_info = spec->pcm_rec.list;
  1509. return 0;
  1510. }
  1511. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1512. {
  1513. char hdmi_str[32] = "HDMI/DP";
  1514. struct hdmi_spec *spec = codec->spec;
  1515. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1516. int pcmdev = get_pcm_rec(spec, pin_idx)->device;
  1517. if (pcmdev > 0)
  1518. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1519. if (!is_jack_detectable(codec, per_pin->pin_nid))
  1520. strncat(hdmi_str, " Phantom",
  1521. sizeof(hdmi_str) - strlen(hdmi_str) - 1);
  1522. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1523. }
  1524. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1525. {
  1526. struct hdmi_spec *spec = codec->spec;
  1527. int err;
  1528. int pin_idx;
  1529. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1530. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1531. err = generic_hdmi_build_jack(codec, pin_idx);
  1532. if (err < 0)
  1533. return err;
  1534. err = snd_hda_create_dig_out_ctls(codec,
  1535. per_pin->pin_nid,
  1536. per_pin->mux_nids[0],
  1537. HDA_PCM_TYPE_HDMI);
  1538. if (err < 0)
  1539. return err;
  1540. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1541. /* add control for ELD Bytes */
  1542. err = hdmi_create_eld_ctl(codec, pin_idx,
  1543. get_pcm_rec(spec, pin_idx)->device);
  1544. if (err < 0)
  1545. return err;
  1546. hdmi_present_sense(per_pin, 0);
  1547. }
  1548. /* add channel maps */
  1549. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1550. struct snd_pcm_chmap *chmap;
  1551. struct snd_kcontrol *kctl;
  1552. int i;
  1553. if (!codec->pcm_info[pin_idx].pcm)
  1554. break;
  1555. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1556. SNDRV_PCM_STREAM_PLAYBACK,
  1557. NULL, 0, pin_idx, &chmap);
  1558. if (err < 0)
  1559. return err;
  1560. /* override handlers */
  1561. chmap->private_data = codec;
  1562. kctl = chmap->kctl;
  1563. for (i = 0; i < kctl->count; i++)
  1564. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1565. kctl->info = hdmi_chmap_ctl_info;
  1566. kctl->get = hdmi_chmap_ctl_get;
  1567. kctl->put = hdmi_chmap_ctl_put;
  1568. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1569. }
  1570. return 0;
  1571. }
  1572. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1573. {
  1574. struct hdmi_spec *spec = codec->spec;
  1575. int pin_idx;
  1576. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1577. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1578. struct hdmi_eld *eld = &per_pin->sink_eld;
  1579. per_pin->codec = codec;
  1580. mutex_init(&eld->lock);
  1581. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1582. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1583. }
  1584. return 0;
  1585. }
  1586. static int generic_hdmi_init(struct hda_codec *codec)
  1587. {
  1588. struct hdmi_spec *spec = codec->spec;
  1589. int pin_idx;
  1590. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1591. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1592. hda_nid_t pin_nid = per_pin->pin_nid;
  1593. hdmi_init_pin(codec, pin_nid);
  1594. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1595. }
  1596. return 0;
  1597. }
  1598. static void hdmi_array_init(struct hdmi_spec *spec, int nums)
  1599. {
  1600. snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
  1601. snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
  1602. snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
  1603. }
  1604. static void hdmi_array_free(struct hdmi_spec *spec)
  1605. {
  1606. snd_array_free(&spec->pins);
  1607. snd_array_free(&spec->cvts);
  1608. snd_array_free(&spec->pcm_rec);
  1609. }
  1610. static void generic_hdmi_free(struct hda_codec *codec)
  1611. {
  1612. struct hdmi_spec *spec = codec->spec;
  1613. int pin_idx;
  1614. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1615. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1616. struct hdmi_eld *eld = &per_pin->sink_eld;
  1617. cancel_delayed_work(&per_pin->work);
  1618. snd_hda_eld_proc_free(codec, eld);
  1619. }
  1620. flush_workqueue(codec->bus->workq);
  1621. hdmi_array_free(spec);
  1622. kfree(spec);
  1623. }
  1624. #ifdef CONFIG_PM
  1625. static int generic_hdmi_resume(struct hda_codec *codec)
  1626. {
  1627. struct hdmi_spec *spec = codec->spec;
  1628. int pin_idx;
  1629. generic_hdmi_init(codec);
  1630. snd_hda_codec_resume_amp(codec);
  1631. snd_hda_codec_resume_cache(codec);
  1632. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1633. struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
  1634. hdmi_present_sense(per_pin, 1);
  1635. }
  1636. return 0;
  1637. }
  1638. #endif
  1639. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1640. .init = generic_hdmi_init,
  1641. .free = generic_hdmi_free,
  1642. .build_pcms = generic_hdmi_build_pcms,
  1643. .build_controls = generic_hdmi_build_controls,
  1644. .unsol_event = hdmi_unsol_event,
  1645. #ifdef CONFIG_PM
  1646. .resume = generic_hdmi_resume,
  1647. #endif
  1648. };
  1649. static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
  1650. hda_nid_t nid)
  1651. {
  1652. struct hdmi_spec *spec = codec->spec;
  1653. hda_nid_t conns[4];
  1654. int nconns;
  1655. nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
  1656. if (nconns == spec->num_cvts &&
  1657. !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
  1658. return;
  1659. /* override pins connection list */
  1660. snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
  1661. snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
  1662. }
  1663. #define INTEL_VENDOR_NID 0x08
  1664. #define INTEL_GET_VENDOR_VERB 0xf81
  1665. #define INTEL_SET_VENDOR_VERB 0x781
  1666. #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
  1667. #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
  1668. static void intel_haswell_enable_all_pins(struct hda_codec *codec,
  1669. bool update_tree)
  1670. {
  1671. unsigned int vendor_param;
  1672. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1673. INTEL_GET_VENDOR_VERB, 0);
  1674. if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
  1675. return;
  1676. vendor_param |= INTEL_EN_ALL_PIN_CVTS;
  1677. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1678. INTEL_SET_VENDOR_VERB, vendor_param);
  1679. if (vendor_param == -1)
  1680. return;
  1681. if (update_tree)
  1682. snd_hda_codec_update_widgets(codec);
  1683. }
  1684. static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
  1685. {
  1686. unsigned int vendor_param;
  1687. vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
  1688. INTEL_GET_VENDOR_VERB, 0);
  1689. if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
  1690. return;
  1691. /* enable DP1.2 mode */
  1692. vendor_param |= INTEL_EN_DP12;
  1693. snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
  1694. INTEL_SET_VENDOR_VERB, vendor_param);
  1695. }
  1696. /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
  1697. * Otherwise you may get severe h/w communication errors.
  1698. */
  1699. static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  1700. unsigned int power_state)
  1701. {
  1702. if (power_state == AC_PWRST_D0) {
  1703. intel_haswell_enable_all_pins(codec, false);
  1704. intel_haswell_fixup_enable_dp12(codec);
  1705. }
  1706. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
  1707. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  1708. }
  1709. static int patch_generic_hdmi(struct hda_codec *codec)
  1710. {
  1711. struct hdmi_spec *spec;
  1712. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1713. if (spec == NULL)
  1714. return -ENOMEM;
  1715. codec->spec = spec;
  1716. hdmi_array_init(spec, 4);
  1717. if (is_haswell(codec)) {
  1718. intel_haswell_enable_all_pins(codec, true);
  1719. intel_haswell_fixup_enable_dp12(codec);
  1720. }
  1721. if (hdmi_parse_codec(codec) < 0) {
  1722. codec->spec = NULL;
  1723. kfree(spec);
  1724. return -EINVAL;
  1725. }
  1726. codec->patch_ops = generic_hdmi_patch_ops;
  1727. if (is_haswell(codec)) {
  1728. codec->patch_ops.set_power_state = haswell_set_power_state;
  1729. codec->dp_mst = true;
  1730. }
  1731. generic_hdmi_init_per_pins(codec);
  1732. init_channel_allocations();
  1733. return 0;
  1734. }
  1735. /*
  1736. * Shared non-generic implementations
  1737. */
  1738. static int simple_playback_build_pcms(struct hda_codec *codec)
  1739. {
  1740. struct hdmi_spec *spec = codec->spec;
  1741. struct hda_pcm *info;
  1742. unsigned int chans;
  1743. struct hda_pcm_stream *pstr;
  1744. struct hdmi_spec_per_cvt *per_cvt;
  1745. per_cvt = get_cvt(spec, 0);
  1746. chans = get_wcaps(codec, per_cvt->cvt_nid);
  1747. chans = get_wcaps_channels(chans);
  1748. info = snd_array_new(&spec->pcm_rec);
  1749. if (!info)
  1750. return -ENOMEM;
  1751. info->name = get_pin(spec, 0)->pcm_name;
  1752. sprintf(info->name, "HDMI 0");
  1753. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1754. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1755. *pstr = spec->pcm_playback;
  1756. pstr->nid = per_cvt->cvt_nid;
  1757. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1758. pstr->channels_max = chans;
  1759. codec->num_pcms = 1;
  1760. codec->pcm_info = info;
  1761. return 0;
  1762. }
  1763. /* unsolicited event for jack sensing */
  1764. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1765. unsigned int res)
  1766. {
  1767. snd_hda_jack_set_dirty_all(codec);
  1768. snd_hda_jack_report_sync(codec);
  1769. }
  1770. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1771. * as long as spec->pins[] is set correctly
  1772. */
  1773. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1774. static int simple_playback_build_controls(struct hda_codec *codec)
  1775. {
  1776. struct hdmi_spec *spec = codec->spec;
  1777. struct hdmi_spec_per_cvt *per_cvt;
  1778. int err;
  1779. per_cvt = get_cvt(spec, 0);
  1780. err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
  1781. per_cvt->cvt_nid);
  1782. if (err < 0)
  1783. return err;
  1784. return simple_hdmi_build_jack(codec, 0);
  1785. }
  1786. static int simple_playback_init(struct hda_codec *codec)
  1787. {
  1788. struct hdmi_spec *spec = codec->spec;
  1789. struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
  1790. hda_nid_t pin = per_pin->pin_nid;
  1791. snd_hda_codec_write(codec, pin, 0,
  1792. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1793. /* some codecs require to unmute the pin */
  1794. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1795. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1796. AMP_OUT_UNMUTE);
  1797. snd_hda_jack_detect_enable(codec, pin, pin);
  1798. return 0;
  1799. }
  1800. static void simple_playback_free(struct hda_codec *codec)
  1801. {
  1802. struct hdmi_spec *spec = codec->spec;
  1803. hdmi_array_free(spec);
  1804. kfree(spec);
  1805. }
  1806. /*
  1807. * Nvidia specific implementations
  1808. */
  1809. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1810. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1811. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1812. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1813. #define nvhdmi_master_con_nid_7x 0x04
  1814. #define nvhdmi_master_pin_nid_7x 0x05
  1815. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1816. /*front, rear, clfe, rear_surr */
  1817. 0x6, 0x8, 0xa, 0xc,
  1818. };
  1819. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1820. /* set audio protect on */
  1821. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1822. /* enable digital output on pin widget */
  1823. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1824. {} /* terminator */
  1825. };
  1826. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1827. /* set audio protect on */
  1828. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1829. /* enable digital output on pin widget */
  1830. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1831. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1832. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1833. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1834. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1835. {} /* terminator */
  1836. };
  1837. #ifdef LIMITED_RATE_FMT_SUPPORT
  1838. /* support only the safe format and rate */
  1839. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1840. #define SUPPORTED_MAXBPS 16
  1841. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1842. #else
  1843. /* support all rates and formats */
  1844. #define SUPPORTED_RATES \
  1845. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1846. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1847. SNDRV_PCM_RATE_192000)
  1848. #define SUPPORTED_MAXBPS 24
  1849. #define SUPPORTED_FORMATS \
  1850. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1851. #endif
  1852. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1853. {
  1854. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1855. return 0;
  1856. }
  1857. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1858. {
  1859. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1860. return 0;
  1861. }
  1862. static unsigned int channels_2_6_8[] = {
  1863. 2, 6, 8
  1864. };
  1865. static unsigned int channels_2_8[] = {
  1866. 2, 8
  1867. };
  1868. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1869. .count = ARRAY_SIZE(channels_2_6_8),
  1870. .list = channels_2_6_8,
  1871. .mask = 0,
  1872. };
  1873. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1874. .count = ARRAY_SIZE(channels_2_8),
  1875. .list = channels_2_8,
  1876. .mask = 0,
  1877. };
  1878. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1879. struct hda_codec *codec,
  1880. struct snd_pcm_substream *substream)
  1881. {
  1882. struct hdmi_spec *spec = codec->spec;
  1883. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1884. switch (codec->preset->id) {
  1885. case 0x10de0002:
  1886. case 0x10de0003:
  1887. case 0x10de0005:
  1888. case 0x10de0006:
  1889. hw_constraints_channels = &hw_constraints_2_8_channels;
  1890. break;
  1891. case 0x10de0007:
  1892. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1893. break;
  1894. default:
  1895. break;
  1896. }
  1897. if (hw_constraints_channels != NULL) {
  1898. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1899. SNDRV_PCM_HW_PARAM_CHANNELS,
  1900. hw_constraints_channels);
  1901. } else {
  1902. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1903. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1904. }
  1905. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1906. }
  1907. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1908. struct hda_codec *codec,
  1909. struct snd_pcm_substream *substream)
  1910. {
  1911. struct hdmi_spec *spec = codec->spec;
  1912. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1913. }
  1914. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1915. struct hda_codec *codec,
  1916. unsigned int stream_tag,
  1917. unsigned int format,
  1918. struct snd_pcm_substream *substream)
  1919. {
  1920. struct hdmi_spec *spec = codec->spec;
  1921. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1922. stream_tag, format, substream);
  1923. }
  1924. static const struct hda_pcm_stream simple_pcm_playback = {
  1925. .substreams = 1,
  1926. .channels_min = 2,
  1927. .channels_max = 2,
  1928. .ops = {
  1929. .open = simple_playback_pcm_open,
  1930. .close = simple_playback_pcm_close,
  1931. .prepare = simple_playback_pcm_prepare
  1932. },
  1933. };
  1934. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1935. .build_controls = simple_playback_build_controls,
  1936. .build_pcms = simple_playback_build_pcms,
  1937. .init = simple_playback_init,
  1938. .free = simple_playback_free,
  1939. .unsol_event = simple_hdmi_unsol_event,
  1940. };
  1941. static int patch_simple_hdmi(struct hda_codec *codec,
  1942. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1943. {
  1944. struct hdmi_spec *spec;
  1945. struct hdmi_spec_per_cvt *per_cvt;
  1946. struct hdmi_spec_per_pin *per_pin;
  1947. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1948. if (!spec)
  1949. return -ENOMEM;
  1950. codec->spec = spec;
  1951. hdmi_array_init(spec, 1);
  1952. spec->multiout.num_dacs = 0; /* no analog */
  1953. spec->multiout.max_channels = 2;
  1954. spec->multiout.dig_out_nid = cvt_nid;
  1955. spec->num_cvts = 1;
  1956. spec->num_pins = 1;
  1957. per_pin = snd_array_new(&spec->pins);
  1958. per_cvt = snd_array_new(&spec->cvts);
  1959. if (!per_pin || !per_cvt) {
  1960. simple_playback_free(codec);
  1961. return -ENOMEM;
  1962. }
  1963. per_cvt->cvt_nid = cvt_nid;
  1964. per_pin->pin_nid = pin_nid;
  1965. spec->pcm_playback = simple_pcm_playback;
  1966. codec->patch_ops = simple_hdmi_patch_ops;
  1967. return 0;
  1968. }
  1969. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1970. int channels)
  1971. {
  1972. unsigned int chanmask;
  1973. int chan = channels ? (channels - 1) : 1;
  1974. switch (channels) {
  1975. default:
  1976. case 0:
  1977. case 2:
  1978. chanmask = 0x00;
  1979. break;
  1980. case 4:
  1981. chanmask = 0x08;
  1982. break;
  1983. case 6:
  1984. chanmask = 0x0b;
  1985. break;
  1986. case 8:
  1987. chanmask = 0x13;
  1988. break;
  1989. }
  1990. /* Set the audio infoframe channel allocation and checksum fields. The
  1991. * channel count is computed implicitly by the hardware. */
  1992. snd_hda_codec_write(codec, 0x1, 0,
  1993. Nv_VERB_SET_Channel_Allocation, chanmask);
  1994. snd_hda_codec_write(codec, 0x1, 0,
  1995. Nv_VERB_SET_Info_Frame_Checksum,
  1996. (0x71 - chan - chanmask));
  1997. }
  1998. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1999. struct hda_codec *codec,
  2000. struct snd_pcm_substream *substream)
  2001. {
  2002. struct hdmi_spec *spec = codec->spec;
  2003. int i;
  2004. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  2005. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  2006. for (i = 0; i < 4; i++) {
  2007. /* set the stream id */
  2008. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2009. AC_VERB_SET_CHANNEL_STREAMID, 0);
  2010. /* set the stream format */
  2011. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  2012. AC_VERB_SET_STREAM_FORMAT, 0);
  2013. }
  2014. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  2015. * streams are disabled. */
  2016. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2017. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  2018. }
  2019. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  2020. struct hda_codec *codec,
  2021. unsigned int stream_tag,
  2022. unsigned int format,
  2023. struct snd_pcm_substream *substream)
  2024. {
  2025. int chs;
  2026. unsigned int dataDCC2, channel_id;
  2027. int i;
  2028. struct hdmi_spec *spec = codec->spec;
  2029. struct hda_spdif_out *spdif;
  2030. struct hdmi_spec_per_cvt *per_cvt;
  2031. mutex_lock(&codec->spdif_mutex);
  2032. per_cvt = get_cvt(spec, 0);
  2033. spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
  2034. chs = substream->runtime->channels;
  2035. dataDCC2 = 0x2;
  2036. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  2037. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  2038. snd_hda_codec_write(codec,
  2039. nvhdmi_master_con_nid_7x,
  2040. 0,
  2041. AC_VERB_SET_DIGI_CONVERT_1,
  2042. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2043. /* set the stream id */
  2044. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2045. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  2046. /* set the stream format */
  2047. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  2048. AC_VERB_SET_STREAM_FORMAT, format);
  2049. /* turn on again (if needed) */
  2050. /* enable and set the channel status audio/data flag */
  2051. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  2052. snd_hda_codec_write(codec,
  2053. nvhdmi_master_con_nid_7x,
  2054. 0,
  2055. AC_VERB_SET_DIGI_CONVERT_1,
  2056. spdif->ctls & 0xff);
  2057. snd_hda_codec_write(codec,
  2058. nvhdmi_master_con_nid_7x,
  2059. 0,
  2060. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2061. }
  2062. for (i = 0; i < 4; i++) {
  2063. if (chs == 2)
  2064. channel_id = 0;
  2065. else
  2066. channel_id = i * 2;
  2067. /* turn off SPDIF once;
  2068. *otherwise the IEC958 bits won't be updated
  2069. */
  2070. if (codec->spdif_status_reset &&
  2071. (spdif->ctls & AC_DIG1_ENABLE))
  2072. snd_hda_codec_write(codec,
  2073. nvhdmi_con_nids_7x[i],
  2074. 0,
  2075. AC_VERB_SET_DIGI_CONVERT_1,
  2076. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  2077. /* set the stream id */
  2078. snd_hda_codec_write(codec,
  2079. nvhdmi_con_nids_7x[i],
  2080. 0,
  2081. AC_VERB_SET_CHANNEL_STREAMID,
  2082. (stream_tag << 4) | channel_id);
  2083. /* set the stream format */
  2084. snd_hda_codec_write(codec,
  2085. nvhdmi_con_nids_7x[i],
  2086. 0,
  2087. AC_VERB_SET_STREAM_FORMAT,
  2088. format);
  2089. /* turn on again (if needed) */
  2090. /* enable and set the channel status audio/data flag */
  2091. if (codec->spdif_status_reset &&
  2092. (spdif->ctls & AC_DIG1_ENABLE)) {
  2093. snd_hda_codec_write(codec,
  2094. nvhdmi_con_nids_7x[i],
  2095. 0,
  2096. AC_VERB_SET_DIGI_CONVERT_1,
  2097. spdif->ctls & 0xff);
  2098. snd_hda_codec_write(codec,
  2099. nvhdmi_con_nids_7x[i],
  2100. 0,
  2101. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  2102. }
  2103. }
  2104. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  2105. mutex_unlock(&codec->spdif_mutex);
  2106. return 0;
  2107. }
  2108. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  2109. .substreams = 1,
  2110. .channels_min = 2,
  2111. .channels_max = 8,
  2112. .nid = nvhdmi_master_con_nid_7x,
  2113. .rates = SUPPORTED_RATES,
  2114. .maxbps = SUPPORTED_MAXBPS,
  2115. .formats = SUPPORTED_FORMATS,
  2116. .ops = {
  2117. .open = simple_playback_pcm_open,
  2118. .close = nvhdmi_8ch_7x_pcm_close,
  2119. .prepare = nvhdmi_8ch_7x_pcm_prepare
  2120. },
  2121. };
  2122. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  2123. {
  2124. struct hdmi_spec *spec;
  2125. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  2126. nvhdmi_master_pin_nid_7x);
  2127. if (err < 0)
  2128. return err;
  2129. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  2130. /* override the PCM rates, etc, as the codec doesn't give full list */
  2131. spec = codec->spec;
  2132. spec->pcm_playback.rates = SUPPORTED_RATES;
  2133. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  2134. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  2135. return 0;
  2136. }
  2137. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  2138. {
  2139. struct hdmi_spec *spec = codec->spec;
  2140. int err = simple_playback_build_pcms(codec);
  2141. if (!err) {
  2142. struct hda_pcm *info = get_pcm_rec(spec, 0);
  2143. info->own_chmap = true;
  2144. }
  2145. return err;
  2146. }
  2147. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  2148. {
  2149. struct hdmi_spec *spec = codec->spec;
  2150. struct hda_pcm *info;
  2151. struct snd_pcm_chmap *chmap;
  2152. int err;
  2153. err = simple_playback_build_controls(codec);
  2154. if (err < 0)
  2155. return err;
  2156. /* add channel maps */
  2157. info = get_pcm_rec(spec, 0);
  2158. err = snd_pcm_add_chmap_ctls(info->pcm,
  2159. SNDRV_PCM_STREAM_PLAYBACK,
  2160. snd_pcm_alt_chmaps, 8, 0, &chmap);
  2161. if (err < 0)
  2162. return err;
  2163. switch (codec->preset->id) {
  2164. case 0x10de0002:
  2165. case 0x10de0003:
  2166. case 0x10de0005:
  2167. case 0x10de0006:
  2168. chmap->channel_mask = (1U << 2) | (1U << 8);
  2169. break;
  2170. case 0x10de0007:
  2171. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  2172. }
  2173. return 0;
  2174. }
  2175. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  2176. {
  2177. struct hdmi_spec *spec;
  2178. int err = patch_nvhdmi_2ch(codec);
  2179. if (err < 0)
  2180. return err;
  2181. spec = codec->spec;
  2182. spec->multiout.max_channels = 8;
  2183. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  2184. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  2185. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  2186. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  2187. /* Initialize the audio infoframe channel mask and checksum to something
  2188. * valid */
  2189. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  2190. return 0;
  2191. }
  2192. /*
  2193. * ATI-specific implementations
  2194. *
  2195. * FIXME: we may omit the whole this and use the generic code once after
  2196. * it's confirmed to work.
  2197. */
  2198. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  2199. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  2200. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  2201. struct hda_codec *codec,
  2202. unsigned int stream_tag,
  2203. unsigned int format,
  2204. struct snd_pcm_substream *substream)
  2205. {
  2206. struct hdmi_spec *spec = codec->spec;
  2207. struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
  2208. int chans = substream->runtime->channels;
  2209. int i, err;
  2210. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  2211. substream);
  2212. if (err < 0)
  2213. return err;
  2214. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2215. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  2216. /* FIXME: XXX */
  2217. for (i = 0; i < chans; i++) {
  2218. snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
  2219. AC_VERB_SET_HDMI_CHAN_SLOT,
  2220. (i << 4) | i);
  2221. }
  2222. return 0;
  2223. }
  2224. static int patch_atihdmi(struct hda_codec *codec)
  2225. {
  2226. struct hdmi_spec *spec;
  2227. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  2228. if (err < 0)
  2229. return err;
  2230. spec = codec->spec;
  2231. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  2232. return 0;
  2233. }
  2234. /* VIA HDMI Implementation */
  2235. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  2236. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  2237. static int patch_via_hdmi(struct hda_codec *codec)
  2238. {
  2239. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  2240. }
  2241. /*
  2242. * patch entries
  2243. */
  2244. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  2245. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2246. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  2247. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  2248. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  2249. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  2250. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  2251. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  2252. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2253. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2254. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2255. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  2256. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  2257. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  2258. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  2259. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  2260. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  2261. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  2262. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  2263. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  2264. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  2265. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  2266. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  2267. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  2268. /* 17 is known to be absent */
  2269. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  2270. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  2271. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  2272. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  2273. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  2274. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  2275. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  2276. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  2277. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  2278. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  2279. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  2280. { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
  2281. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  2282. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  2283. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2284. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2285. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2286. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2287. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2288. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2289. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2290. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2291. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2292. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2293. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2294. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2295. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2296. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2297. {} /* terminator */
  2298. };
  2299. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2300. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2301. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2302. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2303. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2304. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2305. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2306. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2307. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2308. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2309. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2310. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2311. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2312. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2313. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2314. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2315. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2316. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2317. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2318. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2319. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2320. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2321. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2322. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2323. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2324. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2325. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2326. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2327. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2328. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2329. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2330. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2331. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2332. MODULE_ALIAS("snd-hda-codec-id:10de0060");
  2333. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2334. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2335. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2336. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2337. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2338. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2339. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2340. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2341. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2342. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2343. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2344. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2345. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2346. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2347. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2348. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2349. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2350. MODULE_LICENSE("GPL");
  2351. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2352. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2353. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2354. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2355. static struct hda_codec_preset_list intel_list = {
  2356. .preset = snd_hda_preset_hdmi,
  2357. .owner = THIS_MODULE,
  2358. };
  2359. static int __init patch_hdmi_init(void)
  2360. {
  2361. return snd_hda_add_codec_preset(&intel_list);
  2362. }
  2363. static void __exit patch_hdmi_exit(void)
  2364. {
  2365. snd_hda_delete_codec_preset(&intel_list);
  2366. }
  2367. module_init(patch_hdmi_init)
  2368. module_exit(patch_hdmi_exit)