omapdss.h 29 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022
  1. /*
  2. * Copyright (C) 2008 Nokia Corporation
  3. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __OMAP_OMAPDSS_H
  18. #define __OMAP_OMAPDSS_H
  19. #include <linux/list.h>
  20. #include <linux/kobject.h>
  21. #include <linux/device.h>
  22. #include <linux/interrupt.h>
  23. #include <video/videomode.h>
  24. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  25. #define DISPC_IRQ_VSYNC (1 << 1)
  26. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  27. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  28. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  29. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  30. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  31. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  32. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  33. #define DISPC_IRQ_OCP_ERR (1 << 9)
  34. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  35. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  36. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  37. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  38. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  39. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  40. #define DISPC_IRQ_WAKEUP (1 << 16)
  41. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  42. #define DISPC_IRQ_VSYNC2 (1 << 18)
  43. #define DISPC_IRQ_VID3_END_WIN (1 << 19)
  44. #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
  45. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  46. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  47. #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
  48. #define DISPC_IRQ_FRAMEDONETV (1 << 24)
  49. #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
  50. #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
  51. #define DISPC_IRQ_VSYNC3 (1 << 28)
  52. #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
  53. #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
  54. struct omap_dss_device;
  55. struct omap_overlay_manager;
  56. struct dss_lcd_mgr_config;
  57. struct snd_aes_iec958;
  58. struct snd_cea_861_aud_if;
  59. enum omap_display_type {
  60. OMAP_DISPLAY_TYPE_NONE = 0,
  61. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  62. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  63. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  64. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  65. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  66. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  67. OMAP_DISPLAY_TYPE_DVI = 1 << 6,
  68. };
  69. enum omap_plane {
  70. OMAP_DSS_GFX = 0,
  71. OMAP_DSS_VIDEO1 = 1,
  72. OMAP_DSS_VIDEO2 = 2,
  73. OMAP_DSS_VIDEO3 = 3,
  74. OMAP_DSS_WB = 4,
  75. };
  76. enum omap_channel {
  77. OMAP_DSS_CHANNEL_LCD = 0,
  78. OMAP_DSS_CHANNEL_DIGIT = 1,
  79. OMAP_DSS_CHANNEL_LCD2 = 2,
  80. OMAP_DSS_CHANNEL_LCD3 = 3,
  81. };
  82. enum omap_color_mode {
  83. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  84. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  85. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  86. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  87. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  88. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  89. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  90. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  91. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  92. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  93. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  94. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  95. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  96. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  97. OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
  98. OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
  99. OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
  100. OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
  101. OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
  102. };
  103. enum omap_dss_load_mode {
  104. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  105. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  106. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  107. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  108. };
  109. enum omap_dss_trans_key_type {
  110. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  111. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  112. };
  113. enum omap_rfbi_te_mode {
  114. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  115. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  116. };
  117. enum omap_dss_signal_level {
  118. OMAPDSS_SIG_ACTIVE_HIGH = 0,
  119. OMAPDSS_SIG_ACTIVE_LOW = 1,
  120. };
  121. enum omap_dss_signal_edge {
  122. OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  123. OMAPDSS_DRIVE_SIG_RISING_EDGE,
  124. OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  125. };
  126. enum omap_dss_venc_type {
  127. OMAP_DSS_VENC_TYPE_COMPOSITE,
  128. OMAP_DSS_VENC_TYPE_SVIDEO,
  129. };
  130. enum omap_dss_dsi_pixel_format {
  131. OMAP_DSS_DSI_FMT_RGB888,
  132. OMAP_DSS_DSI_FMT_RGB666,
  133. OMAP_DSS_DSI_FMT_RGB666_PACKED,
  134. OMAP_DSS_DSI_FMT_RGB565,
  135. };
  136. enum omap_dss_dsi_mode {
  137. OMAP_DSS_DSI_CMD_MODE = 0,
  138. OMAP_DSS_DSI_VIDEO_MODE,
  139. };
  140. enum omap_display_caps {
  141. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  142. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  143. };
  144. enum omap_dss_display_state {
  145. OMAP_DSS_DISPLAY_DISABLED = 0,
  146. OMAP_DSS_DISPLAY_ACTIVE,
  147. };
  148. enum omap_dss_audio_state {
  149. OMAP_DSS_AUDIO_DISABLED = 0,
  150. OMAP_DSS_AUDIO_ENABLED,
  151. OMAP_DSS_AUDIO_CONFIGURED,
  152. OMAP_DSS_AUDIO_PLAYING,
  153. };
  154. struct omap_dss_audio {
  155. struct snd_aes_iec958 *iec;
  156. struct snd_cea_861_aud_if *cea;
  157. };
  158. enum omap_dss_rotation_type {
  159. OMAP_DSS_ROT_DMA = 1 << 0,
  160. OMAP_DSS_ROT_VRFB = 1 << 1,
  161. OMAP_DSS_ROT_TILER = 1 << 2,
  162. };
  163. /* clockwise rotation angle */
  164. enum omap_dss_rotation_angle {
  165. OMAP_DSS_ROT_0 = 0,
  166. OMAP_DSS_ROT_90 = 1,
  167. OMAP_DSS_ROT_180 = 2,
  168. OMAP_DSS_ROT_270 = 3,
  169. };
  170. enum omap_overlay_caps {
  171. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  172. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
  173. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
  174. OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
  175. OMAP_DSS_OVL_CAP_POS = 1 << 4,
  176. OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
  177. };
  178. enum omap_overlay_manager_caps {
  179. OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
  180. };
  181. enum omap_dss_clk_source {
  182. OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
  183. * OMAP4: DSS_FCLK */
  184. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
  185. * OMAP4: PLL1_CLK1 */
  186. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
  187. * OMAP4: PLL1_CLK2 */
  188. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
  189. OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
  190. };
  191. enum omap_hdmi_flags {
  192. OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
  193. };
  194. enum omap_dss_output_id {
  195. OMAP_DSS_OUTPUT_DPI = 1 << 0,
  196. OMAP_DSS_OUTPUT_DBI = 1 << 1,
  197. OMAP_DSS_OUTPUT_SDI = 1 << 2,
  198. OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
  199. OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
  200. OMAP_DSS_OUTPUT_VENC = 1 << 5,
  201. OMAP_DSS_OUTPUT_HDMI = 1 << 6,
  202. };
  203. /* RFBI */
  204. struct rfbi_timings {
  205. int cs_on_time;
  206. int cs_off_time;
  207. int we_on_time;
  208. int we_off_time;
  209. int re_on_time;
  210. int re_off_time;
  211. int we_cycle_time;
  212. int re_cycle_time;
  213. int cs_pulse_width;
  214. int access_time;
  215. int clk_div;
  216. u32 tim[5]; /* set by rfbi_convert_timings() */
  217. int converted;
  218. };
  219. /* DSI */
  220. enum omap_dss_dsi_trans_mode {
  221. /* Sync Pulses: both sync start and end packets sent */
  222. OMAP_DSS_DSI_PULSE_MODE,
  223. /* Sync Events: only sync start packets sent */
  224. OMAP_DSS_DSI_EVENT_MODE,
  225. /* Burst: only sync start packets sent, pixels are time compressed */
  226. OMAP_DSS_DSI_BURST_MODE,
  227. };
  228. struct omap_dss_dsi_videomode_timings {
  229. unsigned long hsclk;
  230. unsigned ndl;
  231. unsigned bitspp;
  232. /* pixels */
  233. u16 hact;
  234. /* lines */
  235. u16 vact;
  236. /* DSI video mode blanking data */
  237. /* Unit: byte clock cycles */
  238. u16 hss;
  239. u16 hsa;
  240. u16 hse;
  241. u16 hfp;
  242. u16 hbp;
  243. /* Unit: line clocks */
  244. u16 vsa;
  245. u16 vfp;
  246. u16 vbp;
  247. /* DSI blanking modes */
  248. int blanking_mode;
  249. int hsa_blanking_mode;
  250. int hbp_blanking_mode;
  251. int hfp_blanking_mode;
  252. enum omap_dss_dsi_trans_mode trans_mode;
  253. bool ddr_clk_always_on;
  254. int window_sync;
  255. };
  256. struct omap_dss_dsi_config {
  257. enum omap_dss_dsi_mode mode;
  258. enum omap_dss_dsi_pixel_format pixel_format;
  259. const struct omap_video_timings *timings;
  260. unsigned long hs_clk_min, hs_clk_max;
  261. unsigned long lp_clk_min, lp_clk_max;
  262. bool ddr_clk_always_on;
  263. enum omap_dss_dsi_trans_mode trans_mode;
  264. };
  265. enum omapdss_version {
  266. OMAPDSS_VER_UNKNOWN = 0,
  267. OMAPDSS_VER_OMAP24xx,
  268. OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
  269. OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
  270. OMAPDSS_VER_OMAP3630,
  271. OMAPDSS_VER_AM35xx,
  272. OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
  273. OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
  274. OMAPDSS_VER_OMAP4, /* All other OMAP4s */
  275. OMAPDSS_VER_OMAP5,
  276. };
  277. /* Board specific data */
  278. struct omap_dss_board_info {
  279. int (*get_context_loss_count)(struct device *dev);
  280. int num_devices;
  281. struct omap_dss_device **devices;
  282. struct omap_dss_device *default_device;
  283. const char *default_display_name;
  284. int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
  285. void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
  286. int (*set_min_bus_tput)(struct device *dev, unsigned long r);
  287. enum omapdss_version version;
  288. };
  289. /* Init with the board info */
  290. extern int omap_display_init(struct omap_dss_board_info *board_data);
  291. /* HDMI mux init*/
  292. extern int omap_hdmi_init(enum omap_hdmi_flags flags);
  293. struct omap_video_timings {
  294. /* Unit: pixels */
  295. u16 x_res;
  296. /* Unit: pixels */
  297. u16 y_res;
  298. /* Unit: KHz */
  299. u32 pixel_clock;
  300. /* Unit: pixel clocks */
  301. u16 hsw; /* Horizontal synchronization pulse width */
  302. /* Unit: pixel clocks */
  303. u16 hfp; /* Horizontal front porch */
  304. /* Unit: pixel clocks */
  305. u16 hbp; /* Horizontal back porch */
  306. /* Unit: line clocks */
  307. u16 vsw; /* Vertical synchronization pulse width */
  308. /* Unit: line clocks */
  309. u16 vfp; /* Vertical front porch */
  310. /* Unit: line clocks */
  311. u16 vbp; /* Vertical back porch */
  312. /* Vsync logic level */
  313. enum omap_dss_signal_level vsync_level;
  314. /* Hsync logic level */
  315. enum omap_dss_signal_level hsync_level;
  316. /* Interlaced or Progressive timings */
  317. bool interlace;
  318. /* Pixel clock edge to drive LCD data */
  319. enum omap_dss_signal_edge data_pclk_edge;
  320. /* Data enable logic level */
  321. enum omap_dss_signal_level de_level;
  322. /* Pixel clock edges to drive HSYNC and VSYNC signals */
  323. enum omap_dss_signal_edge sync_pclk_edge;
  324. };
  325. #ifdef CONFIG_OMAP2_DSS_VENC
  326. /* Hardcoded timings for tv modes. Venc only uses these to
  327. * identify the mode, and does not actually use the configs
  328. * itself. However, the configs should be something that
  329. * a normal monitor can also show */
  330. extern const struct omap_video_timings omap_dss_pal_timings;
  331. extern const struct omap_video_timings omap_dss_ntsc_timings;
  332. #endif
  333. struct omap_dss_cpr_coefs {
  334. s16 rr, rg, rb;
  335. s16 gr, gg, gb;
  336. s16 br, bg, bb;
  337. };
  338. struct omap_overlay_info {
  339. u32 paddr;
  340. u32 p_uv_addr; /* for NV12 format */
  341. u16 screen_width;
  342. u16 width;
  343. u16 height;
  344. enum omap_color_mode color_mode;
  345. u8 rotation;
  346. enum omap_dss_rotation_type rotation_type;
  347. bool mirror;
  348. u16 pos_x;
  349. u16 pos_y;
  350. u16 out_width; /* if 0, out_width == width */
  351. u16 out_height; /* if 0, out_height == height */
  352. u8 global_alpha;
  353. u8 pre_mult_alpha;
  354. u8 zorder;
  355. };
  356. struct omap_overlay {
  357. struct kobject kobj;
  358. struct list_head list;
  359. /* static fields */
  360. const char *name;
  361. enum omap_plane id;
  362. enum omap_color_mode supported_modes;
  363. enum omap_overlay_caps caps;
  364. /* dynamic fields */
  365. struct omap_overlay_manager *manager;
  366. /*
  367. * The following functions do not block:
  368. *
  369. * is_enabled
  370. * set_overlay_info
  371. * get_overlay_info
  372. *
  373. * The rest of the functions may block and cannot be called from
  374. * interrupt context
  375. */
  376. int (*enable)(struct omap_overlay *ovl);
  377. int (*disable)(struct omap_overlay *ovl);
  378. bool (*is_enabled)(struct omap_overlay *ovl);
  379. int (*set_manager)(struct omap_overlay *ovl,
  380. struct omap_overlay_manager *mgr);
  381. int (*unset_manager)(struct omap_overlay *ovl);
  382. int (*set_overlay_info)(struct omap_overlay *ovl,
  383. struct omap_overlay_info *info);
  384. void (*get_overlay_info)(struct omap_overlay *ovl,
  385. struct omap_overlay_info *info);
  386. int (*wait_for_go)(struct omap_overlay *ovl);
  387. struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
  388. };
  389. struct omap_overlay_manager_info {
  390. u32 default_color;
  391. enum omap_dss_trans_key_type trans_key_type;
  392. u32 trans_key;
  393. bool trans_enabled;
  394. bool partial_alpha_enabled;
  395. bool cpr_enable;
  396. struct omap_dss_cpr_coefs cpr_coefs;
  397. };
  398. struct omap_overlay_manager {
  399. struct kobject kobj;
  400. /* static fields */
  401. const char *name;
  402. enum omap_channel id;
  403. enum omap_overlay_manager_caps caps;
  404. struct list_head overlays;
  405. enum omap_display_type supported_displays;
  406. enum omap_dss_output_id supported_outputs;
  407. /* dynamic fields */
  408. struct omap_dss_device *output;
  409. /*
  410. * The following functions do not block:
  411. *
  412. * set_manager_info
  413. * get_manager_info
  414. * apply
  415. *
  416. * The rest of the functions may block and cannot be called from
  417. * interrupt context
  418. */
  419. int (*set_output)(struct omap_overlay_manager *mgr,
  420. struct omap_dss_device *output);
  421. int (*unset_output)(struct omap_overlay_manager *mgr);
  422. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  423. struct omap_overlay_manager_info *info);
  424. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  425. struct omap_overlay_manager_info *info);
  426. int (*apply)(struct omap_overlay_manager *mgr);
  427. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  428. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  429. struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
  430. };
  431. /* 22 pins means 1 clk lane and 10 data lanes */
  432. #define OMAP_DSS_MAX_DSI_PINS 22
  433. struct omap_dsi_pin_config {
  434. int num_pins;
  435. /*
  436. * pin numbers in the following order:
  437. * clk+, clk-
  438. * data1+, data1-
  439. * data2+, data2-
  440. * ...
  441. */
  442. int pins[OMAP_DSS_MAX_DSI_PINS];
  443. };
  444. struct omap_dss_writeback_info {
  445. u32 paddr;
  446. u32 p_uv_addr;
  447. u16 buf_width;
  448. u16 width;
  449. u16 height;
  450. enum omap_color_mode color_mode;
  451. u8 rotation;
  452. enum omap_dss_rotation_type rotation_type;
  453. bool mirror;
  454. u8 pre_mult_alpha;
  455. };
  456. struct omapdss_dpi_ops {
  457. int (*connect)(struct omap_dss_device *dssdev,
  458. struct omap_dss_device *dst);
  459. void (*disconnect)(struct omap_dss_device *dssdev,
  460. struct omap_dss_device *dst);
  461. int (*enable)(struct omap_dss_device *dssdev);
  462. void (*disable)(struct omap_dss_device *dssdev);
  463. int (*check_timings)(struct omap_dss_device *dssdev,
  464. struct omap_video_timings *timings);
  465. void (*set_timings)(struct omap_dss_device *dssdev,
  466. struct omap_video_timings *timings);
  467. void (*get_timings)(struct omap_dss_device *dssdev,
  468. struct omap_video_timings *timings);
  469. void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
  470. };
  471. struct omapdss_sdi_ops {
  472. int (*connect)(struct omap_dss_device *dssdev,
  473. struct omap_dss_device *dst);
  474. void (*disconnect)(struct omap_dss_device *dssdev,
  475. struct omap_dss_device *dst);
  476. int (*enable)(struct omap_dss_device *dssdev);
  477. void (*disable)(struct omap_dss_device *dssdev);
  478. int (*check_timings)(struct omap_dss_device *dssdev,
  479. struct omap_video_timings *timings);
  480. void (*set_timings)(struct omap_dss_device *dssdev,
  481. struct omap_video_timings *timings);
  482. void (*get_timings)(struct omap_dss_device *dssdev,
  483. struct omap_video_timings *timings);
  484. void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
  485. };
  486. struct omapdss_dvi_ops {
  487. int (*connect)(struct omap_dss_device *dssdev,
  488. struct omap_dss_device *dst);
  489. void (*disconnect)(struct omap_dss_device *dssdev,
  490. struct omap_dss_device *dst);
  491. int (*enable)(struct omap_dss_device *dssdev);
  492. void (*disable)(struct omap_dss_device *dssdev);
  493. int (*check_timings)(struct omap_dss_device *dssdev,
  494. struct omap_video_timings *timings);
  495. void (*set_timings)(struct omap_dss_device *dssdev,
  496. struct omap_video_timings *timings);
  497. void (*get_timings)(struct omap_dss_device *dssdev,
  498. struct omap_video_timings *timings);
  499. };
  500. struct omapdss_atv_ops {
  501. int (*connect)(struct omap_dss_device *dssdev,
  502. struct omap_dss_device *dst);
  503. void (*disconnect)(struct omap_dss_device *dssdev,
  504. struct omap_dss_device *dst);
  505. int (*enable)(struct omap_dss_device *dssdev);
  506. void (*disable)(struct omap_dss_device *dssdev);
  507. int (*check_timings)(struct omap_dss_device *dssdev,
  508. struct omap_video_timings *timings);
  509. void (*set_timings)(struct omap_dss_device *dssdev,
  510. struct omap_video_timings *timings);
  511. void (*get_timings)(struct omap_dss_device *dssdev,
  512. struct omap_video_timings *timings);
  513. void (*set_type)(struct omap_dss_device *dssdev,
  514. enum omap_dss_venc_type type);
  515. void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
  516. bool invert_polarity);
  517. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  518. u32 (*get_wss)(struct omap_dss_device *dssdev);
  519. };
  520. struct omapdss_hdmi_ops {
  521. int (*connect)(struct omap_dss_device *dssdev,
  522. struct omap_dss_device *dst);
  523. void (*disconnect)(struct omap_dss_device *dssdev,
  524. struct omap_dss_device *dst);
  525. int (*enable)(struct omap_dss_device *dssdev);
  526. void (*disable)(struct omap_dss_device *dssdev);
  527. int (*check_timings)(struct omap_dss_device *dssdev,
  528. struct omap_video_timings *timings);
  529. void (*set_timings)(struct omap_dss_device *dssdev,
  530. struct omap_video_timings *timings);
  531. void (*get_timings)(struct omap_dss_device *dssdev,
  532. struct omap_video_timings *timings);
  533. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  534. bool (*detect)(struct omap_dss_device *dssdev);
  535. /*
  536. * Note: These functions might sleep. Do not call while
  537. * holding a spinlock/readlock.
  538. */
  539. int (*audio_enable)(struct omap_dss_device *dssdev);
  540. void (*audio_disable)(struct omap_dss_device *dssdev);
  541. bool (*audio_supported)(struct omap_dss_device *dssdev);
  542. int (*audio_config)(struct omap_dss_device *dssdev,
  543. struct omap_dss_audio *audio);
  544. /* Note: These functions may not sleep */
  545. int (*audio_start)(struct omap_dss_device *dssdev);
  546. void (*audio_stop)(struct omap_dss_device *dssdev);
  547. };
  548. struct omapdss_dsi_ops {
  549. int (*connect)(struct omap_dss_device *dssdev,
  550. struct omap_dss_device *dst);
  551. void (*disconnect)(struct omap_dss_device *dssdev,
  552. struct omap_dss_device *dst);
  553. int (*enable)(struct omap_dss_device *dssdev);
  554. void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
  555. bool enter_ulps);
  556. /* bus configuration */
  557. int (*set_config)(struct omap_dss_device *dssdev,
  558. const struct omap_dss_dsi_config *cfg);
  559. int (*configure_pins)(struct omap_dss_device *dssdev,
  560. const struct omap_dsi_pin_config *pin_cfg);
  561. void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
  562. bool enable);
  563. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  564. int (*update)(struct omap_dss_device *dssdev, int channel,
  565. void (*callback)(int, void *), void *data);
  566. void (*bus_lock)(struct omap_dss_device *dssdev);
  567. void (*bus_unlock)(struct omap_dss_device *dssdev);
  568. int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
  569. void (*disable_video_output)(struct omap_dss_device *dssdev,
  570. int channel);
  571. int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
  572. int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
  573. int vc_id);
  574. void (*release_vc)(struct omap_dss_device *dssdev, int channel);
  575. /* data transfer */
  576. int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
  577. u8 *data, int len);
  578. int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
  579. u8 *data, int len);
  580. int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
  581. u8 *data, int len);
  582. int (*gen_write)(struct omap_dss_device *dssdev, int channel,
  583. u8 *data, int len);
  584. int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
  585. u8 *data, int len);
  586. int (*gen_read)(struct omap_dss_device *dssdev, int channel,
  587. u8 *reqdata, int reqlen,
  588. u8 *data, int len);
  589. int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
  590. int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
  591. int channel, u16 plen);
  592. };
  593. struct omap_dss_device {
  594. struct device *dev;
  595. struct module *owner;
  596. struct list_head panel_list;
  597. /* alias in the form of "display%d" */
  598. char alias[16];
  599. enum omap_display_type type;
  600. enum omap_display_type output_type;
  601. union {
  602. struct {
  603. u8 data_lines;
  604. } dpi;
  605. struct {
  606. u8 channel;
  607. u8 data_lines;
  608. } rfbi;
  609. struct {
  610. u8 datapairs;
  611. } sdi;
  612. struct {
  613. int module;
  614. } dsi;
  615. struct {
  616. enum omap_dss_venc_type type;
  617. bool invert_polarity;
  618. } venc;
  619. } phy;
  620. struct {
  621. struct omap_video_timings timings;
  622. enum omap_dss_dsi_pixel_format dsi_pix_fmt;
  623. enum omap_dss_dsi_mode dsi_mode;
  624. } panel;
  625. struct {
  626. u8 pixel_size;
  627. struct rfbi_timings rfbi_timings;
  628. } ctrl;
  629. const char *name;
  630. /* used to match device to driver */
  631. const char *driver_name;
  632. void *data;
  633. struct omap_dss_driver *driver;
  634. union {
  635. const struct omapdss_dpi_ops *dpi;
  636. const struct omapdss_sdi_ops *sdi;
  637. const struct omapdss_dvi_ops *dvi;
  638. const struct omapdss_hdmi_ops *hdmi;
  639. const struct omapdss_atv_ops *atv;
  640. const struct omapdss_dsi_ops *dsi;
  641. } ops;
  642. /* helper variable for driver suspend/resume */
  643. bool activate_after_resume;
  644. enum omap_display_caps caps;
  645. struct omap_dss_device *src;
  646. enum omap_dss_display_state state;
  647. enum omap_dss_audio_state audio_state;
  648. /* OMAP DSS output specific fields */
  649. struct list_head list;
  650. /* DISPC channel for this output */
  651. enum omap_channel dispc_channel;
  652. /* output instance */
  653. enum omap_dss_output_id id;
  654. /* dynamic fields */
  655. struct omap_overlay_manager *manager;
  656. struct omap_dss_device *dst;
  657. };
  658. struct omap_dss_hdmi_data
  659. {
  660. int ct_cp_hpd_gpio;
  661. int ls_oe_gpio;
  662. int hpd_gpio;
  663. };
  664. struct omap_dss_driver {
  665. int (*probe)(struct omap_dss_device *);
  666. void (*remove)(struct omap_dss_device *);
  667. int (*connect)(struct omap_dss_device *dssdev);
  668. void (*disconnect)(struct omap_dss_device *dssdev);
  669. int (*enable)(struct omap_dss_device *display);
  670. void (*disable)(struct omap_dss_device *display);
  671. int (*run_test)(struct omap_dss_device *display, int test);
  672. int (*update)(struct omap_dss_device *dssdev,
  673. u16 x, u16 y, u16 w, u16 h);
  674. int (*sync)(struct omap_dss_device *dssdev);
  675. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  676. int (*get_te)(struct omap_dss_device *dssdev);
  677. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  678. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  679. bool (*get_mirror)(struct omap_dss_device *dssdev);
  680. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  681. int (*memory_read)(struct omap_dss_device *dssdev,
  682. void *buf, size_t size,
  683. u16 x, u16 y, u16 w, u16 h);
  684. void (*get_resolution)(struct omap_dss_device *dssdev,
  685. u16 *xres, u16 *yres);
  686. void (*get_dimensions)(struct omap_dss_device *dssdev,
  687. u32 *width, u32 *height);
  688. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  689. int (*check_timings)(struct omap_dss_device *dssdev,
  690. struct omap_video_timings *timings);
  691. void (*set_timings)(struct omap_dss_device *dssdev,
  692. struct omap_video_timings *timings);
  693. void (*get_timings)(struct omap_dss_device *dssdev,
  694. struct omap_video_timings *timings);
  695. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  696. u32 (*get_wss)(struct omap_dss_device *dssdev);
  697. int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
  698. bool (*detect)(struct omap_dss_device *dssdev);
  699. /*
  700. * For display drivers that support audio. This encompasses
  701. * HDMI and DisplayPort at the moment.
  702. */
  703. /*
  704. * Note: These functions might sleep. Do not call while
  705. * holding a spinlock/readlock.
  706. */
  707. int (*audio_enable)(struct omap_dss_device *dssdev);
  708. void (*audio_disable)(struct omap_dss_device *dssdev);
  709. bool (*audio_supported)(struct omap_dss_device *dssdev);
  710. int (*audio_config)(struct omap_dss_device *dssdev,
  711. struct omap_dss_audio *audio);
  712. /* Note: These functions may not sleep */
  713. int (*audio_start)(struct omap_dss_device *dssdev);
  714. void (*audio_stop)(struct omap_dss_device *dssdev);
  715. };
  716. enum omapdss_version omapdss_get_version(void);
  717. bool omapdss_is_initialized(void);
  718. int omap_dss_register_driver(struct omap_dss_driver *);
  719. void omap_dss_unregister_driver(struct omap_dss_driver *);
  720. int omapdss_register_display(struct omap_dss_device *dssdev);
  721. void omapdss_unregister_display(struct omap_dss_device *dssdev);
  722. struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
  723. void omap_dss_put_device(struct omap_dss_device *dssdev);
  724. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  725. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  726. struct omap_dss_device *omap_dss_find_device(void *data,
  727. int (*match)(struct omap_dss_device *dssdev, void *data));
  728. const char *omapdss_get_default_display_name(void);
  729. void videomode_to_omap_video_timings(const struct videomode *vm,
  730. struct omap_video_timings *ovt);
  731. void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
  732. struct videomode *vm);
  733. int dss_feat_get_num_mgrs(void);
  734. int dss_feat_get_num_ovls(void);
  735. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
  736. enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
  737. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
  738. int omap_dss_get_num_overlay_managers(void);
  739. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  740. int omap_dss_get_num_overlays(void);
  741. struct omap_overlay *omap_dss_get_overlay(int num);
  742. int omapdss_register_output(struct omap_dss_device *output);
  743. void omapdss_unregister_output(struct omap_dss_device *output);
  744. struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
  745. struct omap_dss_device *omap_dss_find_output(const char *name);
  746. struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
  747. int omapdss_output_set_device(struct omap_dss_device *out,
  748. struct omap_dss_device *dssdev);
  749. int omapdss_output_unset_device(struct omap_dss_device *out);
  750. struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
  751. struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
  752. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  753. u16 *xres, u16 *yres);
  754. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  755. void omapdss_default_get_timings(struct omap_dss_device *dssdev,
  756. struct omap_video_timings *timings);
  757. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  758. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  759. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  760. u32 dispc_read_irqstatus(void);
  761. void dispc_clear_irqstatus(u32 mask);
  762. u32 dispc_read_irqenable(void);
  763. void dispc_write_irqenable(u32 mask);
  764. int dispc_request_irq(irq_handler_t handler, void *dev_id);
  765. void dispc_free_irq(void *dev_id);
  766. int dispc_runtime_get(void);
  767. void dispc_runtime_put(void);
  768. void dispc_mgr_enable(enum omap_channel channel, bool enable);
  769. bool dispc_mgr_is_enabled(enum omap_channel channel);
  770. u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
  771. u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
  772. u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
  773. bool dispc_mgr_go_busy(enum omap_channel channel);
  774. void dispc_mgr_go(enum omap_channel channel);
  775. void dispc_mgr_set_lcd_config(enum omap_channel channel,
  776. const struct dss_lcd_mgr_config *config);
  777. void dispc_mgr_set_timings(enum omap_channel channel,
  778. const struct omap_video_timings *timings);
  779. void dispc_mgr_setup(enum omap_channel channel,
  780. const struct omap_overlay_manager_info *info);
  781. int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
  782. const struct omap_overlay_info *oi,
  783. const struct omap_video_timings *timings,
  784. int *x_predecim, int *y_predecim);
  785. int dispc_ovl_enable(enum omap_plane plane, bool enable);
  786. bool dispc_ovl_enabled(enum omap_plane plane);
  787. void dispc_ovl_set_channel_out(enum omap_plane plane,
  788. enum omap_channel channel);
  789. int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
  790. bool replication, const struct omap_video_timings *mgr_timings,
  791. bool mem_to_mem);
  792. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  793. #define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
  794. int omapdss_compat_init(void);
  795. void omapdss_compat_uninit(void);
  796. struct dss_mgr_ops {
  797. int (*connect)(struct omap_overlay_manager *mgr,
  798. struct omap_dss_device *dst);
  799. void (*disconnect)(struct omap_overlay_manager *mgr,
  800. struct omap_dss_device *dst);
  801. void (*start_update)(struct omap_overlay_manager *mgr);
  802. int (*enable)(struct omap_overlay_manager *mgr);
  803. void (*disable)(struct omap_overlay_manager *mgr);
  804. void (*set_timings)(struct omap_overlay_manager *mgr,
  805. const struct omap_video_timings *timings);
  806. void (*set_lcd_config)(struct omap_overlay_manager *mgr,
  807. const struct dss_lcd_mgr_config *config);
  808. int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
  809. void (*handler)(void *), void *data);
  810. void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
  811. void (*handler)(void *), void *data);
  812. };
  813. int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
  814. void dss_uninstall_mgr_ops(void);
  815. int dss_mgr_connect(struct omap_overlay_manager *mgr,
  816. struct omap_dss_device *dst);
  817. void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
  818. struct omap_dss_device *dst);
  819. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  820. const struct omap_video_timings *timings);
  821. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  822. const struct dss_lcd_mgr_config *config);
  823. int dss_mgr_enable(struct omap_overlay_manager *mgr);
  824. void dss_mgr_disable(struct omap_overlay_manager *mgr);
  825. void dss_mgr_start_update(struct omap_overlay_manager *mgr);
  826. int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
  827. void (*handler)(void *), void *data);
  828. void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
  829. void (*handler)(void *), void *data);
  830. static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
  831. {
  832. return dssdev->src;
  833. }
  834. static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
  835. {
  836. return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
  837. }
  838. #endif