booke_wdt.c 6.0 KB

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  1. /*
  2. * Watchdog timer for PowerPC Book-E systems
  3. *
  4. * Author: Matthew McClintock
  5. * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  6. *
  7. * Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/smp.h>
  17. #include <linux/watchdog.h>
  18. #include <asm/reg_booke.h>
  19. #include <asm/time.h>
  20. #include <asm/div64.h>
  21. /* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
  22. * Also, the wdt_period sets the watchdog timer period timeout.
  23. * For E500 cpus the wdt_period sets which bit changing from 0->1 will
  24. * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
  25. * first time nothing will happen, the second time a watchdog exception will
  26. * occur, and the final time the board will reset.
  27. */
  28. u32 booke_wdt_enabled;
  29. u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
  30. #ifdef CONFIG_PPC_FSL_BOOK3E
  31. #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
  32. #define WDTP_MASK (WDTP(0x3f))
  33. #else
  34. #define WDTP(x) (TCR_WP(x))
  35. #define WDTP_MASK (TCR_WP_MASK)
  36. #endif
  37. #ifdef CONFIG_PPC_FSL_BOOK3E
  38. /* For the specified period, determine the number of seconds
  39. * corresponding to the reset time. There will be a watchdog
  40. * exception at approximately 3/5 of this time.
  41. *
  42. * The formula to calculate this is given by:
  43. * 2.5 * (2^(63-period+1)) / timebase_freq
  44. *
  45. * In order to simplify things, we assume that period is
  46. * at least 1. This will still result in a very long timeout.
  47. */
  48. static unsigned long long period_to_sec(unsigned int period)
  49. {
  50. unsigned long long tmp = 1ULL << (64 - period);
  51. unsigned long tmp2 = ppc_tb_freq;
  52. /* tmp may be a very large number and we don't want to overflow,
  53. * so divide the timebase freq instead of multiplying tmp
  54. */
  55. tmp2 = tmp2 / 5 * 2;
  56. do_div(tmp, tmp2);
  57. return tmp;
  58. }
  59. /*
  60. * This procedure will find the highest period which will give a timeout
  61. * greater than the one required. e.g. for a bus speed of 66666666 and
  62. * and a parameter of 2 secs, then this procedure will return a value of 38.
  63. */
  64. static unsigned int sec_to_period(unsigned int secs)
  65. {
  66. unsigned int period;
  67. for (period = 63; period > 0; period--) {
  68. if (period_to_sec(period) >= secs)
  69. return period;
  70. }
  71. return 0;
  72. }
  73. #define MAX_WDT_TIMEOUT period_to_sec(1)
  74. #else /* CONFIG_PPC_FSL_BOOK3E */
  75. static unsigned long long period_to_sec(unsigned int period)
  76. {
  77. return period;
  78. }
  79. static unsigned int sec_to_period(unsigned int secs)
  80. {
  81. return secs;
  82. }
  83. #define MAX_WDT_TIMEOUT 3 /* from Kconfig */
  84. #endif /* !CONFIG_PPC_FSL_BOOK3E */
  85. static void __booke_wdt_set(void *data)
  86. {
  87. u32 val;
  88. val = mfspr(SPRN_TCR);
  89. val &= ~WDTP_MASK;
  90. val |= WDTP(booke_wdt_period);
  91. mtspr(SPRN_TCR, val);
  92. }
  93. static void booke_wdt_set(void)
  94. {
  95. on_each_cpu(__booke_wdt_set, NULL, 0);
  96. }
  97. static void __booke_wdt_ping(void *data)
  98. {
  99. mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
  100. }
  101. static int booke_wdt_ping(struct watchdog_device *wdog)
  102. {
  103. on_each_cpu(__booke_wdt_ping, NULL, 0);
  104. return 0;
  105. }
  106. static void __booke_wdt_enable(void *data)
  107. {
  108. u32 val;
  109. /* clear status before enabling watchdog */
  110. __booke_wdt_ping(NULL);
  111. val = mfspr(SPRN_TCR);
  112. val &= ~WDTP_MASK;
  113. val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
  114. #ifdef CONFIG_PPC_BOOK3E_64
  115. /*
  116. * Crit ints are currently broken on PPC64 Book-E, so
  117. * just disable them for now.
  118. */
  119. val &= ~TCR_WIE;
  120. #endif
  121. mtspr(SPRN_TCR, val);
  122. }
  123. /**
  124. * booke_wdt_disable - disable the watchdog on the given CPU
  125. *
  126. * This function is called on each CPU. It disables the watchdog on that CPU.
  127. *
  128. * TCR[WRC] cannot be changed once it has been set to non-zero, but we can
  129. * effectively disable the watchdog by setting its period to the maximum value.
  130. */
  131. static void __booke_wdt_disable(void *data)
  132. {
  133. u32 val;
  134. val = mfspr(SPRN_TCR);
  135. val &= ~(TCR_WIE | WDTP_MASK);
  136. mtspr(SPRN_TCR, val);
  137. /* clear status to make sure nothing is pending */
  138. __booke_wdt_ping(NULL);
  139. }
  140. static void __booke_wdt_start(struct watchdog_device *wdog)
  141. {
  142. on_each_cpu(__booke_wdt_enable, NULL, 0);
  143. pr_debug("watchdog enabled (timeout = %u sec)\n", wdog->timeout);
  144. }
  145. static int booke_wdt_start(struct watchdog_device *wdog)
  146. {
  147. if (booke_wdt_enabled == 0) {
  148. booke_wdt_enabled = 1;
  149. __booke_wdt_start(wdog);
  150. }
  151. return 0;
  152. }
  153. static int booke_wdt_stop(struct watchdog_device *wdog)
  154. {
  155. on_each_cpu(__booke_wdt_disable, NULL, 0);
  156. booke_wdt_enabled = 0;
  157. pr_debug("watchdog disabled\n");
  158. return 0;
  159. }
  160. static int booke_wdt_set_timeout(struct watchdog_device *wdt_dev,
  161. unsigned int timeout)
  162. {
  163. if (timeout > MAX_WDT_TIMEOUT)
  164. return -EINVAL;
  165. booke_wdt_period = sec_to_period(timeout);
  166. wdt_dev->timeout = timeout;
  167. booke_wdt_set();
  168. return 0;
  169. }
  170. static struct watchdog_info booke_wdt_info = {
  171. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
  172. .identity = "PowerPC Book-E Watchdog",
  173. };
  174. static struct watchdog_ops booke_wdt_ops = {
  175. .owner = THIS_MODULE,
  176. .start = booke_wdt_start,
  177. .stop = booke_wdt_stop,
  178. .ping = booke_wdt_ping,
  179. .set_timeout = booke_wdt_set_timeout,
  180. };
  181. static struct watchdog_device booke_wdt_dev = {
  182. .info = &booke_wdt_info,
  183. .ops = &booke_wdt_ops,
  184. .min_timeout = 1,
  185. .max_timeout = 0xFFFF
  186. };
  187. static void __exit booke_wdt_exit(void)
  188. {
  189. watchdog_unregister_device(&booke_wdt_dev);
  190. }
  191. static int __init booke_wdt_init(void)
  192. {
  193. int ret = 0;
  194. bool nowayout = WATCHDOG_NOWAYOUT;
  195. pr_info("powerpc book-e watchdog driver loaded\n");
  196. booke_wdt_info.firmware_version = cur_cpu_spec->pvr_value;
  197. booke_wdt_set_timeout(&booke_wdt_dev,
  198. period_to_sec(CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT));
  199. watchdog_set_nowayout(&booke_wdt_dev, nowayout);
  200. if (booke_wdt_enabled)
  201. __booke_wdt_start(&booke_wdt_dev);
  202. ret = watchdog_register_device(&booke_wdt_dev);
  203. return ret;
  204. }
  205. module_init(booke_wdt_init);
  206. module_exit(booke_wdt_exit);
  207. MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
  208. MODULE_LICENSE("GPL");