sdi.c 8.5 KB

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  1. /*
  2. * linux/drivers/video/omap2/dss/sdi.c
  3. *
  4. * Copyright (C) 2009 Nokia Corporation
  5. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #define DSS_SUBSYS_NAME "SDI"
  20. #include <linux/kernel.h>
  21. #include <linux/delay.h>
  22. #include <linux/err.h>
  23. #include <linux/regulator/consumer.h>
  24. #include <linux/export.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/string.h>
  27. #include <video/omapdss.h>
  28. #include "dss.h"
  29. static struct {
  30. struct platform_device *pdev;
  31. bool update_enabled;
  32. struct regulator *vdds_sdi_reg;
  33. struct dss_lcd_mgr_config mgr_config;
  34. struct omap_video_timings timings;
  35. int datapairs;
  36. struct omap_dss_device output;
  37. } sdi;
  38. struct sdi_clk_calc_ctx {
  39. unsigned long pck_min, pck_max;
  40. struct dss_clock_info dss_cinfo;
  41. struct dispc_clock_info dispc_cinfo;
  42. };
  43. static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
  44. unsigned long pck, void *data)
  45. {
  46. struct sdi_clk_calc_ctx *ctx = data;
  47. ctx->dispc_cinfo.lck_div = lckd;
  48. ctx->dispc_cinfo.pck_div = pckd;
  49. ctx->dispc_cinfo.lck = lck;
  50. ctx->dispc_cinfo.pck = pck;
  51. return true;
  52. }
  53. static bool dpi_calc_dss_cb(int fckd, unsigned long fck, void *data)
  54. {
  55. struct sdi_clk_calc_ctx *ctx = data;
  56. ctx->dss_cinfo.fck = fck;
  57. ctx->dss_cinfo.fck_div = fckd;
  58. return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
  59. dpi_calc_dispc_cb, ctx);
  60. }
  61. static int sdi_calc_clock_div(unsigned long pclk,
  62. struct dss_clock_info *dss_cinfo,
  63. struct dispc_clock_info *dispc_cinfo)
  64. {
  65. int i;
  66. struct sdi_clk_calc_ctx ctx;
  67. /*
  68. * DSS fclk gives us very few possibilities, so finding a good pixel
  69. * clock may not be possible. We try multiple times to find the clock,
  70. * each time widening the pixel clock range we look for, up to
  71. * +/- 1MHz.
  72. */
  73. for (i = 0; i < 10; ++i) {
  74. bool ok;
  75. memset(&ctx, 0, sizeof(ctx));
  76. if (pclk > 1000 * i * i * i)
  77. ctx.pck_min = max(pclk - 1000 * i * i * i, 0lu);
  78. else
  79. ctx.pck_min = 0;
  80. ctx.pck_max = pclk + 1000 * i * i * i;
  81. ok = dss_div_calc(ctx.pck_min, dpi_calc_dss_cb, &ctx);
  82. if (ok) {
  83. *dss_cinfo = ctx.dss_cinfo;
  84. *dispc_cinfo = ctx.dispc_cinfo;
  85. return 0;
  86. }
  87. }
  88. return -EINVAL;
  89. }
  90. static void sdi_config_lcd_manager(struct omap_dss_device *dssdev)
  91. {
  92. struct omap_overlay_manager *mgr = sdi.output.manager;
  93. sdi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
  94. sdi.mgr_config.stallmode = false;
  95. sdi.mgr_config.fifohandcheck = false;
  96. sdi.mgr_config.video_port_width = 24;
  97. sdi.mgr_config.lcden_sig_polarity = 1;
  98. dss_mgr_set_lcd_config(mgr, &sdi.mgr_config);
  99. }
  100. static int sdi_display_enable(struct omap_dss_device *dssdev)
  101. {
  102. struct omap_dss_device *out = &sdi.output;
  103. struct omap_video_timings *t = &sdi.timings;
  104. struct dss_clock_info dss_cinfo;
  105. struct dispc_clock_info dispc_cinfo;
  106. unsigned long pck;
  107. int r;
  108. if (out == NULL || out->manager == NULL) {
  109. DSSERR("failed to enable display: no output/manager\n");
  110. return -ENODEV;
  111. }
  112. r = regulator_enable(sdi.vdds_sdi_reg);
  113. if (r)
  114. goto err_reg_enable;
  115. r = dispc_runtime_get();
  116. if (r)
  117. goto err_get_dispc;
  118. /* 15.5.9.1.2 */
  119. t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
  120. t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
  121. r = sdi_calc_clock_div(t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo);
  122. if (r)
  123. goto err_calc_clock_div;
  124. sdi.mgr_config.clock_info = dispc_cinfo;
  125. pck = dss_cinfo.fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div / 1000;
  126. if (pck != t->pixel_clock) {
  127. DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
  128. "got %lu kHz\n",
  129. t->pixel_clock, pck);
  130. t->pixel_clock = pck;
  131. }
  132. dss_mgr_set_timings(out->manager, t);
  133. r = dss_set_clock_div(&dss_cinfo);
  134. if (r)
  135. goto err_set_dss_clock_div;
  136. sdi_config_lcd_manager(dssdev);
  137. /*
  138. * LCLK and PCLK divisors are located in shadow registers, and we
  139. * normally write them to DISPC registers when enabling the output.
  140. * However, SDI uses pck-free as source clock for its PLL, and pck-free
  141. * is affected by the divisors. And as we need the PLL before enabling
  142. * the output, we need to write the divisors early.
  143. *
  144. * It seems just writing to the DISPC register is enough, and we don't
  145. * need to care about the shadow register mechanism for pck-free. The
  146. * exact reason for this is unknown.
  147. */
  148. dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info);
  149. dss_sdi_init(sdi.datapairs);
  150. r = dss_sdi_enable();
  151. if (r)
  152. goto err_sdi_enable;
  153. mdelay(2);
  154. r = dss_mgr_enable(out->manager);
  155. if (r)
  156. goto err_mgr_enable;
  157. return 0;
  158. err_mgr_enable:
  159. dss_sdi_disable();
  160. err_sdi_enable:
  161. err_set_dss_clock_div:
  162. err_calc_clock_div:
  163. dispc_runtime_put();
  164. err_get_dispc:
  165. regulator_disable(sdi.vdds_sdi_reg);
  166. err_reg_enable:
  167. return r;
  168. }
  169. static void sdi_display_disable(struct omap_dss_device *dssdev)
  170. {
  171. struct omap_overlay_manager *mgr = sdi.output.manager;
  172. dss_mgr_disable(mgr);
  173. dss_sdi_disable();
  174. dispc_runtime_put();
  175. regulator_disable(sdi.vdds_sdi_reg);
  176. }
  177. static void sdi_set_timings(struct omap_dss_device *dssdev,
  178. struct omap_video_timings *timings)
  179. {
  180. sdi.timings = *timings;
  181. }
  182. static void sdi_get_timings(struct omap_dss_device *dssdev,
  183. struct omap_video_timings *timings)
  184. {
  185. *timings = sdi.timings;
  186. }
  187. static int sdi_check_timings(struct omap_dss_device *dssdev,
  188. struct omap_video_timings *timings)
  189. {
  190. struct omap_overlay_manager *mgr = sdi.output.manager;
  191. if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
  192. return -EINVAL;
  193. if (timings->pixel_clock == 0)
  194. return -EINVAL;
  195. return 0;
  196. }
  197. static void sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs)
  198. {
  199. sdi.datapairs = datapairs;
  200. }
  201. static int sdi_init_regulator(void)
  202. {
  203. struct regulator *vdds_sdi;
  204. if (sdi.vdds_sdi_reg)
  205. return 0;
  206. vdds_sdi = devm_regulator_get(&sdi.pdev->dev, "vdds_sdi");
  207. if (IS_ERR(vdds_sdi)) {
  208. DSSERR("can't get VDDS_SDI regulator\n");
  209. return PTR_ERR(vdds_sdi);
  210. }
  211. sdi.vdds_sdi_reg = vdds_sdi;
  212. return 0;
  213. }
  214. static int sdi_connect(struct omap_dss_device *dssdev,
  215. struct omap_dss_device *dst)
  216. {
  217. struct omap_overlay_manager *mgr;
  218. int r;
  219. r = sdi_init_regulator();
  220. if (r)
  221. return r;
  222. mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
  223. if (!mgr)
  224. return -ENODEV;
  225. r = dss_mgr_connect(mgr, dssdev);
  226. if (r)
  227. return r;
  228. r = omapdss_output_set_device(dssdev, dst);
  229. if (r) {
  230. DSSERR("failed to connect output to new device: %s\n",
  231. dst->name);
  232. dss_mgr_disconnect(mgr, dssdev);
  233. return r;
  234. }
  235. return 0;
  236. }
  237. static void sdi_disconnect(struct omap_dss_device *dssdev,
  238. struct omap_dss_device *dst)
  239. {
  240. WARN_ON(dst != dssdev->dst);
  241. if (dst != dssdev->dst)
  242. return;
  243. omapdss_output_unset_device(dssdev);
  244. if (dssdev->manager)
  245. dss_mgr_disconnect(dssdev->manager, dssdev);
  246. }
  247. static const struct omapdss_sdi_ops sdi_ops = {
  248. .connect = sdi_connect,
  249. .disconnect = sdi_disconnect,
  250. .enable = sdi_display_enable,
  251. .disable = sdi_display_disable,
  252. .check_timings = sdi_check_timings,
  253. .set_timings = sdi_set_timings,
  254. .get_timings = sdi_get_timings,
  255. .set_datapairs = sdi_set_datapairs,
  256. };
  257. static void sdi_init_output(struct platform_device *pdev)
  258. {
  259. struct omap_dss_device *out = &sdi.output;
  260. out->dev = &pdev->dev;
  261. out->id = OMAP_DSS_OUTPUT_SDI;
  262. out->output_type = OMAP_DISPLAY_TYPE_SDI;
  263. out->name = "sdi.0";
  264. out->dispc_channel = OMAP_DSS_CHANNEL_LCD;
  265. out->ops.sdi = &sdi_ops;
  266. out->owner = THIS_MODULE;
  267. omapdss_register_output(out);
  268. }
  269. static void __exit sdi_uninit_output(struct platform_device *pdev)
  270. {
  271. struct omap_dss_device *out = &sdi.output;
  272. omapdss_unregister_output(out);
  273. }
  274. static int omap_sdi_probe(struct platform_device *pdev)
  275. {
  276. sdi.pdev = pdev;
  277. sdi_init_output(pdev);
  278. return 0;
  279. }
  280. static int __exit omap_sdi_remove(struct platform_device *pdev)
  281. {
  282. sdi_uninit_output(pdev);
  283. return 0;
  284. }
  285. static struct platform_driver omap_sdi_driver = {
  286. .probe = omap_sdi_probe,
  287. .remove = __exit_p(omap_sdi_remove),
  288. .driver = {
  289. .name = "omapdss_sdi",
  290. .owner = THIS_MODULE,
  291. },
  292. };
  293. int __init sdi_init_platform_driver(void)
  294. {
  295. return platform_driver_register(&omap_sdi_driver);
  296. }
  297. void __exit sdi_uninit_platform_driver(void)
  298. {
  299. platform_driver_unregister(&omap_sdi_driver);
  300. }