pwm-mxs.c 4.7 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include <linux/clk.h>
  12. #include <linux/err.h>
  13. #include <linux/io.h>
  14. #include <linux/kernel.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/of_address.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/pwm.h>
  20. #include <linux/slab.h>
  21. #include <linux/stmp_device.h>
  22. #define SET 0x4
  23. #define CLR 0x8
  24. #define TOG 0xc
  25. #define PWM_CTRL 0x0
  26. #define PWM_ACTIVE0 0x10
  27. #define PWM_PERIOD0 0x20
  28. #define PERIOD_PERIOD(p) ((p) & 0xffff)
  29. #define PERIOD_PERIOD_MAX 0x10000
  30. #define PERIOD_ACTIVE_HIGH (3 << 16)
  31. #define PERIOD_INACTIVE_LOW (2 << 18)
  32. #define PERIOD_CDIV(div) (((div) & 0x7) << 20)
  33. #define PERIOD_CDIV_MAX 8
  34. struct mxs_pwm_chip {
  35. struct pwm_chip chip;
  36. struct clk *clk;
  37. void __iomem *base;
  38. };
  39. #define to_mxs_pwm_chip(_chip) container_of(_chip, struct mxs_pwm_chip, chip)
  40. static int mxs_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
  41. int duty_ns, int period_ns)
  42. {
  43. struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
  44. int ret, div = 0;
  45. unsigned int period_cycles, duty_cycles;
  46. unsigned long rate;
  47. unsigned long long c;
  48. rate = clk_get_rate(mxs->clk);
  49. while (1) {
  50. c = rate / (1 << div);
  51. c = c * period_ns;
  52. do_div(c, 1000000000);
  53. if (c < PERIOD_PERIOD_MAX)
  54. break;
  55. div++;
  56. if (div > PERIOD_CDIV_MAX)
  57. return -EINVAL;
  58. }
  59. period_cycles = c;
  60. c *= duty_ns;
  61. do_div(c, period_ns);
  62. duty_cycles = c;
  63. /*
  64. * If the PWM channel is disabled, make sure to turn on the clock
  65. * before writing the register. Otherwise, keep it enabled.
  66. */
  67. if (!test_bit(PWMF_ENABLED, &pwm->flags)) {
  68. ret = clk_prepare_enable(mxs->clk);
  69. if (ret)
  70. return ret;
  71. }
  72. writel(duty_cycles << 16,
  73. mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);
  74. writel(PERIOD_PERIOD(period_cycles) | PERIOD_ACTIVE_HIGH |
  75. PERIOD_INACTIVE_LOW | PERIOD_CDIV(div),
  76. mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20);
  77. /*
  78. * If the PWM is not enabled, turn the clock off again to save power.
  79. */
  80. if (!test_bit(PWMF_ENABLED, &pwm->flags))
  81. clk_disable_unprepare(mxs->clk);
  82. return 0;
  83. }
  84. static int mxs_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  85. {
  86. struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
  87. int ret;
  88. ret = clk_prepare_enable(mxs->clk);
  89. if (ret)
  90. return ret;
  91. writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);
  92. return 0;
  93. }
  94. static void mxs_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  95. {
  96. struct mxs_pwm_chip *mxs = to_mxs_pwm_chip(chip);
  97. writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR);
  98. clk_disable_unprepare(mxs->clk);
  99. }
  100. static const struct pwm_ops mxs_pwm_ops = {
  101. .config = mxs_pwm_config,
  102. .enable = mxs_pwm_enable,
  103. .disable = mxs_pwm_disable,
  104. .owner = THIS_MODULE,
  105. };
  106. static int mxs_pwm_probe(struct platform_device *pdev)
  107. {
  108. struct device_node *np = pdev->dev.of_node;
  109. struct mxs_pwm_chip *mxs;
  110. struct resource *res;
  111. int ret;
  112. mxs = devm_kzalloc(&pdev->dev, sizeof(*mxs), GFP_KERNEL);
  113. if (!mxs)
  114. return -ENOMEM;
  115. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  116. mxs->base = devm_ioremap_resource(&pdev->dev, res);
  117. if (IS_ERR(mxs->base))
  118. return PTR_ERR(mxs->base);
  119. mxs->clk = devm_clk_get(&pdev->dev, NULL);
  120. if (IS_ERR(mxs->clk))
  121. return PTR_ERR(mxs->clk);
  122. mxs->chip.dev = &pdev->dev;
  123. mxs->chip.ops = &mxs_pwm_ops;
  124. mxs->chip.base = -1;
  125. ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm);
  126. if (ret < 0) {
  127. dev_err(&pdev->dev, "failed to get pwm number: %d\n", ret);
  128. return ret;
  129. }
  130. ret = pwmchip_add(&mxs->chip);
  131. if (ret < 0) {
  132. dev_err(&pdev->dev, "failed to add pwm chip %d\n", ret);
  133. return ret;
  134. }
  135. platform_set_drvdata(pdev, mxs);
  136. ret = stmp_reset_block(mxs->base);
  137. if (ret)
  138. goto pwm_remove;
  139. return 0;
  140. pwm_remove:
  141. pwmchip_remove(&mxs->chip);
  142. return ret;
  143. }
  144. static int mxs_pwm_remove(struct platform_device *pdev)
  145. {
  146. struct mxs_pwm_chip *mxs = platform_get_drvdata(pdev);
  147. return pwmchip_remove(&mxs->chip);
  148. }
  149. static const struct of_device_id mxs_pwm_dt_ids[] = {
  150. { .compatible = "fsl,imx23-pwm", },
  151. { /* sentinel */ }
  152. };
  153. MODULE_DEVICE_TABLE(of, mxs_pwm_dt_ids);
  154. static struct platform_driver mxs_pwm_driver = {
  155. .driver = {
  156. .name = "mxs-pwm",
  157. .owner = THIS_MODULE,
  158. .of_match_table = of_match_ptr(mxs_pwm_dt_ids),
  159. },
  160. .probe = mxs_pwm_probe,
  161. .remove = mxs_pwm_remove,
  162. };
  163. module_platform_driver(mxs_pwm_driver);
  164. MODULE_ALIAS("platform:mxs-pwm");
  165. MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
  166. MODULE_DESCRIPTION("Freescale MXS PWM Driver");
  167. MODULE_LICENSE("GPL v2");