smartreflex.c 28 KB

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  1. /*
  2. * OMAP SmartReflex Voltage Control
  3. *
  4. * Author: Thara Gopinath <thara@ti.com>
  5. *
  6. * Copyright (C) 2012 Texas Instruments, Inc.
  7. * Thara Gopinath <thara@ti.com>
  8. *
  9. * Copyright (C) 2008 Nokia Corporation
  10. * Kalle Jokiniemi
  11. *
  12. * Copyright (C) 2007 Texas Instruments, Inc.
  13. * Lesly A M <x0080970@ti.com>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include <linux/debugfs.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/power/smartreflex.h>
  28. #define DRIVER_NAME "smartreflex"
  29. #define SMARTREFLEX_NAME_LEN 32
  30. #define NVALUE_NAME_LEN 40
  31. #define SR_DISABLE_TIMEOUT 200
  32. /* sr_list contains all the instances of smartreflex module */
  33. static LIST_HEAD(sr_list);
  34. static struct omap_sr_class_data *sr_class;
  35. static struct omap_sr_pmic_data *sr_pmic_data;
  36. static struct dentry *sr_dbg_dir;
  37. static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value)
  38. {
  39. __raw_writel(value, (sr->base + offset));
  40. }
  41. static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,
  42. u32 value)
  43. {
  44. u32 reg_val;
  45. /*
  46. * Smartreflex error config register is special as it contains
  47. * certain status bits which if written a 1 into means a clear
  48. * of those bits. So in order to make sure no accidental write of
  49. * 1 happens to those status bits, do a clear of them in the read
  50. * value. This mean this API doesn't rewrite values in these bits
  51. * if they are currently set, but does allow the caller to write
  52. * those bits.
  53. */
  54. if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1)
  55. mask |= ERRCONFIG_STATUS_V1_MASK;
  56. else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2)
  57. mask |= ERRCONFIG_VPBOUNDINTST_V2;
  58. reg_val = __raw_readl(sr->base + offset);
  59. reg_val &= ~mask;
  60. value &= mask;
  61. reg_val |= value;
  62. __raw_writel(reg_val, (sr->base + offset));
  63. }
  64. static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset)
  65. {
  66. return __raw_readl(sr->base + offset);
  67. }
  68. static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)
  69. {
  70. struct omap_sr *sr_info;
  71. if (!voltdm) {
  72. pr_err("%s: Null voltage domain passed!\n", __func__);
  73. return ERR_PTR(-EINVAL);
  74. }
  75. list_for_each_entry(sr_info, &sr_list, node) {
  76. if (voltdm == sr_info->voltdm)
  77. return sr_info;
  78. }
  79. return ERR_PTR(-ENODATA);
  80. }
  81. static irqreturn_t sr_interrupt(int irq, void *data)
  82. {
  83. struct omap_sr *sr_info = data;
  84. u32 status = 0;
  85. switch (sr_info->ip_type) {
  86. case SR_TYPE_V1:
  87. /* Read the status bits */
  88. status = sr_read_reg(sr_info, ERRCONFIG_V1);
  89. /* Clear them by writing back */
  90. sr_write_reg(sr_info, ERRCONFIG_V1, status);
  91. break;
  92. case SR_TYPE_V2:
  93. /* Read the status bits */
  94. status = sr_read_reg(sr_info, IRQSTATUS);
  95. /* Clear them by writing back */
  96. sr_write_reg(sr_info, IRQSTATUS, status);
  97. break;
  98. default:
  99. dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n",
  100. sr_info->ip_type);
  101. return IRQ_NONE;
  102. }
  103. if (sr_class->notify)
  104. sr_class->notify(sr_info, status);
  105. return IRQ_HANDLED;
  106. }
  107. static void sr_set_clk_length(struct omap_sr *sr)
  108. {
  109. struct clk *fck;
  110. u32 fclk_speed;
  111. fck = clk_get(&sr->pdev->dev, "fck");
  112. if (IS_ERR(fck)) {
  113. dev_err(&sr->pdev->dev, "%s: unable to get fck for device %s\n",
  114. __func__, dev_name(&sr->pdev->dev));
  115. return;
  116. }
  117. fclk_speed = clk_get_rate(fck);
  118. clk_put(fck);
  119. switch (fclk_speed) {
  120. case 12000000:
  121. sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK;
  122. break;
  123. case 13000000:
  124. sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK;
  125. break;
  126. case 19200000:
  127. sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK;
  128. break;
  129. case 26000000:
  130. sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK;
  131. break;
  132. case 38400000:
  133. sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK;
  134. break;
  135. default:
  136. dev_err(&sr->pdev->dev, "%s: Invalid fclk rate: %d\n",
  137. __func__, fclk_speed);
  138. break;
  139. }
  140. }
  141. static void sr_start_vddautocomp(struct omap_sr *sr)
  142. {
  143. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  144. dev_warn(&sr->pdev->dev,
  145. "%s: smartreflex class driver not registered\n",
  146. __func__);
  147. return;
  148. }
  149. if (!sr_class->enable(sr))
  150. sr->autocomp_active = true;
  151. }
  152. static void sr_stop_vddautocomp(struct omap_sr *sr)
  153. {
  154. if (!sr_class || !(sr_class->disable)) {
  155. dev_warn(&sr->pdev->dev,
  156. "%s: smartreflex class driver not registered\n",
  157. __func__);
  158. return;
  159. }
  160. if (sr->autocomp_active) {
  161. sr_class->disable(sr, 1);
  162. sr->autocomp_active = false;
  163. }
  164. }
  165. /*
  166. * This function handles the intializations which have to be done
  167. * only when both sr device and class driver regiter has
  168. * completed. This will be attempted to be called from both sr class
  169. * driver register and sr device intializtion API's. Only one call
  170. * will ultimately succeed.
  171. *
  172. * Currently this function registers interrupt handler for a particular SR
  173. * if smartreflex class driver is already registered and has
  174. * requested for interrupts and the SR interrupt line in present.
  175. */
  176. static int sr_late_init(struct omap_sr *sr_info)
  177. {
  178. struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data;
  179. int ret = 0;
  180. if (sr_class->notify && sr_class->notify_flags && sr_info->irq) {
  181. ret = devm_request_irq(&sr_info->pdev->dev, sr_info->irq,
  182. sr_interrupt, 0, sr_info->name, sr_info);
  183. if (ret)
  184. goto error;
  185. disable_irq(sr_info->irq);
  186. }
  187. if (pdata && pdata->enable_on_init)
  188. sr_start_vddautocomp(sr_info);
  189. return ret;
  190. error:
  191. list_del(&sr_info->node);
  192. dev_err(&sr_info->pdev->dev, "%s: ERROR in registering"
  193. "interrupt handler. Smartreflex will"
  194. "not function as desired\n", __func__);
  195. return ret;
  196. }
  197. static void sr_v1_disable(struct omap_sr *sr)
  198. {
  199. int timeout = 0;
  200. int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST |
  201. ERRCONFIG_MCUBOUNDINTST;
  202. /* Enable MCUDisableAcknowledge interrupt */
  203. sr_modify_reg(sr, ERRCONFIG_V1,
  204. ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN);
  205. /* SRCONFIG - disable SR */
  206. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  207. /* Disable all other SR interrupts and clear the status as needed */
  208. if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1)
  209. errconf_val |= ERRCONFIG_VPBOUNDINTST_V1;
  210. sr_modify_reg(sr, ERRCONFIG_V1,
  211. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  212. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1),
  213. errconf_val);
  214. /*
  215. * Wait for SR to be disabled.
  216. * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us.
  217. */
  218. sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) &
  219. ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT,
  220. timeout);
  221. if (timeout >= SR_DISABLE_TIMEOUT)
  222. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  223. __func__);
  224. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  225. sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN,
  226. ERRCONFIG_MCUDISACKINTST);
  227. }
  228. static void sr_v2_disable(struct omap_sr *sr)
  229. {
  230. int timeout = 0;
  231. /* Enable MCUDisableAcknowledge interrupt */
  232. sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT);
  233. /* SRCONFIG - disable SR */
  234. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0);
  235. /*
  236. * Disable all other SR interrupts and clear the status
  237. * write to status register ONLY on need basis - only if status
  238. * is set.
  239. */
  240. if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2)
  241. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  242. ERRCONFIG_VPBOUNDINTST_V2);
  243. else
  244. sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2,
  245. 0x0);
  246. sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT |
  247. IRQENABLE_MCUVALIDINT |
  248. IRQENABLE_MCUBOUNDSINT));
  249. sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT |
  250. IRQSTATUS_MCVALIDINT |
  251. IRQSTATUS_MCBOUNDSINT));
  252. /*
  253. * Wait for SR to be disabled.
  254. * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us.
  255. */
  256. sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) &
  257. IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT,
  258. timeout);
  259. if (timeout >= SR_DISABLE_TIMEOUT)
  260. dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n",
  261. __func__);
  262. /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */
  263. sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT);
  264. sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT);
  265. }
  266. static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row(
  267. struct omap_sr *sr, u32 efuse_offs)
  268. {
  269. int i;
  270. if (!sr->nvalue_table) {
  271. dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n",
  272. __func__);
  273. return NULL;
  274. }
  275. for (i = 0; i < sr->nvalue_count; i++) {
  276. if (sr->nvalue_table[i].efuse_offs == efuse_offs)
  277. return &sr->nvalue_table[i];
  278. }
  279. return NULL;
  280. }
  281. /* Public Functions */
  282. /**
  283. * sr_configure_errgen() - Configures the SmartReflex to perform AVS using the
  284. * error generator module.
  285. * @sr: SR module to be configured.
  286. *
  287. * This API is to be called from the smartreflex class driver to
  288. * configure the error generator module inside the smartreflex module.
  289. * SR settings if using the ERROR module inside Smartreflex.
  290. * SR CLASS 3 by default uses only the ERROR module where as
  291. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  292. * module. Returns 0 on success and error value in case of failure.
  293. */
  294. int sr_configure_errgen(struct omap_sr *sr)
  295. {
  296. u32 sr_config, sr_errconfig, errconfig_offs;
  297. u32 vpboundint_en, vpboundint_st;
  298. u32 senp_en = 0, senn_en = 0;
  299. u8 senp_shift, senn_shift;
  300. if (!sr) {
  301. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  302. (void *)_RET_IP_);
  303. return -EINVAL;
  304. }
  305. if (!sr->clk_length)
  306. sr_set_clk_length(sr);
  307. senp_en = sr->senp_mod;
  308. senn_en = sr->senn_mod;
  309. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  310. SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN;
  311. switch (sr->ip_type) {
  312. case SR_TYPE_V1:
  313. sr_config |= SRCONFIG_DELAYCTRL;
  314. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  315. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  316. errconfig_offs = ERRCONFIG_V1;
  317. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  318. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  319. break;
  320. case SR_TYPE_V2:
  321. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  322. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  323. errconfig_offs = ERRCONFIG_V2;
  324. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  325. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  326. break;
  327. default:
  328. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  329. "module without specifying the ip\n", __func__);
  330. return -EINVAL;
  331. }
  332. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  333. sr_write_reg(sr, SRCONFIG, sr_config);
  334. sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) |
  335. (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) |
  336. (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT);
  337. sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK |
  338. SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK),
  339. sr_errconfig);
  340. /* Enabling the interrupts if the ERROR module is used */
  341. sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st),
  342. vpboundint_en);
  343. return 0;
  344. }
  345. /**
  346. * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component
  347. * @sr: SR module to be configured.
  348. *
  349. * This API is to be called from the smartreflex class driver to
  350. * disable the error generator module inside the smartreflex module.
  351. *
  352. * Returns 0 on success and error value in case of failure.
  353. */
  354. int sr_disable_errgen(struct omap_sr *sr)
  355. {
  356. u32 errconfig_offs;
  357. u32 vpboundint_en, vpboundint_st;
  358. if (!sr) {
  359. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  360. (void *)_RET_IP_);
  361. return -EINVAL;
  362. }
  363. switch (sr->ip_type) {
  364. case SR_TYPE_V1:
  365. errconfig_offs = ERRCONFIG_V1;
  366. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1;
  367. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1;
  368. break;
  369. case SR_TYPE_V2:
  370. errconfig_offs = ERRCONFIG_V2;
  371. vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2;
  372. vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2;
  373. break;
  374. default:
  375. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  376. "module without specifying the ip\n", __func__);
  377. return -EINVAL;
  378. }
  379. /* Disable the Sensor and errorgen */
  380. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0);
  381. /*
  382. * Disable the interrupts of ERROR module
  383. * NOTE: modify is a read, modify,write - an implicit OCP barrier
  384. * which is required is present here - sequencing is critical
  385. * at this point (after errgen is disabled, vpboundint disable)
  386. */
  387. sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0);
  388. return 0;
  389. }
  390. /**
  391. * sr_configure_minmax() - Configures the SmartReflex to perform AVS using the
  392. * minmaxavg module.
  393. * @sr: SR module to be configured.
  394. *
  395. * This API is to be called from the smartreflex class driver to
  396. * configure the minmaxavg module inside the smartreflex module.
  397. * SR settings if using the ERROR module inside Smartreflex.
  398. * SR CLASS 3 by default uses only the ERROR module where as
  399. * SR CLASS 2 can choose between ERROR module and MINMAXAVG
  400. * module. Returns 0 on success and error value in case of failure.
  401. */
  402. int sr_configure_minmax(struct omap_sr *sr)
  403. {
  404. u32 sr_config, sr_avgwt;
  405. u32 senp_en = 0, senn_en = 0;
  406. u8 senp_shift, senn_shift;
  407. if (!sr) {
  408. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  409. (void *)_RET_IP_);
  410. return -EINVAL;
  411. }
  412. if (!sr->clk_length)
  413. sr_set_clk_length(sr);
  414. senp_en = sr->senp_mod;
  415. senn_en = sr->senn_mod;
  416. sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) |
  417. SRCONFIG_SENENABLE |
  418. (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT);
  419. switch (sr->ip_type) {
  420. case SR_TYPE_V1:
  421. sr_config |= SRCONFIG_DELAYCTRL;
  422. senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT;
  423. senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT;
  424. break;
  425. case SR_TYPE_V2:
  426. senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT;
  427. senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT;
  428. break;
  429. default:
  430. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  431. "module without specifying the ip\n", __func__);
  432. return -EINVAL;
  433. }
  434. sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift));
  435. sr_write_reg(sr, SRCONFIG, sr_config);
  436. sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) |
  437. (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT);
  438. sr_write_reg(sr, AVGWEIGHT, sr_avgwt);
  439. /*
  440. * Enabling the interrupts if MINMAXAVG module is used.
  441. * TODO: check if all the interrupts are mandatory
  442. */
  443. switch (sr->ip_type) {
  444. case SR_TYPE_V1:
  445. sr_modify_reg(sr, ERRCONFIG_V1,
  446. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN |
  447. ERRCONFIG_MCUBOUNDINTEN),
  448. (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST |
  449. ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST |
  450. ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST));
  451. break;
  452. case SR_TYPE_V2:
  453. sr_write_reg(sr, IRQSTATUS,
  454. IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT |
  455. IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT);
  456. sr_write_reg(sr, IRQENABLE_SET,
  457. IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT |
  458. IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT);
  459. break;
  460. default:
  461. dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex"
  462. "module without specifying the ip\n", __func__);
  463. return -EINVAL;
  464. }
  465. return 0;
  466. }
  467. /**
  468. * sr_enable() - Enables the smartreflex module.
  469. * @sr: pointer to which the SR module to be configured belongs to.
  470. * @volt: The voltage at which the Voltage domain associated with
  471. * the smartreflex module is operating at.
  472. * This is required only to program the correct Ntarget value.
  473. *
  474. * This API is to be called from the smartreflex class driver to
  475. * enable a smartreflex module. Returns 0 on success. Returns error
  476. * value if the voltage passed is wrong or if ntarget value is wrong.
  477. */
  478. int sr_enable(struct omap_sr *sr, unsigned long volt)
  479. {
  480. struct omap_volt_data *volt_data;
  481. struct omap_sr_nvalue_table *nvalue_row;
  482. int ret;
  483. if (!sr) {
  484. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  485. (void *)_RET_IP_);
  486. return -EINVAL;
  487. }
  488. volt_data = omap_voltage_get_voltdata(sr->voltdm, volt);
  489. if (IS_ERR(volt_data)) {
  490. dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table"
  491. "for nominal voltage %ld\n", __func__, volt);
  492. return PTR_ERR(volt_data);
  493. }
  494. nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs);
  495. if (!nvalue_row) {
  496. dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n",
  497. __func__, volt);
  498. return -ENODATA;
  499. }
  500. /* errminlimit is opp dependent and hence linked to voltage */
  501. sr->err_minlimit = nvalue_row->errminlimit;
  502. pm_runtime_get_sync(&sr->pdev->dev);
  503. /* Check if SR is already enabled. If yes do nothing */
  504. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE)
  505. return 0;
  506. /* Configure SR */
  507. ret = sr_class->configure(sr);
  508. if (ret)
  509. return ret;
  510. sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue);
  511. /* SRCONFIG - enable SR */
  512. sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE);
  513. return 0;
  514. }
  515. /**
  516. * sr_disable() - Disables the smartreflex module.
  517. * @sr: pointer to which the SR module to be configured belongs to.
  518. *
  519. * This API is to be called from the smartreflex class driver to
  520. * disable a smartreflex module.
  521. */
  522. void sr_disable(struct omap_sr *sr)
  523. {
  524. if (!sr) {
  525. pr_warn("%s: NULL omap_sr from %pF\n", __func__,
  526. (void *)_RET_IP_);
  527. return;
  528. }
  529. /* Check if SR clocks are already disabled. If yes do nothing */
  530. if (pm_runtime_suspended(&sr->pdev->dev))
  531. return;
  532. /*
  533. * Disable SR if only it is indeed enabled. Else just
  534. * disable the clocks.
  535. */
  536. if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) {
  537. switch (sr->ip_type) {
  538. case SR_TYPE_V1:
  539. sr_v1_disable(sr);
  540. break;
  541. case SR_TYPE_V2:
  542. sr_v2_disable(sr);
  543. break;
  544. default:
  545. dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n",
  546. sr->ip_type);
  547. }
  548. }
  549. pm_runtime_put_sync_suspend(&sr->pdev->dev);
  550. }
  551. /**
  552. * sr_register_class() - API to register a smartreflex class parameters.
  553. * @class_data: The structure containing various sr class specific data.
  554. *
  555. * This API is to be called by the smartreflex class driver to register itself
  556. * with the smartreflex driver during init. Returns 0 on success else the
  557. * error value.
  558. */
  559. int sr_register_class(struct omap_sr_class_data *class_data)
  560. {
  561. struct omap_sr *sr_info;
  562. if (!class_data) {
  563. pr_warning("%s:, Smartreflex class data passed is NULL\n",
  564. __func__);
  565. return -EINVAL;
  566. }
  567. if (sr_class) {
  568. pr_warning("%s: Smartreflex class driver already registered\n",
  569. __func__);
  570. return -EBUSY;
  571. }
  572. sr_class = class_data;
  573. /*
  574. * Call into late init to do intializations that require
  575. * both sr driver and sr class driver to be initiallized.
  576. */
  577. list_for_each_entry(sr_info, &sr_list, node)
  578. sr_late_init(sr_info);
  579. return 0;
  580. }
  581. /**
  582. * omap_sr_enable() - API to enable SR clocks and to call into the
  583. * registered smartreflex class enable API.
  584. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  585. *
  586. * This API is to be called from the kernel in order to enable
  587. * a particular smartreflex module. This API will do the initial
  588. * configurations to turn on the smartreflex module and in turn call
  589. * into the registered smartreflex class enable API.
  590. */
  591. void omap_sr_enable(struct voltagedomain *voltdm)
  592. {
  593. struct omap_sr *sr = _sr_lookup(voltdm);
  594. if (IS_ERR(sr)) {
  595. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  596. return;
  597. }
  598. if (!sr->autocomp_active)
  599. return;
  600. if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {
  601. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  602. "registered\n", __func__);
  603. return;
  604. }
  605. sr_class->enable(sr);
  606. }
  607. /**
  608. * omap_sr_disable() - API to disable SR without resetting the voltage
  609. * processor voltage
  610. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  611. *
  612. * This API is to be called from the kernel in order to disable
  613. * a particular smartreflex module. This API will in turn call
  614. * into the registered smartreflex class disable API. This API will tell
  615. * the smartreflex class disable not to reset the VP voltage after
  616. * disabling smartreflex.
  617. */
  618. void omap_sr_disable(struct voltagedomain *voltdm)
  619. {
  620. struct omap_sr *sr = _sr_lookup(voltdm);
  621. if (IS_ERR(sr)) {
  622. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  623. return;
  624. }
  625. if (!sr->autocomp_active)
  626. return;
  627. if (!sr_class || !(sr_class->disable)) {
  628. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  629. "registered\n", __func__);
  630. return;
  631. }
  632. sr_class->disable(sr, 0);
  633. }
  634. /**
  635. * omap_sr_disable_reset_volt() - API to disable SR and reset the
  636. * voltage processor voltage
  637. * @voltdm: VDD pointer to which the SR module to be configured belongs to.
  638. *
  639. * This API is to be called from the kernel in order to disable
  640. * a particular smartreflex module. This API will in turn call
  641. * into the registered smartreflex class disable API. This API will tell
  642. * the smartreflex class disable to reset the VP voltage after
  643. * disabling smartreflex.
  644. */
  645. void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)
  646. {
  647. struct omap_sr *sr = _sr_lookup(voltdm);
  648. if (IS_ERR(sr)) {
  649. pr_warning("%s: omap_sr struct for voltdm not found\n", __func__);
  650. return;
  651. }
  652. if (!sr->autocomp_active)
  653. return;
  654. if (!sr_class || !(sr_class->disable)) {
  655. dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not"
  656. "registered\n", __func__);
  657. return;
  658. }
  659. sr_class->disable(sr, 1);
  660. }
  661. /**
  662. * omap_sr_register_pmic() - API to register pmic specific info.
  663. * @pmic_data: The structure containing pmic specific data.
  664. *
  665. * This API is to be called from the PMIC specific code to register with
  666. * smartreflex driver pmic specific info. Currently the only info required
  667. * is the smartreflex init on the PMIC side.
  668. */
  669. void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data)
  670. {
  671. if (!pmic_data) {
  672. pr_warning("%s: Trying to register NULL PMIC data structure"
  673. "with smartreflex\n", __func__);
  674. return;
  675. }
  676. sr_pmic_data = pmic_data;
  677. }
  678. /* PM Debug FS entries to enable and disable smartreflex. */
  679. static int omap_sr_autocomp_show(void *data, u64 *val)
  680. {
  681. struct omap_sr *sr_info = data;
  682. if (!sr_info) {
  683. pr_warning("%s: omap_sr struct not found\n", __func__);
  684. return -EINVAL;
  685. }
  686. *val = sr_info->autocomp_active;
  687. return 0;
  688. }
  689. static int omap_sr_autocomp_store(void *data, u64 val)
  690. {
  691. struct omap_sr *sr_info = data;
  692. if (!sr_info) {
  693. pr_warning("%s: omap_sr struct not found\n", __func__);
  694. return -EINVAL;
  695. }
  696. /* Sanity check */
  697. if (val > 1) {
  698. pr_warning("%s: Invalid argument %lld\n", __func__, val);
  699. return -EINVAL;
  700. }
  701. /* control enable/disable only if there is a delta in value */
  702. if (sr_info->autocomp_active != val) {
  703. if (!val)
  704. sr_stop_vddautocomp(sr_info);
  705. else
  706. sr_start_vddautocomp(sr_info);
  707. }
  708. return 0;
  709. }
  710. DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show,
  711. omap_sr_autocomp_store, "%llu\n");
  712. static int __init omap_sr_probe(struct platform_device *pdev)
  713. {
  714. struct omap_sr *sr_info;
  715. struct omap_sr_data *pdata = pdev->dev.platform_data;
  716. struct resource *mem, *irq;
  717. struct dentry *nvalue_dir;
  718. int i, ret = 0;
  719. sr_info = devm_kzalloc(&pdev->dev, sizeof(struct omap_sr), GFP_KERNEL);
  720. if (!sr_info) {
  721. dev_err(&pdev->dev, "%s: unable to allocate sr_info\n",
  722. __func__);
  723. return -ENOMEM;
  724. }
  725. sr_info->name = devm_kzalloc(&pdev->dev,
  726. SMARTREFLEX_NAME_LEN, GFP_KERNEL);
  727. if (!sr_info->name) {
  728. dev_err(&pdev->dev, "%s: unable to allocate SR instance name\n",
  729. __func__);
  730. return -ENOMEM;
  731. }
  732. platform_set_drvdata(pdev, sr_info);
  733. if (!pdata) {
  734. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  735. return -EINVAL;
  736. }
  737. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  738. sr_info->base = devm_ioremap_resource(&pdev->dev, mem);
  739. if (IS_ERR(sr_info->base)) {
  740. dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
  741. return PTR_ERR(sr_info->base);
  742. }
  743. irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  744. pm_runtime_enable(&pdev->dev);
  745. pm_runtime_irq_safe(&pdev->dev);
  746. snprintf(sr_info->name, SMARTREFLEX_NAME_LEN, "%s", pdata->name);
  747. sr_info->pdev = pdev;
  748. sr_info->srid = pdev->id;
  749. sr_info->voltdm = pdata->voltdm;
  750. sr_info->nvalue_table = pdata->nvalue_table;
  751. sr_info->nvalue_count = pdata->nvalue_count;
  752. sr_info->senn_mod = pdata->senn_mod;
  753. sr_info->senp_mod = pdata->senp_mod;
  754. sr_info->err_weight = pdata->err_weight;
  755. sr_info->err_maxlimit = pdata->err_maxlimit;
  756. sr_info->accum_data = pdata->accum_data;
  757. sr_info->senn_avgweight = pdata->senn_avgweight;
  758. sr_info->senp_avgweight = pdata->senp_avgweight;
  759. sr_info->autocomp_active = false;
  760. sr_info->ip_type = pdata->ip_type;
  761. if (irq)
  762. sr_info->irq = irq->start;
  763. sr_set_clk_length(sr_info);
  764. list_add(&sr_info->node, &sr_list);
  765. /*
  766. * Call into late init to do intializations that require
  767. * both sr driver and sr class driver to be initiallized.
  768. */
  769. if (sr_class) {
  770. ret = sr_late_init(sr_info);
  771. if (ret) {
  772. pr_warning("%s: Error in SR late init\n", __func__);
  773. goto err_list_del;
  774. }
  775. }
  776. dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__);
  777. if (!sr_dbg_dir) {
  778. sr_dbg_dir = debugfs_create_dir("smartreflex", NULL);
  779. if (IS_ERR_OR_NULL(sr_dbg_dir)) {
  780. ret = PTR_ERR(sr_dbg_dir);
  781. pr_err("%s:sr debugfs dir creation failed(%d)\n",
  782. __func__, ret);
  783. goto err_list_del;
  784. }
  785. }
  786. sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir);
  787. if (IS_ERR_OR_NULL(sr_info->dbg_dir)) {
  788. dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
  789. __func__);
  790. ret = PTR_ERR(sr_info->dbg_dir);
  791. goto err_debugfs;
  792. }
  793. (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
  794. sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops);
  795. (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir,
  796. &sr_info->err_weight);
  797. (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir,
  798. &sr_info->err_maxlimit);
  799. nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir);
  800. if (IS_ERR_OR_NULL(nvalue_dir)) {
  801. dev_err(&pdev->dev, "%s: Unable to create debugfs directory"
  802. "for n-values\n", __func__);
  803. ret = PTR_ERR(nvalue_dir);
  804. goto err_debugfs;
  805. }
  806. if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) {
  807. dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n",
  808. __func__, sr_info->name);
  809. ret = -ENODATA;
  810. goto err_debugfs;
  811. }
  812. for (i = 0; i < sr_info->nvalue_count; i++) {
  813. char name[NVALUE_NAME_LEN + 1];
  814. snprintf(name, sizeof(name), "volt_%lu",
  815. sr_info->nvalue_table[i].volt_nominal);
  816. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  817. &(sr_info->nvalue_table[i].nvalue));
  818. snprintf(name, sizeof(name), "errminlimit_%lu",
  819. sr_info->nvalue_table[i].volt_nominal);
  820. (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir,
  821. &(sr_info->nvalue_table[i].errminlimit));
  822. }
  823. return ret;
  824. err_debugfs:
  825. debugfs_remove_recursive(sr_info->dbg_dir);
  826. err_list_del:
  827. list_del(&sr_info->node);
  828. return ret;
  829. }
  830. static int omap_sr_remove(struct platform_device *pdev)
  831. {
  832. struct omap_sr_data *pdata = pdev->dev.platform_data;
  833. struct omap_sr *sr_info;
  834. if (!pdata) {
  835. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  836. return -EINVAL;
  837. }
  838. sr_info = _sr_lookup(pdata->voltdm);
  839. if (IS_ERR(sr_info)) {
  840. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  841. __func__);
  842. return PTR_ERR(sr_info);
  843. }
  844. if (sr_info->autocomp_active)
  845. sr_stop_vddautocomp(sr_info);
  846. if (sr_info->dbg_dir)
  847. debugfs_remove_recursive(sr_info->dbg_dir);
  848. pm_runtime_disable(&pdev->dev);
  849. list_del(&sr_info->node);
  850. return 0;
  851. }
  852. static void omap_sr_shutdown(struct platform_device *pdev)
  853. {
  854. struct omap_sr_data *pdata = pdev->dev.platform_data;
  855. struct omap_sr *sr_info;
  856. if (!pdata) {
  857. dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
  858. return;
  859. }
  860. sr_info = _sr_lookup(pdata->voltdm);
  861. if (IS_ERR(sr_info)) {
  862. dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
  863. __func__);
  864. return;
  865. }
  866. if (sr_info->autocomp_active)
  867. sr_stop_vddautocomp(sr_info);
  868. return;
  869. }
  870. static struct platform_driver smartreflex_driver = {
  871. .remove = omap_sr_remove,
  872. .shutdown = omap_sr_shutdown,
  873. .driver = {
  874. .name = DRIVER_NAME,
  875. },
  876. };
  877. static int __init sr_init(void)
  878. {
  879. int ret = 0;
  880. /*
  881. * sr_init is a late init. If by then a pmic specific API is not
  882. * registered either there is no need for anything to be done on
  883. * the PMIC side or somebody has forgotten to register a PMIC
  884. * handler. Warn for the second condition.
  885. */
  886. if (sr_pmic_data && sr_pmic_data->sr_pmic_init)
  887. sr_pmic_data->sr_pmic_init();
  888. else
  889. pr_warning("%s: No PMIC hook to init smartreflex\n", __func__);
  890. ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe);
  891. if (ret) {
  892. pr_err("%s: platform driver register failed for SR\n",
  893. __func__);
  894. return ret;
  895. }
  896. return 0;
  897. }
  898. late_initcall(sr_init);
  899. static void __exit sr_exit(void)
  900. {
  901. platform_driver_unregister(&smartreflex_driver);
  902. }
  903. module_exit(sr_exit);
  904. MODULE_DESCRIPTION("OMAP Smartreflex Driver");
  905. MODULE_LICENSE("GPL");
  906. MODULE_ALIAS("platform:" DRIVER_NAME);
  907. MODULE_AUTHOR("Texas Instruments Inc");