pinctrl-exynos.h 2.9 KB

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  1. /*
  2. * Exynos specific definitions for Samsung pinctrl and gpiolib driver.
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2012 Linaro Ltd
  7. * http://www.linaro.org
  8. *
  9. * This file contains the Exynos specific definitions for the Samsung
  10. * pinctrl/gpiolib interface drivers.
  11. *
  12. * Author: Thomas Abraham <thomas.ab@samsung.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. */
  19. /* External GPIO and wakeup interrupt related definitions */
  20. #define EXYNOS_GPIO_ECON_OFFSET 0x700
  21. #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
  22. #define EXYNOS_GPIO_EMASK_OFFSET 0x900
  23. #define EXYNOS_GPIO_EPEND_OFFSET 0xA00
  24. #define EXYNOS_WKUP_ECON_OFFSET 0xE00
  25. #define EXYNOS_WKUP_EMASK_OFFSET 0xF00
  26. #define EXYNOS_WKUP_EPEND_OFFSET 0xF40
  27. #define EXYNOS_SVC_OFFSET 0xB08
  28. #define EXYNOS_EINT_FUNC 0xF
  29. /* helpers to access interrupt service register */
  30. #define EXYNOS_SVC_GROUP_SHIFT 3
  31. #define EXYNOS_SVC_GROUP_MASK 0x1f
  32. #define EXYNOS_SVC_NUM_MASK 7
  33. #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \
  34. EXYNOS_SVC_GROUP_MASK)
  35. /* Exynos specific external interrupt trigger types */
  36. #define EXYNOS_EINT_LEVEL_LOW 0
  37. #define EXYNOS_EINT_LEVEL_HIGH 1
  38. #define EXYNOS_EINT_EDGE_FALLING 2
  39. #define EXYNOS_EINT_EDGE_RISING 3
  40. #define EXYNOS_EINT_EDGE_BOTH 4
  41. #define EXYNOS_EINT_CON_MASK 0xF
  42. #define EXYNOS_EINT_CON_LEN 4
  43. #define EXYNOS_EINT_MAX_PER_BANK 8
  44. #define EXYNOS_EINT_NR_WKUP_EINT
  45. #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
  46. { \
  47. .type = &bank_type_off, \
  48. .pctl_offset = reg, \
  49. .nr_pins = pins, \
  50. .eint_type = EINT_TYPE_NONE, \
  51. .name = id \
  52. }
  53. #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
  54. { \
  55. .type = &bank_type_off, \
  56. .pctl_offset = reg, \
  57. .nr_pins = pins, \
  58. .eint_type = EINT_TYPE_GPIO, \
  59. .eint_offset = offs, \
  60. .name = id \
  61. }
  62. #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
  63. { \
  64. .type = &bank_type_alive, \
  65. .pctl_offset = reg, \
  66. .nr_pins = pins, \
  67. .eint_type = EINT_TYPE_WKUP, \
  68. .eint_offset = offs, \
  69. .name = id \
  70. }
  71. /**
  72. * struct exynos_weint_data: irq specific data for all the wakeup interrupts
  73. * generated by the external wakeup interrupt controller.
  74. * @irq: interrupt number within the domain.
  75. * @bank: bank responsible for this interrupt
  76. */
  77. struct exynos_weint_data {
  78. unsigned int irq;
  79. struct samsung_pin_bank *bank;
  80. };
  81. /**
  82. * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
  83. * generated by the external wakeup interrupt controller.
  84. * @nr_banks: count of banks being part of the mux
  85. * @banks: array of banks being part of the mux
  86. */
  87. struct exynos_muxed_weint_data {
  88. unsigned int nr_banks;
  89. struct samsung_pin_bank *banks[];
  90. };