proc.c 9.1 KB

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  1. /*
  2. * Procfs interface for the PCI bus.
  3. *
  4. * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/init.h>
  7. #include <linux/pci.h>
  8. #include <linux/slab.h>
  9. #include <linux/module.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/seq_file.h>
  12. #include <linux/capability.h>
  13. #include <asm/uaccess.h>
  14. #include <asm/byteorder.h>
  15. #include "pci.h"
  16. static int proc_initialized; /* = 0 */
  17. static loff_t
  18. proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
  19. {
  20. struct pci_dev *dev = PDE_DATA(file_inode(file));
  21. return fixed_size_llseek(file, off, whence, dev->cfg_size);
  22. }
  23. static ssize_t
  24. proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
  25. {
  26. struct pci_dev *dev = PDE_DATA(file_inode(file));
  27. unsigned int pos = *ppos;
  28. unsigned int cnt, size;
  29. /*
  30. * Normal users can read only the standardized portion of the
  31. * configuration space as several chips lock up when trying to read
  32. * undefined locations (think of Intel PIIX4 as a typical example).
  33. */
  34. if (capable(CAP_SYS_ADMIN))
  35. size = dev->cfg_size;
  36. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  37. size = 128;
  38. else
  39. size = 64;
  40. if (pos >= size)
  41. return 0;
  42. if (nbytes >= size)
  43. nbytes = size;
  44. if (pos + nbytes > size)
  45. nbytes = size - pos;
  46. cnt = nbytes;
  47. if (!access_ok(VERIFY_WRITE, buf, cnt))
  48. return -EINVAL;
  49. pci_config_pm_runtime_get(dev);
  50. if ((pos & 1) && cnt) {
  51. unsigned char val;
  52. pci_user_read_config_byte(dev, pos, &val);
  53. __put_user(val, buf);
  54. buf++;
  55. pos++;
  56. cnt--;
  57. }
  58. if ((pos & 3) && cnt > 2) {
  59. unsigned short val;
  60. pci_user_read_config_word(dev, pos, &val);
  61. __put_user(cpu_to_le16(val), (__le16 __user *) buf);
  62. buf += 2;
  63. pos += 2;
  64. cnt -= 2;
  65. }
  66. while (cnt >= 4) {
  67. unsigned int val;
  68. pci_user_read_config_dword(dev, pos, &val);
  69. __put_user(cpu_to_le32(val), (__le32 __user *) buf);
  70. buf += 4;
  71. pos += 4;
  72. cnt -= 4;
  73. }
  74. if (cnt >= 2) {
  75. unsigned short val;
  76. pci_user_read_config_word(dev, pos, &val);
  77. __put_user(cpu_to_le16(val), (__le16 __user *) buf);
  78. buf += 2;
  79. pos += 2;
  80. cnt -= 2;
  81. }
  82. if (cnt) {
  83. unsigned char val;
  84. pci_user_read_config_byte(dev, pos, &val);
  85. __put_user(val, buf);
  86. buf++;
  87. pos++;
  88. cnt--;
  89. }
  90. pci_config_pm_runtime_put(dev);
  91. *ppos = pos;
  92. return nbytes;
  93. }
  94. static ssize_t
  95. proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
  96. {
  97. struct inode *ino = file_inode(file);
  98. struct pci_dev *dev = PDE_DATA(ino);
  99. int pos = *ppos;
  100. int size = dev->cfg_size;
  101. int cnt;
  102. if (pos >= size)
  103. return 0;
  104. if (nbytes >= size)
  105. nbytes = size;
  106. if (pos + nbytes > size)
  107. nbytes = size - pos;
  108. cnt = nbytes;
  109. if (!access_ok(VERIFY_READ, buf, cnt))
  110. return -EINVAL;
  111. pci_config_pm_runtime_get(dev);
  112. if ((pos & 1) && cnt) {
  113. unsigned char val;
  114. __get_user(val, buf);
  115. pci_user_write_config_byte(dev, pos, val);
  116. buf++;
  117. pos++;
  118. cnt--;
  119. }
  120. if ((pos & 3) && cnt > 2) {
  121. __le16 val;
  122. __get_user(val, (__le16 __user *) buf);
  123. pci_user_write_config_word(dev, pos, le16_to_cpu(val));
  124. buf += 2;
  125. pos += 2;
  126. cnt -= 2;
  127. }
  128. while (cnt >= 4) {
  129. __le32 val;
  130. __get_user(val, (__le32 __user *) buf);
  131. pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
  132. buf += 4;
  133. pos += 4;
  134. cnt -= 4;
  135. }
  136. if (cnt >= 2) {
  137. __le16 val;
  138. __get_user(val, (__le16 __user *) buf);
  139. pci_user_write_config_word(dev, pos, le16_to_cpu(val));
  140. buf += 2;
  141. pos += 2;
  142. cnt -= 2;
  143. }
  144. if (cnt) {
  145. unsigned char val;
  146. __get_user(val, buf);
  147. pci_user_write_config_byte(dev, pos, val);
  148. buf++;
  149. pos++;
  150. cnt--;
  151. }
  152. pci_config_pm_runtime_put(dev);
  153. *ppos = pos;
  154. i_size_write(ino, dev->cfg_size);
  155. return nbytes;
  156. }
  157. struct pci_filp_private {
  158. enum pci_mmap_state mmap_state;
  159. int write_combine;
  160. };
  161. static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
  162. unsigned long arg)
  163. {
  164. struct pci_dev *dev = PDE_DATA(file_inode(file));
  165. #ifdef HAVE_PCI_MMAP
  166. struct pci_filp_private *fpriv = file->private_data;
  167. #endif /* HAVE_PCI_MMAP */
  168. int ret = 0;
  169. switch (cmd) {
  170. case PCIIOC_CONTROLLER:
  171. ret = pci_domain_nr(dev->bus);
  172. break;
  173. #ifdef HAVE_PCI_MMAP
  174. case PCIIOC_MMAP_IS_IO:
  175. fpriv->mmap_state = pci_mmap_io;
  176. break;
  177. case PCIIOC_MMAP_IS_MEM:
  178. fpriv->mmap_state = pci_mmap_mem;
  179. break;
  180. case PCIIOC_WRITE_COMBINE:
  181. if (arg)
  182. fpriv->write_combine = 1;
  183. else
  184. fpriv->write_combine = 0;
  185. break;
  186. #endif /* HAVE_PCI_MMAP */
  187. default:
  188. ret = -EINVAL;
  189. break;
  190. };
  191. return ret;
  192. }
  193. #ifdef HAVE_PCI_MMAP
  194. static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
  195. {
  196. struct pci_dev *dev = PDE_DATA(file_inode(file));
  197. struct pci_filp_private *fpriv = file->private_data;
  198. int i, ret;
  199. if (!capable(CAP_SYS_RAWIO))
  200. return -EPERM;
  201. /* Make sure the caller is mapping a real resource for this device */
  202. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  203. if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
  204. break;
  205. }
  206. if (i >= PCI_ROM_RESOURCE)
  207. return -ENODEV;
  208. ret = pci_mmap_page_range(dev, vma,
  209. fpriv->mmap_state,
  210. fpriv->write_combine);
  211. if (ret < 0)
  212. return ret;
  213. return 0;
  214. }
  215. static int proc_bus_pci_open(struct inode *inode, struct file *file)
  216. {
  217. struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
  218. if (!fpriv)
  219. return -ENOMEM;
  220. fpriv->mmap_state = pci_mmap_io;
  221. fpriv->write_combine = 0;
  222. file->private_data = fpriv;
  223. return 0;
  224. }
  225. static int proc_bus_pci_release(struct inode *inode, struct file *file)
  226. {
  227. kfree(file->private_data);
  228. file->private_data = NULL;
  229. return 0;
  230. }
  231. #endif /* HAVE_PCI_MMAP */
  232. static const struct file_operations proc_bus_pci_operations = {
  233. .owner = THIS_MODULE,
  234. .llseek = proc_bus_pci_lseek,
  235. .read = proc_bus_pci_read,
  236. .write = proc_bus_pci_write,
  237. .unlocked_ioctl = proc_bus_pci_ioctl,
  238. .compat_ioctl = proc_bus_pci_ioctl,
  239. #ifdef HAVE_PCI_MMAP
  240. .open = proc_bus_pci_open,
  241. .release = proc_bus_pci_release,
  242. .mmap = proc_bus_pci_mmap,
  243. #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
  244. .get_unmapped_area = get_pci_unmapped_area,
  245. #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
  246. #endif /* HAVE_PCI_MMAP */
  247. };
  248. /* iterator */
  249. static void *pci_seq_start(struct seq_file *m, loff_t *pos)
  250. {
  251. struct pci_dev *dev = NULL;
  252. loff_t n = *pos;
  253. for_each_pci_dev(dev) {
  254. if (!n--)
  255. break;
  256. }
  257. return dev;
  258. }
  259. static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
  260. {
  261. struct pci_dev *dev = v;
  262. (*pos)++;
  263. dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
  264. return dev;
  265. }
  266. static void pci_seq_stop(struct seq_file *m, void *v)
  267. {
  268. if (v) {
  269. struct pci_dev *dev = v;
  270. pci_dev_put(dev);
  271. }
  272. }
  273. static int show_device(struct seq_file *m, void *v)
  274. {
  275. const struct pci_dev *dev = v;
  276. const struct pci_driver *drv;
  277. int i;
  278. if (dev == NULL)
  279. return 0;
  280. drv = pci_dev_driver(dev);
  281. seq_printf(m, "%02x%02x\t%04x%04x\t%x",
  282. dev->bus->number,
  283. dev->devfn,
  284. dev->vendor,
  285. dev->device,
  286. dev->irq);
  287. /* only print standard and ROM resources to preserve compatibility */
  288. for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
  289. resource_size_t start, end;
  290. pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
  291. seq_printf(m, "\t%16llx",
  292. (unsigned long long)(start |
  293. (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
  294. }
  295. for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
  296. resource_size_t start, end;
  297. pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
  298. seq_printf(m, "\t%16llx",
  299. dev->resource[i].start < dev->resource[i].end ?
  300. (unsigned long long)(end - start) + 1 : 0);
  301. }
  302. seq_putc(m, '\t');
  303. if (drv)
  304. seq_printf(m, "%s", drv->name);
  305. seq_putc(m, '\n');
  306. return 0;
  307. }
  308. static const struct seq_operations proc_bus_pci_devices_op = {
  309. .start = pci_seq_start,
  310. .next = pci_seq_next,
  311. .stop = pci_seq_stop,
  312. .show = show_device
  313. };
  314. static struct proc_dir_entry *proc_bus_pci_dir;
  315. int pci_proc_attach_device(struct pci_dev *dev)
  316. {
  317. struct pci_bus *bus = dev->bus;
  318. struct proc_dir_entry *e;
  319. char name[16];
  320. if (!proc_initialized)
  321. return -EACCES;
  322. if (!bus->procdir) {
  323. if (pci_proc_domain(bus)) {
  324. sprintf(name, "%04x:%02x", pci_domain_nr(bus),
  325. bus->number);
  326. } else {
  327. sprintf(name, "%02x", bus->number);
  328. }
  329. bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
  330. if (!bus->procdir)
  331. return -ENOMEM;
  332. }
  333. sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  334. e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
  335. &proc_bus_pci_operations, dev);
  336. if (!e)
  337. return -ENOMEM;
  338. proc_set_size(e, dev->cfg_size);
  339. dev->procent = e;
  340. return 0;
  341. }
  342. int pci_proc_detach_device(struct pci_dev *dev)
  343. {
  344. proc_remove(dev->procent);
  345. dev->procent = NULL;
  346. return 0;
  347. }
  348. int pci_proc_detach_bus(struct pci_bus* bus)
  349. {
  350. proc_remove(bus->procdir);
  351. return 0;
  352. }
  353. static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
  354. {
  355. return seq_open(file, &proc_bus_pci_devices_op);
  356. }
  357. static const struct file_operations proc_bus_pci_dev_operations = {
  358. .owner = THIS_MODULE,
  359. .open = proc_bus_pci_dev_open,
  360. .read = seq_read,
  361. .llseek = seq_lseek,
  362. .release = seq_release,
  363. };
  364. static int __init pci_proc_init(void)
  365. {
  366. struct pci_dev *dev = NULL;
  367. proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
  368. proc_create("devices", 0, proc_bus_pci_dir,
  369. &proc_bus_pci_dev_operations);
  370. proc_initialized = 1;
  371. for_each_pci_dev(dev)
  372. pci_proc_attach_device(dev);
  373. return 0;
  374. }
  375. device_initcall(pci_proc_init);