pci-sysfs.c 38 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include "pci.h"
  31. static int sysfs_initialized; /* = 0 */
  32. /* show configuration fields */
  33. #define pci_config_attr(field, format_string) \
  34. static ssize_t \
  35. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  36. { \
  37. struct pci_dev *pdev; \
  38. \
  39. pdev = to_pci_dev (dev); \
  40. return sprintf (buf, format_string, pdev->field); \
  41. }
  42. pci_config_attr(vendor, "0x%04x\n");
  43. pci_config_attr(device, "0x%04x\n");
  44. pci_config_attr(subsystem_vendor, "0x%04x\n");
  45. pci_config_attr(subsystem_device, "0x%04x\n");
  46. pci_config_attr(class, "0x%06x\n");
  47. pci_config_attr(irq, "%u\n");
  48. static ssize_t broken_parity_status_show(struct device *dev,
  49. struct device_attribute *attr,
  50. char *buf)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  54. }
  55. static ssize_t broken_parity_status_store(struct device *dev,
  56. struct device_attribute *attr,
  57. const char *buf, size_t count)
  58. {
  59. struct pci_dev *pdev = to_pci_dev(dev);
  60. unsigned long val;
  61. if (kstrtoul(buf, 0, &val) < 0)
  62. return -EINVAL;
  63. pdev->broken_parity_status = !!val;
  64. return count;
  65. }
  66. static ssize_t local_cpus_show(struct device *dev,
  67. struct device_attribute *attr, char *buf)
  68. {
  69. const struct cpumask *mask;
  70. int len;
  71. #ifdef CONFIG_NUMA
  72. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  73. cpumask_of_node(dev_to_node(dev));
  74. #else
  75. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  76. #endif
  77. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. static ssize_t local_cpulist_show(struct device *dev,
  83. struct device_attribute *attr, char *buf)
  84. {
  85. const struct cpumask *mask;
  86. int len;
  87. #ifdef CONFIG_NUMA
  88. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  89. cpumask_of_node(dev_to_node(dev));
  90. #else
  91. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  92. #endif
  93. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  94. buf[len++] = '\n';
  95. buf[len] = '\0';
  96. return len;
  97. }
  98. /*
  99. * PCI Bus Class Devices
  100. */
  101. static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
  102. int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static ssize_t cpuaffinity_show(struct device *dev,
  117. struct device_attribute *attr, char *buf)
  118. {
  119. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  120. }
  121. static DEVICE_ATTR_RO(cpuaffinity);
  122. static ssize_t cpulistaffinity_show(struct device *dev,
  123. struct device_attribute *attr, char *buf)
  124. {
  125. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  126. }
  127. static DEVICE_ATTR_RO(cpulistaffinity);
  128. /* show resources */
  129. static ssize_t
  130. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  131. {
  132. struct pci_dev * pci_dev = to_pci_dev(dev);
  133. char * str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  152. {
  153. struct pci_dev *pci_dev = to_pci_dev(dev);
  154. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  155. pci_dev->vendor, pci_dev->device,
  156. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  157. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  158. (u8)(pci_dev->class));
  159. }
  160. static ssize_t is_enabled_store(struct device *dev,
  161. struct device_attribute *attr, const char *buf,
  162. size_t count)
  163. {
  164. struct pci_dev *pdev = to_pci_dev(dev);
  165. unsigned long val;
  166. ssize_t result = kstrtoul(buf, 0, &val);
  167. if (result < 0)
  168. return result;
  169. /* this can crash the machine when done on the "wrong" device */
  170. if (!capable(CAP_SYS_ADMIN))
  171. return -EPERM;
  172. if (!val) {
  173. if (pci_is_enabled(pdev))
  174. pci_disable_device(pdev);
  175. else
  176. result = -EIO;
  177. } else
  178. result = pci_enable_device(pdev);
  179. return result < 0 ? result : count;
  180. }
  181. static ssize_t is_enabled_show(struct device *dev,
  182. struct device_attribute *attr, char *buf)
  183. {
  184. struct pci_dev *pdev;
  185. pdev = to_pci_dev (dev);
  186. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  187. }
  188. #ifdef CONFIG_NUMA
  189. static ssize_t
  190. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  191. {
  192. return sprintf (buf, "%d\n", dev->numa_node);
  193. }
  194. #endif
  195. static ssize_t
  196. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  197. {
  198. struct pci_dev *pdev = to_pci_dev(dev);
  199. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  200. }
  201. static ssize_t
  202. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  203. char *buf)
  204. {
  205. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  206. }
  207. static ssize_t
  208. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  209. {
  210. struct pci_dev *pdev = to_pci_dev(dev);
  211. if (!pdev->subordinate)
  212. return 0;
  213. return sprintf (buf, "%u\n",
  214. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  215. }
  216. static ssize_t
  217. msi_bus_store(struct device *dev, struct device_attribute *attr,
  218. const char *buf, size_t count)
  219. {
  220. struct pci_dev *pdev = to_pci_dev(dev);
  221. unsigned long val;
  222. if (kstrtoul(buf, 0, &val) < 0)
  223. return -EINVAL;
  224. /* bad things may happen if the no_msi flag is changed
  225. * while some drivers are loaded */
  226. if (!capable(CAP_SYS_ADMIN))
  227. return -EPERM;
  228. /* Maybe pci devices without subordinate busses shouldn't even have this
  229. * attribute in the first place? */
  230. if (!pdev->subordinate)
  231. return count;
  232. /* Is the flag going to change, or keep the value it already had? */
  233. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  234. !!val) {
  235. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  236. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  237. " bad things could happen\n", val ? "" : " not");
  238. }
  239. return count;
  240. }
  241. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  242. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  243. size_t count)
  244. {
  245. unsigned long val;
  246. struct pci_bus *b = NULL;
  247. if (kstrtoul(buf, 0, &val) < 0)
  248. return -EINVAL;
  249. if (val) {
  250. mutex_lock(&pci_remove_rescan_mutex);
  251. while ((b = pci_find_next_bus(b)) != NULL)
  252. pci_rescan_bus(b);
  253. mutex_unlock(&pci_remove_rescan_mutex);
  254. }
  255. return count;
  256. }
  257. struct bus_attribute pci_bus_attrs[] = {
  258. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  259. __ATTR_NULL
  260. };
  261. static ssize_t
  262. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  263. const char *buf, size_t count)
  264. {
  265. unsigned long val;
  266. struct pci_dev *pdev = to_pci_dev(dev);
  267. if (kstrtoul(buf, 0, &val) < 0)
  268. return -EINVAL;
  269. if (val) {
  270. mutex_lock(&pci_remove_rescan_mutex);
  271. pci_rescan_bus(pdev->bus);
  272. mutex_unlock(&pci_remove_rescan_mutex);
  273. }
  274. return count;
  275. }
  276. struct device_attribute dev_rescan_attr = __ATTR(rescan, (S_IWUSR|S_IWGRP),
  277. NULL, dev_rescan_store);
  278. static void remove_callback(struct device *dev)
  279. {
  280. struct pci_dev *pdev = to_pci_dev(dev);
  281. mutex_lock(&pci_remove_rescan_mutex);
  282. pci_stop_and_remove_bus_device(pdev);
  283. mutex_unlock(&pci_remove_rescan_mutex);
  284. }
  285. static ssize_t
  286. remove_store(struct device *dev, struct device_attribute *dummy,
  287. const char *buf, size_t count)
  288. {
  289. int ret = 0;
  290. unsigned long val;
  291. if (kstrtoul(buf, 0, &val) < 0)
  292. return -EINVAL;
  293. /* An attribute cannot be unregistered by one of its own methods,
  294. * so we have to use this roundabout approach.
  295. */
  296. if (val)
  297. ret = device_schedule_callback(dev, remove_callback);
  298. if (ret)
  299. count = ret;
  300. return count;
  301. }
  302. struct device_attribute dev_remove_attr = __ATTR(remove, (S_IWUSR|S_IWGRP),
  303. NULL, remove_store);
  304. static ssize_t
  305. dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
  306. const char *buf, size_t count)
  307. {
  308. unsigned long val;
  309. struct pci_bus *bus = to_pci_bus(dev);
  310. if (kstrtoul(buf, 0, &val) < 0)
  311. return -EINVAL;
  312. if (val) {
  313. mutex_lock(&pci_remove_rescan_mutex);
  314. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  315. pci_rescan_bus_bridge_resize(bus->self);
  316. else
  317. pci_rescan_bus(bus);
  318. mutex_unlock(&pci_remove_rescan_mutex);
  319. }
  320. return count;
  321. }
  322. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  323. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  324. static ssize_t d3cold_allowed_store(struct device *dev,
  325. struct device_attribute *attr,
  326. const char *buf, size_t count)
  327. {
  328. struct pci_dev *pdev = to_pci_dev(dev);
  329. unsigned long val;
  330. if (kstrtoul(buf, 0, &val) < 0)
  331. return -EINVAL;
  332. pdev->d3cold_allowed = !!val;
  333. pm_runtime_resume(dev);
  334. return count;
  335. }
  336. static ssize_t d3cold_allowed_show(struct device *dev,
  337. struct device_attribute *attr, char *buf)
  338. {
  339. struct pci_dev *pdev = to_pci_dev(dev);
  340. return sprintf (buf, "%u\n", pdev->d3cold_allowed);
  341. }
  342. #endif
  343. #ifdef CONFIG_PCI_IOV
  344. static ssize_t sriov_totalvfs_show(struct device *dev,
  345. struct device_attribute *attr,
  346. char *buf)
  347. {
  348. struct pci_dev *pdev = to_pci_dev(dev);
  349. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  350. }
  351. static ssize_t sriov_numvfs_show(struct device *dev,
  352. struct device_attribute *attr,
  353. char *buf)
  354. {
  355. struct pci_dev *pdev = to_pci_dev(dev);
  356. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  357. }
  358. /*
  359. * num_vfs > 0; number of VFs to enable
  360. * num_vfs = 0; disable all VFs
  361. *
  362. * Note: SRIOV spec doesn't allow partial VF
  363. * disable, so it's all or none.
  364. */
  365. static ssize_t sriov_numvfs_store(struct device *dev,
  366. struct device_attribute *attr,
  367. const char *buf, size_t count)
  368. {
  369. struct pci_dev *pdev = to_pci_dev(dev);
  370. int ret;
  371. u16 num_vfs;
  372. ret = kstrtou16(buf, 0, &num_vfs);
  373. if (ret < 0)
  374. return ret;
  375. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  376. return -ERANGE;
  377. if (num_vfs == pdev->sriov->num_VFs)
  378. return count; /* no change */
  379. /* is PF driver loaded w/callback */
  380. if (!pdev->driver || !pdev->driver->sriov_configure) {
  381. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  382. return -ENOSYS;
  383. }
  384. if (num_vfs == 0) {
  385. /* disable VFs */
  386. ret = pdev->driver->sriov_configure(pdev, 0);
  387. if (ret < 0)
  388. return ret;
  389. return count;
  390. }
  391. /* enable VFs */
  392. if (pdev->sriov->num_VFs) {
  393. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  394. pdev->sriov->num_VFs, num_vfs);
  395. return -EBUSY;
  396. }
  397. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  398. if (ret < 0)
  399. return ret;
  400. if (ret != num_vfs)
  401. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  402. num_vfs, ret);
  403. return count;
  404. }
  405. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  406. static struct device_attribute sriov_numvfs_attr =
  407. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  408. sriov_numvfs_show, sriov_numvfs_store);
  409. #endif /* CONFIG_PCI_IOV */
  410. struct device_attribute pci_dev_attrs[] = {
  411. __ATTR_RO(resource),
  412. __ATTR_RO(vendor),
  413. __ATTR_RO(device),
  414. __ATTR_RO(subsystem_vendor),
  415. __ATTR_RO(subsystem_device),
  416. __ATTR_RO(class),
  417. __ATTR_RO(irq),
  418. __ATTR_RO(local_cpus),
  419. __ATTR_RO(local_cpulist),
  420. __ATTR_RO(modalias),
  421. #ifdef CONFIG_NUMA
  422. __ATTR_RO(numa_node),
  423. #endif
  424. __ATTR_RO(dma_mask_bits),
  425. __ATTR_RO(consistent_dma_mask_bits),
  426. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  427. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  428. broken_parity_status_show,broken_parity_status_store),
  429. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  430. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  431. __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
  432. #endif
  433. __ATTR_NULL,
  434. };
  435. static struct attribute *pcibus_attrs[] = {
  436. &dev_attr_rescan.attr,
  437. &dev_attr_cpuaffinity.attr,
  438. &dev_attr_cpulistaffinity.attr,
  439. NULL,
  440. };
  441. static const struct attribute_group pcibus_group = {
  442. .attrs = pcibus_attrs,
  443. };
  444. const struct attribute_group *pcibus_groups[] = {
  445. &pcibus_group,
  446. NULL,
  447. };
  448. static ssize_t
  449. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  450. {
  451. struct pci_dev *pdev = to_pci_dev(dev);
  452. struct pci_dev *vga_dev = vga_default_device();
  453. if (vga_dev)
  454. return sprintf(buf, "%u\n", (pdev == vga_dev));
  455. return sprintf(buf, "%u\n",
  456. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  457. IORESOURCE_ROM_SHADOW));
  458. }
  459. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  460. static ssize_t
  461. pci_read_config(struct file *filp, struct kobject *kobj,
  462. struct bin_attribute *bin_attr,
  463. char *buf, loff_t off, size_t count)
  464. {
  465. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  466. unsigned int size = 64;
  467. loff_t init_off = off;
  468. u8 *data = (u8*) buf;
  469. /* Several chips lock up trying to read undefined config space */
  470. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
  471. size = dev->cfg_size;
  472. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  473. size = 128;
  474. }
  475. if (off > size)
  476. return 0;
  477. if (off + count > size) {
  478. size -= off;
  479. count = size;
  480. } else {
  481. size = count;
  482. }
  483. pci_config_pm_runtime_get(dev);
  484. if ((off & 1) && size) {
  485. u8 val;
  486. pci_user_read_config_byte(dev, off, &val);
  487. data[off - init_off] = val;
  488. off++;
  489. size--;
  490. }
  491. if ((off & 3) && size > 2) {
  492. u16 val;
  493. pci_user_read_config_word(dev, off, &val);
  494. data[off - init_off] = val & 0xff;
  495. data[off - init_off + 1] = (val >> 8) & 0xff;
  496. off += 2;
  497. size -= 2;
  498. }
  499. while (size > 3) {
  500. u32 val;
  501. pci_user_read_config_dword(dev, off, &val);
  502. data[off - init_off] = val & 0xff;
  503. data[off - init_off + 1] = (val >> 8) & 0xff;
  504. data[off - init_off + 2] = (val >> 16) & 0xff;
  505. data[off - init_off + 3] = (val >> 24) & 0xff;
  506. off += 4;
  507. size -= 4;
  508. }
  509. if (size >= 2) {
  510. u16 val;
  511. pci_user_read_config_word(dev, off, &val);
  512. data[off - init_off] = val & 0xff;
  513. data[off - init_off + 1] = (val >> 8) & 0xff;
  514. off += 2;
  515. size -= 2;
  516. }
  517. if (size > 0) {
  518. u8 val;
  519. pci_user_read_config_byte(dev, off, &val);
  520. data[off - init_off] = val;
  521. off++;
  522. --size;
  523. }
  524. pci_config_pm_runtime_put(dev);
  525. return count;
  526. }
  527. static ssize_t
  528. pci_write_config(struct file* filp, struct kobject *kobj,
  529. struct bin_attribute *bin_attr,
  530. char *buf, loff_t off, size_t count)
  531. {
  532. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  533. unsigned int size = count;
  534. loff_t init_off = off;
  535. u8 *data = (u8*) buf;
  536. if (off > dev->cfg_size)
  537. return 0;
  538. if (off + count > dev->cfg_size) {
  539. size = dev->cfg_size - off;
  540. count = size;
  541. }
  542. pci_config_pm_runtime_get(dev);
  543. if ((off & 1) && size) {
  544. pci_user_write_config_byte(dev, off, data[off - init_off]);
  545. off++;
  546. size--;
  547. }
  548. if ((off & 3) && size > 2) {
  549. u16 val = data[off - init_off];
  550. val |= (u16) data[off - init_off + 1] << 8;
  551. pci_user_write_config_word(dev, off, val);
  552. off += 2;
  553. size -= 2;
  554. }
  555. while (size > 3) {
  556. u32 val = data[off - init_off];
  557. val |= (u32) data[off - init_off + 1] << 8;
  558. val |= (u32) data[off - init_off + 2] << 16;
  559. val |= (u32) data[off - init_off + 3] << 24;
  560. pci_user_write_config_dword(dev, off, val);
  561. off += 4;
  562. size -= 4;
  563. }
  564. if (size >= 2) {
  565. u16 val = data[off - init_off];
  566. val |= (u16) data[off - init_off + 1] << 8;
  567. pci_user_write_config_word(dev, off, val);
  568. off += 2;
  569. size -= 2;
  570. }
  571. if (size) {
  572. pci_user_write_config_byte(dev, off, data[off - init_off]);
  573. off++;
  574. --size;
  575. }
  576. pci_config_pm_runtime_put(dev);
  577. return count;
  578. }
  579. static ssize_t
  580. read_vpd_attr(struct file *filp, struct kobject *kobj,
  581. struct bin_attribute *bin_attr,
  582. char *buf, loff_t off, size_t count)
  583. {
  584. struct pci_dev *dev =
  585. to_pci_dev(container_of(kobj, struct device, kobj));
  586. if (off > bin_attr->size)
  587. count = 0;
  588. else if (count > bin_attr->size - off)
  589. count = bin_attr->size - off;
  590. return pci_read_vpd(dev, off, count, buf);
  591. }
  592. static ssize_t
  593. write_vpd_attr(struct file *filp, struct kobject *kobj,
  594. struct bin_attribute *bin_attr,
  595. char *buf, loff_t off, size_t count)
  596. {
  597. struct pci_dev *dev =
  598. to_pci_dev(container_of(kobj, struct device, kobj));
  599. if (off > bin_attr->size)
  600. count = 0;
  601. else if (count > bin_attr->size - off)
  602. count = bin_attr->size - off;
  603. return pci_write_vpd(dev, off, count, buf);
  604. }
  605. #ifdef HAVE_PCI_LEGACY
  606. /**
  607. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  608. * @filp: open sysfs file
  609. * @kobj: kobject corresponding to file to read from
  610. * @bin_attr: struct bin_attribute for this file
  611. * @buf: buffer to store results
  612. * @off: offset into legacy I/O port space
  613. * @count: number of bytes to read
  614. *
  615. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  616. * callback routine (pci_legacy_read).
  617. */
  618. static ssize_t
  619. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  620. struct bin_attribute *bin_attr,
  621. char *buf, loff_t off, size_t count)
  622. {
  623. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  624. struct device,
  625. kobj));
  626. /* Only support 1, 2 or 4 byte accesses */
  627. if (count != 1 && count != 2 && count != 4)
  628. return -EINVAL;
  629. return pci_legacy_read(bus, off, (u32 *)buf, count);
  630. }
  631. /**
  632. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  633. * @filp: open sysfs file
  634. * @kobj: kobject corresponding to file to read from
  635. * @bin_attr: struct bin_attribute for this file
  636. * @buf: buffer containing value to be written
  637. * @off: offset into legacy I/O port space
  638. * @count: number of bytes to write
  639. *
  640. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  641. * callback routine (pci_legacy_write).
  642. */
  643. static ssize_t
  644. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  645. struct bin_attribute *bin_attr,
  646. char *buf, loff_t off, size_t count)
  647. {
  648. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  649. struct device,
  650. kobj));
  651. /* Only support 1, 2 or 4 byte accesses */
  652. if (count != 1 && count != 2 && count != 4)
  653. return -EINVAL;
  654. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  655. }
  656. /**
  657. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  658. * @filp: open sysfs file
  659. * @kobj: kobject corresponding to device to be mapped
  660. * @attr: struct bin_attribute for this file
  661. * @vma: struct vm_area_struct passed to mmap
  662. *
  663. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  664. * legacy memory space (first meg of bus space) into application virtual
  665. * memory space.
  666. */
  667. static int
  668. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  669. struct bin_attribute *attr,
  670. struct vm_area_struct *vma)
  671. {
  672. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  673. struct device,
  674. kobj));
  675. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  676. }
  677. /**
  678. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  679. * @filp: open sysfs file
  680. * @kobj: kobject corresponding to device to be mapped
  681. * @attr: struct bin_attribute for this file
  682. * @vma: struct vm_area_struct passed to mmap
  683. *
  684. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  685. * legacy IO space (first meg of bus space) into application virtual
  686. * memory space. Returns -ENOSYS if the operation isn't supported
  687. */
  688. static int
  689. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  690. struct bin_attribute *attr,
  691. struct vm_area_struct *vma)
  692. {
  693. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  694. struct device,
  695. kobj));
  696. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  697. }
  698. /**
  699. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  700. * @b: bus to create files under
  701. * @mmap_type: I/O port or memory
  702. *
  703. * Stub implementation. Can be overridden by arch if necessary.
  704. */
  705. void __weak
  706. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  707. {
  708. return;
  709. }
  710. /**
  711. * pci_create_legacy_files - create legacy I/O port and memory files
  712. * @b: bus to create files under
  713. *
  714. * Some platforms allow access to legacy I/O port and ISA memory space on
  715. * a per-bus basis. This routine creates the files and ties them into
  716. * their associated read, write and mmap files from pci-sysfs.c
  717. *
  718. * On error unwind, but don't propagate the error to the caller
  719. * as it is ok to set up the PCI bus without these files.
  720. */
  721. void pci_create_legacy_files(struct pci_bus *b)
  722. {
  723. int error;
  724. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  725. GFP_ATOMIC);
  726. if (!b->legacy_io)
  727. goto kzalloc_err;
  728. sysfs_bin_attr_init(b->legacy_io);
  729. b->legacy_io->attr.name = "legacy_io";
  730. b->legacy_io->size = 0xffff;
  731. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  732. b->legacy_io->read = pci_read_legacy_io;
  733. b->legacy_io->write = pci_write_legacy_io;
  734. b->legacy_io->mmap = pci_mmap_legacy_io;
  735. pci_adjust_legacy_attr(b, pci_mmap_io);
  736. error = device_create_bin_file(&b->dev, b->legacy_io);
  737. if (error)
  738. goto legacy_io_err;
  739. /* Allocated above after the legacy_io struct */
  740. b->legacy_mem = b->legacy_io + 1;
  741. sysfs_bin_attr_init(b->legacy_mem);
  742. b->legacy_mem->attr.name = "legacy_mem";
  743. b->legacy_mem->size = 1024*1024;
  744. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  745. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  746. pci_adjust_legacy_attr(b, pci_mmap_mem);
  747. error = device_create_bin_file(&b->dev, b->legacy_mem);
  748. if (error)
  749. goto legacy_mem_err;
  750. return;
  751. legacy_mem_err:
  752. device_remove_bin_file(&b->dev, b->legacy_io);
  753. legacy_io_err:
  754. kfree(b->legacy_io);
  755. b->legacy_io = NULL;
  756. kzalloc_err:
  757. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  758. "and ISA memory resources to sysfs\n");
  759. return;
  760. }
  761. void pci_remove_legacy_files(struct pci_bus *b)
  762. {
  763. if (b->legacy_io) {
  764. device_remove_bin_file(&b->dev, b->legacy_io);
  765. device_remove_bin_file(&b->dev, b->legacy_mem);
  766. kfree(b->legacy_io); /* both are allocated here */
  767. }
  768. }
  769. #endif /* HAVE_PCI_LEGACY */
  770. #ifdef HAVE_PCI_MMAP
  771. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  772. enum pci_mmap_api mmap_api)
  773. {
  774. unsigned long nr, start, size, pci_start;
  775. if (pci_resource_len(pdev, resno) == 0)
  776. return 0;
  777. nr = vma_pages(vma);
  778. start = vma->vm_pgoff;
  779. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  780. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  781. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  782. if (start >= pci_start && start < pci_start + size &&
  783. start + nr <= pci_start + size)
  784. return 1;
  785. return 0;
  786. }
  787. /**
  788. * pci_mmap_resource - map a PCI resource into user memory space
  789. * @kobj: kobject for mapping
  790. * @attr: struct bin_attribute for the file being mapped
  791. * @vma: struct vm_area_struct passed into the mmap
  792. * @write_combine: 1 for write_combine mapping
  793. *
  794. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  795. */
  796. static int
  797. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  798. struct vm_area_struct *vma, int write_combine)
  799. {
  800. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  801. struct device, kobj));
  802. struct resource *res = attr->private;
  803. enum pci_mmap_state mmap_type;
  804. resource_size_t start, end;
  805. int i;
  806. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  807. if (res == &pdev->resource[i])
  808. break;
  809. if (i >= PCI_ROM_RESOURCE)
  810. return -ENODEV;
  811. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  812. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  813. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  814. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  815. pci_name(pdev), i,
  816. (u64)pci_resource_start(pdev, i),
  817. (u64)pci_resource_len(pdev, i));
  818. return -EINVAL;
  819. }
  820. /* pci_mmap_page_range() expects the same kind of entry as coming
  821. * from /proc/bus/pci/ which is a "user visible" value. If this is
  822. * different from the resource itself, arch will do necessary fixup.
  823. */
  824. pci_resource_to_user(pdev, i, res, &start, &end);
  825. vma->vm_pgoff += start >> PAGE_SHIFT;
  826. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  827. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  828. return -EINVAL;
  829. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  830. }
  831. static int
  832. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  833. struct bin_attribute *attr,
  834. struct vm_area_struct *vma)
  835. {
  836. return pci_mmap_resource(kobj, attr, vma, 0);
  837. }
  838. static int
  839. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  840. struct bin_attribute *attr,
  841. struct vm_area_struct *vma)
  842. {
  843. return pci_mmap_resource(kobj, attr, vma, 1);
  844. }
  845. static ssize_t
  846. pci_resource_io(struct file *filp, struct kobject *kobj,
  847. struct bin_attribute *attr, char *buf,
  848. loff_t off, size_t count, bool write)
  849. {
  850. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  851. struct device, kobj));
  852. struct resource *res = attr->private;
  853. unsigned long port = off;
  854. int i;
  855. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  856. if (res == &pdev->resource[i])
  857. break;
  858. if (i >= PCI_ROM_RESOURCE)
  859. return -ENODEV;
  860. port += pci_resource_start(pdev, i);
  861. if (port > pci_resource_end(pdev, i))
  862. return 0;
  863. if (port + count - 1 > pci_resource_end(pdev, i))
  864. return -EINVAL;
  865. switch (count) {
  866. case 1:
  867. if (write)
  868. outb(*(u8 *)buf, port);
  869. else
  870. *(u8 *)buf = inb(port);
  871. return 1;
  872. case 2:
  873. if (write)
  874. outw(*(u16 *)buf, port);
  875. else
  876. *(u16 *)buf = inw(port);
  877. return 2;
  878. case 4:
  879. if (write)
  880. outl(*(u32 *)buf, port);
  881. else
  882. *(u32 *)buf = inl(port);
  883. return 4;
  884. }
  885. return -EINVAL;
  886. }
  887. static ssize_t
  888. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  889. struct bin_attribute *attr, char *buf,
  890. loff_t off, size_t count)
  891. {
  892. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  893. }
  894. static ssize_t
  895. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  896. struct bin_attribute *attr, char *buf,
  897. loff_t off, size_t count)
  898. {
  899. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  900. }
  901. /**
  902. * pci_remove_resource_files - cleanup resource files
  903. * @pdev: dev to cleanup
  904. *
  905. * If we created resource files for @pdev, remove them from sysfs and
  906. * free their resources.
  907. */
  908. static void
  909. pci_remove_resource_files(struct pci_dev *pdev)
  910. {
  911. int i;
  912. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  913. struct bin_attribute *res_attr;
  914. res_attr = pdev->res_attr[i];
  915. if (res_attr) {
  916. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  917. kfree(res_attr);
  918. }
  919. res_attr = pdev->res_attr_wc[i];
  920. if (res_attr) {
  921. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  922. kfree(res_attr);
  923. }
  924. }
  925. }
  926. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  927. {
  928. /* allocate attribute structure, piggyback attribute name */
  929. int name_len = write_combine ? 13 : 10;
  930. struct bin_attribute *res_attr;
  931. int retval;
  932. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  933. if (res_attr) {
  934. char *res_attr_name = (char *)(res_attr + 1);
  935. sysfs_bin_attr_init(res_attr);
  936. if (write_combine) {
  937. pdev->res_attr_wc[num] = res_attr;
  938. sprintf(res_attr_name, "resource%d_wc", num);
  939. res_attr->mmap = pci_mmap_resource_wc;
  940. } else {
  941. pdev->res_attr[num] = res_attr;
  942. sprintf(res_attr_name, "resource%d", num);
  943. res_attr->mmap = pci_mmap_resource_uc;
  944. }
  945. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  946. res_attr->read = pci_read_resource_io;
  947. res_attr->write = pci_write_resource_io;
  948. }
  949. res_attr->attr.name = res_attr_name;
  950. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  951. res_attr->size = pci_resource_len(pdev, num);
  952. res_attr->private = &pdev->resource[num];
  953. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  954. } else
  955. retval = -ENOMEM;
  956. return retval;
  957. }
  958. /**
  959. * pci_create_resource_files - create resource files in sysfs for @dev
  960. * @pdev: dev in question
  961. *
  962. * Walk the resources in @pdev creating files for each resource available.
  963. */
  964. static int pci_create_resource_files(struct pci_dev *pdev)
  965. {
  966. int i;
  967. int retval;
  968. /* Expose the PCI resources from this device as files */
  969. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  970. /* skip empty resources */
  971. if (!pci_resource_len(pdev, i))
  972. continue;
  973. retval = pci_create_attr(pdev, i, 0);
  974. /* for prefetchable resources, create a WC mappable file */
  975. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  976. retval = pci_create_attr(pdev, i, 1);
  977. if (retval) {
  978. pci_remove_resource_files(pdev);
  979. return retval;
  980. }
  981. }
  982. return 0;
  983. }
  984. #else /* !HAVE_PCI_MMAP */
  985. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  986. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  987. #endif /* HAVE_PCI_MMAP */
  988. /**
  989. * pci_write_rom - used to enable access to the PCI ROM display
  990. * @filp: sysfs file
  991. * @kobj: kernel object handle
  992. * @bin_attr: struct bin_attribute for this file
  993. * @buf: user input
  994. * @off: file offset
  995. * @count: number of byte in input
  996. *
  997. * writing anything except 0 enables it
  998. */
  999. static ssize_t
  1000. pci_write_rom(struct file *filp, struct kobject *kobj,
  1001. struct bin_attribute *bin_attr,
  1002. char *buf, loff_t off, size_t count)
  1003. {
  1004. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1005. if ((off == 0) && (*buf == '0') && (count == 2))
  1006. pdev->rom_attr_enabled = 0;
  1007. else
  1008. pdev->rom_attr_enabled = 1;
  1009. return count;
  1010. }
  1011. /**
  1012. * pci_read_rom - read a PCI ROM
  1013. * @filp: sysfs file
  1014. * @kobj: kernel object handle
  1015. * @bin_attr: struct bin_attribute for this file
  1016. * @buf: where to put the data we read from the ROM
  1017. * @off: file offset
  1018. * @count: number of bytes to read
  1019. *
  1020. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1021. * device corresponding to @kobj.
  1022. */
  1023. static ssize_t
  1024. pci_read_rom(struct file *filp, struct kobject *kobj,
  1025. struct bin_attribute *bin_attr,
  1026. char *buf, loff_t off, size_t count)
  1027. {
  1028. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1029. void __iomem *rom;
  1030. size_t size;
  1031. if (!pdev->rom_attr_enabled)
  1032. return -EINVAL;
  1033. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1034. if (!rom || !size)
  1035. return -EIO;
  1036. if (off >= size)
  1037. count = 0;
  1038. else {
  1039. if (off + count > size)
  1040. count = size - off;
  1041. memcpy_fromio(buf, rom + off, count);
  1042. }
  1043. pci_unmap_rom(pdev, rom);
  1044. return count;
  1045. }
  1046. static struct bin_attribute pci_config_attr = {
  1047. .attr = {
  1048. .name = "config",
  1049. .mode = S_IRUGO | S_IWUSR,
  1050. },
  1051. .size = PCI_CFG_SPACE_SIZE,
  1052. .read = pci_read_config,
  1053. .write = pci_write_config,
  1054. };
  1055. static struct bin_attribute pcie_config_attr = {
  1056. .attr = {
  1057. .name = "config",
  1058. .mode = S_IRUGO | S_IWUSR,
  1059. },
  1060. .size = PCI_CFG_SPACE_EXP_SIZE,
  1061. .read = pci_read_config,
  1062. .write = pci_write_config,
  1063. };
  1064. int __weak pcibios_add_platform_entries(struct pci_dev *dev)
  1065. {
  1066. return 0;
  1067. }
  1068. static ssize_t reset_store(struct device *dev,
  1069. struct device_attribute *attr, const char *buf,
  1070. size_t count)
  1071. {
  1072. struct pci_dev *pdev = to_pci_dev(dev);
  1073. unsigned long val;
  1074. ssize_t result = kstrtoul(buf, 0, &val);
  1075. if (result < 0)
  1076. return result;
  1077. if (val != 1)
  1078. return -EINVAL;
  1079. result = pci_reset_function(pdev);
  1080. if (result < 0)
  1081. return result;
  1082. return count;
  1083. }
  1084. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1085. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1086. {
  1087. int retval;
  1088. struct bin_attribute *attr;
  1089. /* If the device has VPD, try to expose it in sysfs. */
  1090. if (dev->vpd) {
  1091. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1092. if (!attr)
  1093. return -ENOMEM;
  1094. sysfs_bin_attr_init(attr);
  1095. attr->size = dev->vpd->len;
  1096. attr->attr.name = "vpd";
  1097. attr->attr.mode = S_IRUSR | S_IWUSR;
  1098. attr->read = read_vpd_attr;
  1099. attr->write = write_vpd_attr;
  1100. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1101. if (retval) {
  1102. kfree(attr);
  1103. return retval;
  1104. }
  1105. dev->vpd->attr = attr;
  1106. }
  1107. /* Active State Power Management */
  1108. pcie_aspm_create_sysfs_dev_files(dev);
  1109. if (!pci_probe_reset_function(dev)) {
  1110. retval = device_create_file(&dev->dev, &reset_attr);
  1111. if (retval)
  1112. goto error;
  1113. dev->reset_fn = 1;
  1114. }
  1115. return 0;
  1116. error:
  1117. pcie_aspm_remove_sysfs_dev_files(dev);
  1118. if (dev->vpd && dev->vpd->attr) {
  1119. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1120. kfree(dev->vpd->attr);
  1121. }
  1122. return retval;
  1123. }
  1124. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  1125. {
  1126. int retval;
  1127. int rom_size = 0;
  1128. struct bin_attribute *attr;
  1129. if (!sysfs_initialized)
  1130. return -EACCES;
  1131. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1132. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1133. else
  1134. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1135. if (retval)
  1136. goto err;
  1137. retval = pci_create_resource_files(pdev);
  1138. if (retval)
  1139. goto err_config_file;
  1140. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1141. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1142. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1143. rom_size = 0x20000;
  1144. /* If the device has a ROM, try to expose it in sysfs. */
  1145. if (rom_size) {
  1146. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1147. if (!attr) {
  1148. retval = -ENOMEM;
  1149. goto err_resource_files;
  1150. }
  1151. sysfs_bin_attr_init(attr);
  1152. attr->size = rom_size;
  1153. attr->attr.name = "rom";
  1154. attr->attr.mode = S_IRUSR | S_IWUSR;
  1155. attr->read = pci_read_rom;
  1156. attr->write = pci_write_rom;
  1157. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1158. if (retval) {
  1159. kfree(attr);
  1160. goto err_resource_files;
  1161. }
  1162. pdev->rom_attr = attr;
  1163. }
  1164. /* add platform-specific attributes */
  1165. retval = pcibios_add_platform_entries(pdev);
  1166. if (retval)
  1167. goto err_rom_file;
  1168. /* add sysfs entries for various capabilities */
  1169. retval = pci_create_capabilities_sysfs(pdev);
  1170. if (retval)
  1171. goto err_rom_file;
  1172. pci_create_firmware_label_files(pdev);
  1173. return 0;
  1174. err_rom_file:
  1175. if (rom_size) {
  1176. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1177. kfree(pdev->rom_attr);
  1178. pdev->rom_attr = NULL;
  1179. }
  1180. err_resource_files:
  1181. pci_remove_resource_files(pdev);
  1182. err_config_file:
  1183. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1184. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1185. else
  1186. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1187. err:
  1188. return retval;
  1189. }
  1190. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1191. {
  1192. if (dev->vpd && dev->vpd->attr) {
  1193. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1194. kfree(dev->vpd->attr);
  1195. }
  1196. pcie_aspm_remove_sysfs_dev_files(dev);
  1197. if (dev->reset_fn) {
  1198. device_remove_file(&dev->dev, &reset_attr);
  1199. dev->reset_fn = 0;
  1200. }
  1201. }
  1202. /**
  1203. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1204. * @pdev: device whose entries we should free
  1205. *
  1206. * Cleanup when @pdev is removed from sysfs.
  1207. */
  1208. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1209. {
  1210. int rom_size = 0;
  1211. if (!sysfs_initialized)
  1212. return;
  1213. pci_remove_capabilities_sysfs(pdev);
  1214. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1215. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1216. else
  1217. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1218. pci_remove_resource_files(pdev);
  1219. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1220. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1221. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1222. rom_size = 0x20000;
  1223. if (rom_size && pdev->rom_attr) {
  1224. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1225. kfree(pdev->rom_attr);
  1226. }
  1227. pci_remove_firmware_label_files(pdev);
  1228. }
  1229. static int __init pci_sysfs_init(void)
  1230. {
  1231. struct pci_dev *pdev = NULL;
  1232. int retval;
  1233. sysfs_initialized = 1;
  1234. for_each_pci_dev(pdev) {
  1235. retval = pci_create_sysfs_dev_files(pdev);
  1236. if (retval) {
  1237. pci_dev_put(pdev);
  1238. return retval;
  1239. }
  1240. }
  1241. return 0;
  1242. }
  1243. late_initcall(pci_sysfs_init);
  1244. static struct attribute *pci_dev_dev_attrs[] = {
  1245. &vga_attr.attr,
  1246. NULL,
  1247. };
  1248. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1249. struct attribute *a, int n)
  1250. {
  1251. struct device *dev = container_of(kobj, struct device, kobj);
  1252. struct pci_dev *pdev = to_pci_dev(dev);
  1253. if (a == &vga_attr.attr)
  1254. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1255. return 0;
  1256. return a->mode;
  1257. }
  1258. static struct attribute *pci_dev_hp_attrs[] = {
  1259. &dev_remove_attr.attr,
  1260. &dev_rescan_attr.attr,
  1261. NULL,
  1262. };
  1263. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1264. struct attribute *a, int n)
  1265. {
  1266. struct device *dev = container_of(kobj, struct device, kobj);
  1267. struct pci_dev *pdev = to_pci_dev(dev);
  1268. if (pdev->is_virtfn)
  1269. return 0;
  1270. return a->mode;
  1271. }
  1272. static struct attribute_group pci_dev_hp_attr_group = {
  1273. .attrs = pci_dev_hp_attrs,
  1274. .is_visible = pci_dev_hp_attrs_are_visible,
  1275. };
  1276. #ifdef CONFIG_PCI_IOV
  1277. static struct attribute *sriov_dev_attrs[] = {
  1278. &sriov_totalvfs_attr.attr,
  1279. &sriov_numvfs_attr.attr,
  1280. NULL,
  1281. };
  1282. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1283. struct attribute *a, int n)
  1284. {
  1285. struct device *dev = container_of(kobj, struct device, kobj);
  1286. if (!dev_is_pf(dev))
  1287. return 0;
  1288. return a->mode;
  1289. }
  1290. static struct attribute_group sriov_dev_attr_group = {
  1291. .attrs = sriov_dev_attrs,
  1292. .is_visible = sriov_attrs_are_visible,
  1293. };
  1294. #endif /* CONFIG_PCI_IOV */
  1295. static struct attribute_group pci_dev_attr_group = {
  1296. .attrs = pci_dev_dev_attrs,
  1297. .is_visible = pci_dev_attrs_are_visible,
  1298. };
  1299. static const struct attribute_group *pci_dev_attr_groups[] = {
  1300. &pci_dev_attr_group,
  1301. &pci_dev_hp_attr_group,
  1302. #ifdef CONFIG_PCI_IOV
  1303. &sriov_dev_attr_group,
  1304. #endif
  1305. NULL,
  1306. };
  1307. struct device_type pci_dev_type = {
  1308. .groups = pci_dev_attr_groups,
  1309. };