iov.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811
  1. /*
  2. * drivers/pci/iov.c
  3. *
  4. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  5. *
  6. * PCI Express I/O Virtualization (IOV) support.
  7. * Single Root IOV 1.0
  8. * Address Translation Service 1.0
  9. */
  10. #include <linux/pci.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/delay.h>
  16. #include <linux/pci-ats.h>
  17. #include "pci.h"
  18. #define VIRTFN_ID_LEN 16
  19. static inline u8 virtfn_bus(struct pci_dev *dev, int id)
  20. {
  21. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  22. dev->sriov->stride * id) >> 8);
  23. }
  24. static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
  25. {
  26. return (dev->devfn + dev->sriov->offset +
  27. dev->sriov->stride * id) & 0xff;
  28. }
  29. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  30. {
  31. struct pci_bus *child;
  32. if (bus->number == busnr)
  33. return bus;
  34. child = pci_find_bus(pci_domain_nr(bus), busnr);
  35. if (child)
  36. return child;
  37. child = pci_add_new_bus(bus, NULL, busnr);
  38. if (!child)
  39. return NULL;
  40. pci_bus_insert_busn_res(child, busnr, busnr);
  41. return child;
  42. }
  43. static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
  44. {
  45. if (physbus != virtbus && list_empty(&virtbus->devices))
  46. pci_remove_bus(virtbus);
  47. }
  48. static int virtfn_add(struct pci_dev *dev, int id, int reset)
  49. {
  50. int i;
  51. int rc = -ENOMEM;
  52. u64 size;
  53. char buf[VIRTFN_ID_LEN];
  54. struct pci_dev *virtfn;
  55. struct resource *res;
  56. struct pci_sriov *iov = dev->sriov;
  57. struct pci_bus *bus;
  58. mutex_lock(&iov->dev->sriov->lock);
  59. bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
  60. if (!bus)
  61. goto failed;
  62. virtfn = pci_alloc_dev(bus);
  63. if (!virtfn)
  64. goto failed0;
  65. virtfn->devfn = virtfn_devfn(dev, id);
  66. virtfn->vendor = dev->vendor;
  67. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
  68. pci_setup_device(virtfn);
  69. virtfn->dev.parent = dev->dev.parent;
  70. virtfn->physfn = pci_dev_get(dev);
  71. virtfn->is_virtfn = 1;
  72. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  73. res = dev->resource + PCI_IOV_RESOURCES + i;
  74. if (!res->parent)
  75. continue;
  76. virtfn->resource[i].name = pci_name(virtfn);
  77. virtfn->resource[i].flags = res->flags;
  78. size = resource_size(res);
  79. do_div(size, iov->total_VFs);
  80. virtfn->resource[i].start = res->start + size * id;
  81. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  82. rc = request_resource(res, &virtfn->resource[i]);
  83. BUG_ON(rc);
  84. }
  85. if (reset)
  86. __pci_reset_function(virtfn);
  87. pci_device_add(virtfn, virtfn->bus);
  88. mutex_unlock(&iov->dev->sriov->lock);
  89. rc = pci_bus_add_device(virtfn);
  90. sprintf(buf, "virtfn%u", id);
  91. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  92. if (rc)
  93. goto failed1;
  94. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  95. if (rc)
  96. goto failed2;
  97. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  98. return 0;
  99. failed2:
  100. sysfs_remove_link(&dev->dev.kobj, buf);
  101. failed1:
  102. pci_dev_put(dev);
  103. mutex_lock(&iov->dev->sriov->lock);
  104. pci_stop_and_remove_bus_device(virtfn);
  105. failed0:
  106. virtfn_remove_bus(dev->bus, bus);
  107. failed:
  108. mutex_unlock(&iov->dev->sriov->lock);
  109. return rc;
  110. }
  111. static void virtfn_remove(struct pci_dev *dev, int id, int reset)
  112. {
  113. char buf[VIRTFN_ID_LEN];
  114. struct pci_dev *virtfn;
  115. struct pci_sriov *iov = dev->sriov;
  116. virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
  117. virtfn_bus(dev, id),
  118. virtfn_devfn(dev, id));
  119. if (!virtfn)
  120. return;
  121. if (reset) {
  122. device_release_driver(&virtfn->dev);
  123. __pci_reset_function(virtfn);
  124. }
  125. sprintf(buf, "virtfn%u", id);
  126. sysfs_remove_link(&dev->dev.kobj, buf);
  127. /*
  128. * pci_stop_dev() could have been called for this virtfn already,
  129. * so the directory for the virtfn may have been removed before.
  130. * Double check to avoid spurious sysfs warnings.
  131. */
  132. if (virtfn->dev.kobj.sd)
  133. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  134. mutex_lock(&iov->dev->sriov->lock);
  135. pci_stop_and_remove_bus_device(virtfn);
  136. virtfn_remove_bus(dev->bus, virtfn->bus);
  137. mutex_unlock(&iov->dev->sriov->lock);
  138. /* balance pci_get_domain_bus_and_slot() */
  139. pci_dev_put(virtfn);
  140. pci_dev_put(dev);
  141. }
  142. static int sriov_migration(struct pci_dev *dev)
  143. {
  144. u16 status;
  145. struct pci_sriov *iov = dev->sriov;
  146. if (!iov->num_VFs)
  147. return 0;
  148. if (!(iov->cap & PCI_SRIOV_CAP_VFM))
  149. return 0;
  150. pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
  151. if (!(status & PCI_SRIOV_STATUS_VFM))
  152. return 0;
  153. schedule_work(&iov->mtask);
  154. return 1;
  155. }
  156. static void sriov_migration_task(struct work_struct *work)
  157. {
  158. int i;
  159. u8 state;
  160. u16 status;
  161. struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
  162. for (i = iov->initial_VFs; i < iov->num_VFs; i++) {
  163. state = readb(iov->mstate + i);
  164. if (state == PCI_SRIOV_VFM_MI) {
  165. writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
  166. state = readb(iov->mstate + i);
  167. if (state == PCI_SRIOV_VFM_AV)
  168. virtfn_add(iov->self, i, 1);
  169. } else if (state == PCI_SRIOV_VFM_MO) {
  170. virtfn_remove(iov->self, i, 1);
  171. writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
  172. state = readb(iov->mstate + i);
  173. if (state == PCI_SRIOV_VFM_AV)
  174. virtfn_add(iov->self, i, 0);
  175. }
  176. }
  177. pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
  178. status &= ~PCI_SRIOV_STATUS_VFM;
  179. pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
  180. }
  181. static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
  182. {
  183. int bir;
  184. u32 table;
  185. resource_size_t pa;
  186. struct pci_sriov *iov = dev->sriov;
  187. if (nr_virtfn <= iov->initial_VFs)
  188. return 0;
  189. pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
  190. bir = PCI_SRIOV_VFM_BIR(table);
  191. if (bir > PCI_STD_RESOURCE_END)
  192. return -EIO;
  193. table = PCI_SRIOV_VFM_OFFSET(table);
  194. if (table + nr_virtfn > pci_resource_len(dev, bir))
  195. return -EIO;
  196. pa = pci_resource_start(dev, bir) + table;
  197. iov->mstate = ioremap(pa, nr_virtfn);
  198. if (!iov->mstate)
  199. return -ENOMEM;
  200. INIT_WORK(&iov->mtask, sriov_migration_task);
  201. iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
  202. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  203. return 0;
  204. }
  205. static void sriov_disable_migration(struct pci_dev *dev)
  206. {
  207. struct pci_sriov *iov = dev->sriov;
  208. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
  209. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  210. cancel_work_sync(&iov->mtask);
  211. iounmap(iov->mstate);
  212. }
  213. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  214. {
  215. int rc;
  216. int i, j;
  217. int nres;
  218. u16 offset, stride, initial;
  219. struct resource *res;
  220. struct pci_dev *pdev;
  221. struct pci_sriov *iov = dev->sriov;
  222. int bars = 0;
  223. if (!nr_virtfn)
  224. return 0;
  225. if (iov->num_VFs)
  226. return -EINVAL;
  227. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  228. if (initial > iov->total_VFs ||
  229. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
  230. return -EIO;
  231. if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
  232. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  233. return -EINVAL;
  234. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
  235. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
  236. if (!offset || (nr_virtfn > 1 && !stride))
  237. return -EIO;
  238. nres = 0;
  239. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  240. bars |= (1 << (i + PCI_IOV_RESOURCES));
  241. res = dev->resource + PCI_IOV_RESOURCES + i;
  242. if (res->parent)
  243. nres++;
  244. }
  245. if (nres != iov->nres) {
  246. dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
  247. return -ENOMEM;
  248. }
  249. iov->offset = offset;
  250. iov->stride = stride;
  251. if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
  252. dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
  253. return -ENOMEM;
  254. }
  255. if (pci_enable_resources(dev, bars)) {
  256. dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
  257. return -ENOMEM;
  258. }
  259. if (iov->link != dev->devfn) {
  260. pdev = pci_get_slot(dev->bus, iov->link);
  261. if (!pdev)
  262. return -ENODEV;
  263. if (!pdev->is_physfn) {
  264. pci_dev_put(pdev);
  265. return -ENOSYS;
  266. }
  267. rc = sysfs_create_link(&dev->dev.kobj,
  268. &pdev->dev.kobj, "dep_link");
  269. pci_dev_put(pdev);
  270. if (rc)
  271. return rc;
  272. }
  273. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  274. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  275. pci_cfg_access_lock(dev);
  276. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  277. msleep(100);
  278. pci_cfg_access_unlock(dev);
  279. iov->initial_VFs = initial;
  280. if (nr_virtfn < initial)
  281. initial = nr_virtfn;
  282. for (i = 0; i < initial; i++) {
  283. rc = virtfn_add(dev, i, 0);
  284. if (rc)
  285. goto failed;
  286. }
  287. if (iov->cap & PCI_SRIOV_CAP_VFM) {
  288. rc = sriov_enable_migration(dev, nr_virtfn);
  289. if (rc)
  290. goto failed;
  291. }
  292. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  293. iov->num_VFs = nr_virtfn;
  294. return 0;
  295. failed:
  296. for (j = 0; j < i; j++)
  297. virtfn_remove(dev, j, 0);
  298. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  299. pci_cfg_access_lock(dev);
  300. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  301. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
  302. ssleep(1);
  303. pci_cfg_access_unlock(dev);
  304. if (iov->link != dev->devfn)
  305. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  306. return rc;
  307. }
  308. static void sriov_disable(struct pci_dev *dev)
  309. {
  310. int i;
  311. struct pci_sriov *iov = dev->sriov;
  312. if (!iov->num_VFs)
  313. return;
  314. if (iov->cap & PCI_SRIOV_CAP_VFM)
  315. sriov_disable_migration(dev);
  316. for (i = 0; i < iov->num_VFs; i++)
  317. virtfn_remove(dev, i, 0);
  318. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  319. pci_cfg_access_lock(dev);
  320. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  321. ssleep(1);
  322. pci_cfg_access_unlock(dev);
  323. if (iov->link != dev->devfn)
  324. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  325. iov->num_VFs = 0;
  326. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
  327. }
  328. static int sriov_init(struct pci_dev *dev, int pos)
  329. {
  330. int i;
  331. int rc;
  332. int nres;
  333. u32 pgsz;
  334. u16 ctrl, total, offset, stride;
  335. struct pci_sriov *iov;
  336. struct resource *res;
  337. struct pci_dev *pdev;
  338. if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
  339. pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
  340. return -ENODEV;
  341. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  342. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  343. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  344. ssleep(1);
  345. }
  346. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  347. if (!total)
  348. return 0;
  349. ctrl = 0;
  350. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  351. if (pdev->is_physfn)
  352. goto found;
  353. pdev = NULL;
  354. if (pci_ari_enabled(dev->bus))
  355. ctrl |= PCI_SRIOV_CTRL_ARI;
  356. found:
  357. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  358. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
  359. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
  360. if (!offset || (total > 1 && !stride))
  361. return -EIO;
  362. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  363. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  364. pgsz &= ~((1 << i) - 1);
  365. if (!pgsz)
  366. return -EIO;
  367. pgsz &= ~(pgsz - 1);
  368. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  369. nres = 0;
  370. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  371. res = dev->resource + PCI_IOV_RESOURCES + i;
  372. i += __pci_read_base(dev, pci_bar_unknown, res,
  373. pos + PCI_SRIOV_BAR + i * 4);
  374. if (!res->flags)
  375. continue;
  376. if (resource_size(res) & (PAGE_SIZE - 1)) {
  377. rc = -EIO;
  378. goto failed;
  379. }
  380. res->end = res->start + resource_size(res) * total - 1;
  381. nres++;
  382. }
  383. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  384. if (!iov) {
  385. rc = -ENOMEM;
  386. goto failed;
  387. }
  388. iov->pos = pos;
  389. iov->nres = nres;
  390. iov->ctrl = ctrl;
  391. iov->total_VFs = total;
  392. iov->offset = offset;
  393. iov->stride = stride;
  394. iov->pgsz = pgsz;
  395. iov->self = dev;
  396. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  397. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  398. if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  399. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  400. if (pdev)
  401. iov->dev = pci_dev_get(pdev);
  402. else
  403. iov->dev = dev;
  404. mutex_init(&iov->lock);
  405. dev->sriov = iov;
  406. dev->is_physfn = 1;
  407. return 0;
  408. failed:
  409. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  410. res = dev->resource + PCI_IOV_RESOURCES + i;
  411. res->flags = 0;
  412. }
  413. return rc;
  414. }
  415. static void sriov_release(struct pci_dev *dev)
  416. {
  417. BUG_ON(dev->sriov->num_VFs);
  418. if (dev != dev->sriov->dev)
  419. pci_dev_put(dev->sriov->dev);
  420. mutex_destroy(&dev->sriov->lock);
  421. kfree(dev->sriov);
  422. dev->sriov = NULL;
  423. }
  424. static void sriov_restore_state(struct pci_dev *dev)
  425. {
  426. int i;
  427. u16 ctrl;
  428. struct pci_sriov *iov = dev->sriov;
  429. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  430. if (ctrl & PCI_SRIOV_CTRL_VFE)
  431. return;
  432. for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
  433. pci_update_resource(dev, i);
  434. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  435. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
  436. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  437. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  438. msleep(100);
  439. }
  440. /**
  441. * pci_iov_init - initialize the IOV capability
  442. * @dev: the PCI device
  443. *
  444. * Returns 0 on success, or negative on failure.
  445. */
  446. int pci_iov_init(struct pci_dev *dev)
  447. {
  448. int pos;
  449. if (!pci_is_pcie(dev))
  450. return -ENODEV;
  451. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  452. if (pos)
  453. return sriov_init(dev, pos);
  454. return -ENODEV;
  455. }
  456. /**
  457. * pci_iov_release - release resources used by the IOV capability
  458. * @dev: the PCI device
  459. */
  460. void pci_iov_release(struct pci_dev *dev)
  461. {
  462. if (dev->is_physfn)
  463. sriov_release(dev);
  464. }
  465. /**
  466. * pci_iov_resource_bar - get position of the SR-IOV BAR
  467. * @dev: the PCI device
  468. * @resno: the resource number
  469. * @type: the BAR type to be filled in
  470. *
  471. * Returns position of the BAR encapsulated in the SR-IOV capability.
  472. */
  473. int pci_iov_resource_bar(struct pci_dev *dev, int resno,
  474. enum pci_bar_type *type)
  475. {
  476. if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
  477. return 0;
  478. BUG_ON(!dev->is_physfn);
  479. *type = pci_bar_unknown;
  480. return dev->sriov->pos + PCI_SRIOV_BAR +
  481. 4 * (resno - PCI_IOV_RESOURCES);
  482. }
  483. /**
  484. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  485. * @dev: the PCI device
  486. * @resno: the resource number
  487. *
  488. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  489. * This is not the same as the resource size which is defined as
  490. * the VF BAR size multiplied by the number of VFs. The alignment
  491. * is just the VF BAR size.
  492. */
  493. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  494. {
  495. struct resource tmp;
  496. enum pci_bar_type type;
  497. int reg = pci_iov_resource_bar(dev, resno, &type);
  498. if (!reg)
  499. return 0;
  500. __pci_read_base(dev, type, &tmp, reg);
  501. return resource_alignment(&tmp);
  502. }
  503. /**
  504. * pci_restore_iov_state - restore the state of the IOV capability
  505. * @dev: the PCI device
  506. */
  507. void pci_restore_iov_state(struct pci_dev *dev)
  508. {
  509. if (dev->is_physfn)
  510. sriov_restore_state(dev);
  511. }
  512. /**
  513. * pci_iov_bus_range - find bus range used by Virtual Function
  514. * @bus: the PCI bus
  515. *
  516. * Returns max number of buses (exclude current one) used by Virtual
  517. * Functions.
  518. */
  519. int pci_iov_bus_range(struct pci_bus *bus)
  520. {
  521. int max = 0;
  522. u8 busnr;
  523. struct pci_dev *dev;
  524. list_for_each_entry(dev, &bus->devices, bus_list) {
  525. if (!dev->is_physfn)
  526. continue;
  527. busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
  528. if (busnr > max)
  529. max = busnr;
  530. }
  531. return max ? max - bus->number : 0;
  532. }
  533. /**
  534. * pci_enable_sriov - enable the SR-IOV capability
  535. * @dev: the PCI device
  536. * @nr_virtfn: number of virtual functions to enable
  537. *
  538. * Returns 0 on success, or negative on failure.
  539. */
  540. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  541. {
  542. might_sleep();
  543. if (!dev->is_physfn)
  544. return -ENOSYS;
  545. return sriov_enable(dev, nr_virtfn);
  546. }
  547. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  548. /**
  549. * pci_disable_sriov - disable the SR-IOV capability
  550. * @dev: the PCI device
  551. */
  552. void pci_disable_sriov(struct pci_dev *dev)
  553. {
  554. might_sleep();
  555. if (!dev->is_physfn)
  556. return;
  557. sriov_disable(dev);
  558. }
  559. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  560. /**
  561. * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
  562. * @dev: the PCI device
  563. *
  564. * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
  565. *
  566. * Physical Function driver is responsible to register IRQ handler using
  567. * VF Migration Interrupt Message Number, and call this function when the
  568. * interrupt is generated by the hardware.
  569. */
  570. irqreturn_t pci_sriov_migration(struct pci_dev *dev)
  571. {
  572. if (!dev->is_physfn)
  573. return IRQ_NONE;
  574. return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
  575. }
  576. EXPORT_SYMBOL_GPL(pci_sriov_migration);
  577. /**
  578. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  579. * @dev: the PCI device
  580. *
  581. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  582. */
  583. int pci_num_vf(struct pci_dev *dev)
  584. {
  585. if (!dev->is_physfn)
  586. return 0;
  587. return dev->sriov->num_VFs;
  588. }
  589. EXPORT_SYMBOL_GPL(pci_num_vf);
  590. /**
  591. * pci_vfs_assigned - returns number of VFs are assigned to a guest
  592. * @dev: the PCI device
  593. *
  594. * Returns number of VFs belonging to this device that are assigned to a guest.
  595. * If device is not a physical function returns 0.
  596. */
  597. int pci_vfs_assigned(struct pci_dev *dev)
  598. {
  599. struct pci_dev *vfdev;
  600. unsigned int vfs_assigned = 0;
  601. unsigned short dev_id;
  602. /* only search if we are a PF */
  603. if (!dev->is_physfn)
  604. return 0;
  605. /*
  606. * determine the device ID for the VFs, the vendor ID will be the
  607. * same as the PF so there is no need to check for that one
  608. */
  609. pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
  610. /* loop through all the VFs to see if we own any that are assigned */
  611. vfdev = pci_get_device(dev->vendor, dev_id, NULL);
  612. while (vfdev) {
  613. /*
  614. * It is considered assigned if it is a virtual function with
  615. * our dev as the physical function and the assigned bit is set
  616. */
  617. if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
  618. (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
  619. vfs_assigned++;
  620. vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
  621. }
  622. return vfs_assigned;
  623. }
  624. EXPORT_SYMBOL_GPL(pci_vfs_assigned);
  625. /**
  626. * pci_sriov_set_totalvfs -- reduce the TotalVFs available
  627. * @dev: the PCI PF device
  628. * @numvfs: number that should be used for TotalVFs supported
  629. *
  630. * Should be called from PF driver's probe routine with
  631. * device's mutex held.
  632. *
  633. * Returns 0 if PF is an SRIOV-capable device and
  634. * value of numvfs valid. If not a PF return -ENOSYS;
  635. * if numvfs is invalid return -EINVAL;
  636. * if VFs already enabled, return -EBUSY.
  637. */
  638. int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
  639. {
  640. if (!dev->is_physfn)
  641. return -ENOSYS;
  642. if (numvfs > dev->sriov->total_VFs)
  643. return -EINVAL;
  644. /* Shouldn't change if VFs already enabled */
  645. if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
  646. return -EBUSY;
  647. else
  648. dev->sriov->driver_max_VFs = numvfs;
  649. return 0;
  650. }
  651. EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
  652. /**
  653. * pci_sriov_get_totalvfs -- get total VFs supported on this device
  654. * @dev: the PCI PF device
  655. *
  656. * For a PCIe device with SRIOV support, return the PCIe
  657. * SRIOV capability value of TotalVFs or the value of driver_max_VFs
  658. * if the driver reduced it. Otherwise 0.
  659. */
  660. int pci_sriov_get_totalvfs(struct pci_dev *dev)
  661. {
  662. if (!dev->is_physfn)
  663. return 0;
  664. if (dev->sriov->driver_max_VFs)
  665. return dev->sriov->driver_max_VFs;
  666. return dev->sriov->total_VFs;
  667. }
  668. EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);