tmio_mmc_pio.c 30 KB

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  1. /*
  2. * linux/drivers/mmc/host/tmio_mmc_pio.c
  3. *
  4. * Copyright (C) 2011 Guennadi Liakhovetski
  5. * Copyright (C) 2007 Ian Molton
  6. * Copyright (C) 2004 Ian Molton
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Driver for the MMC / SD / SDIO IP found in:
  13. *
  14. * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
  15. *
  16. * This driver draws mainly on scattered spec sheets, Reverse engineering
  17. * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
  18. * support). (Further 4 bit support from a later datasheet).
  19. *
  20. * TODO:
  21. * Investigate using a workqueue for PIO transfers
  22. * Eliminate FIXMEs
  23. * SDIO support
  24. * Better Power management
  25. * Handle MMC errors better
  26. * double buffer support
  27. *
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/device.h>
  31. #include <linux/highmem.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/io.h>
  34. #include <linux/irq.h>
  35. #include <linux/mfd/tmio.h>
  36. #include <linux/mmc/host.h>
  37. #include <linux/mmc/mmc.h>
  38. #include <linux/mmc/slot-gpio.h>
  39. #include <linux/mmc/tmio.h>
  40. #include <linux/module.h>
  41. #include <linux/pagemap.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/pm_qos.h>
  44. #include <linux/pm_runtime.h>
  45. #include <linux/regulator/consumer.h>
  46. #include <linux/scatterlist.h>
  47. #include <linux/spinlock.h>
  48. #include <linux/workqueue.h>
  49. #include "tmio_mmc.h"
  50. void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  51. {
  52. host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
  53. sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
  54. }
  55. void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  56. {
  57. host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
  58. sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
  59. }
  60. static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  61. {
  62. sd_ctrl_write32(host, CTL_STATUS, ~i);
  63. }
  64. static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
  65. {
  66. host->sg_len = data->sg_len;
  67. host->sg_ptr = data->sg;
  68. host->sg_orig = data->sg;
  69. host->sg_off = 0;
  70. }
  71. static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
  72. {
  73. host->sg_ptr = sg_next(host->sg_ptr);
  74. host->sg_off = 0;
  75. return --host->sg_len;
  76. }
  77. #ifdef CONFIG_MMC_DEBUG
  78. #define STATUS_TO_TEXT(a, status, i) \
  79. do { \
  80. if (status & TMIO_STAT_##a) { \
  81. if (i++) \
  82. printk(" | "); \
  83. printk(#a); \
  84. } \
  85. } while (0)
  86. static void pr_debug_status(u32 status)
  87. {
  88. int i = 0;
  89. pr_debug("status: %08x = ", status);
  90. STATUS_TO_TEXT(CARD_REMOVE, status, i);
  91. STATUS_TO_TEXT(CARD_INSERT, status, i);
  92. STATUS_TO_TEXT(SIGSTATE, status, i);
  93. STATUS_TO_TEXT(WRPROTECT, status, i);
  94. STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
  95. STATUS_TO_TEXT(CARD_INSERT_A, status, i);
  96. STATUS_TO_TEXT(SIGSTATE_A, status, i);
  97. STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
  98. STATUS_TO_TEXT(STOPBIT_ERR, status, i);
  99. STATUS_TO_TEXT(ILL_FUNC, status, i);
  100. STATUS_TO_TEXT(CMD_BUSY, status, i);
  101. STATUS_TO_TEXT(CMDRESPEND, status, i);
  102. STATUS_TO_TEXT(DATAEND, status, i);
  103. STATUS_TO_TEXT(CRCFAIL, status, i);
  104. STATUS_TO_TEXT(DATATIMEOUT, status, i);
  105. STATUS_TO_TEXT(CMDTIMEOUT, status, i);
  106. STATUS_TO_TEXT(RXOVERFLOW, status, i);
  107. STATUS_TO_TEXT(TXUNDERRUN, status, i);
  108. STATUS_TO_TEXT(RXRDY, status, i);
  109. STATUS_TO_TEXT(TXRQ, status, i);
  110. STATUS_TO_TEXT(ILL_ACCESS, status, i);
  111. printk("\n");
  112. }
  113. #else
  114. #define pr_debug_status(s) do { } while (0)
  115. #endif
  116. static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
  117. {
  118. struct tmio_mmc_host *host = mmc_priv(mmc);
  119. if (enable) {
  120. host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
  121. ~TMIO_SDIO_STAT_IOIRQ;
  122. sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
  123. sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
  124. } else {
  125. host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
  126. sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
  127. sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
  128. }
  129. }
  130. static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
  131. {
  132. u32 clk = 0, clock;
  133. if (new_clock) {
  134. for (clock = host->mmc->f_min, clk = 0x80000080;
  135. new_clock >= (clock<<1); clk >>= 1)
  136. clock <<= 1;
  137. clk |= 0x100;
  138. }
  139. if (host->set_clk_div)
  140. host->set_clk_div(host->pdev, (clk>>22) & 1);
  141. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
  142. msleep(10);
  143. }
  144. static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
  145. {
  146. struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
  147. /* implicit BUG_ON(!res) */
  148. if (resource_size(res) > 0x100) {
  149. sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
  150. msleep(10);
  151. }
  152. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
  153. sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  154. msleep(10);
  155. }
  156. static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
  157. {
  158. struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
  159. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
  160. sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  161. msleep(10);
  162. /* implicit BUG_ON(!res) */
  163. if (resource_size(res) > 0x100) {
  164. sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
  165. msleep(10);
  166. }
  167. }
  168. static void tmio_mmc_reset(struct tmio_mmc_host *host)
  169. {
  170. struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
  171. /* FIXME - should we set stop clock reg here */
  172. sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
  173. /* implicit BUG_ON(!res) */
  174. if (resource_size(res) > 0x100)
  175. sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
  176. msleep(10);
  177. sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
  178. if (resource_size(res) > 0x100)
  179. sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
  180. msleep(10);
  181. }
  182. static void tmio_mmc_reset_work(struct work_struct *work)
  183. {
  184. struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
  185. delayed_reset_work.work);
  186. struct mmc_request *mrq;
  187. unsigned long flags;
  188. spin_lock_irqsave(&host->lock, flags);
  189. mrq = host->mrq;
  190. /*
  191. * is request already finished? Since we use a non-blocking
  192. * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
  193. * us, so, have to check for IS_ERR(host->mrq)
  194. */
  195. if (IS_ERR_OR_NULL(mrq)
  196. || time_is_after_jiffies(host->last_req_ts +
  197. msecs_to_jiffies(2000))) {
  198. spin_unlock_irqrestore(&host->lock, flags);
  199. return;
  200. }
  201. dev_warn(&host->pdev->dev,
  202. "timeout waiting for hardware interrupt (CMD%u)\n",
  203. mrq->cmd->opcode);
  204. if (host->data)
  205. host->data->error = -ETIMEDOUT;
  206. else if (host->cmd)
  207. host->cmd->error = -ETIMEDOUT;
  208. else
  209. mrq->cmd->error = -ETIMEDOUT;
  210. host->cmd = NULL;
  211. host->data = NULL;
  212. host->force_pio = false;
  213. spin_unlock_irqrestore(&host->lock, flags);
  214. tmio_mmc_reset(host);
  215. /* Ready for new calls */
  216. host->mrq = NULL;
  217. tmio_mmc_abort_dma(host);
  218. mmc_request_done(host->mmc, mrq);
  219. }
  220. /* called with host->lock held, interrupts disabled */
  221. static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
  222. {
  223. struct mmc_request *mrq;
  224. unsigned long flags;
  225. spin_lock_irqsave(&host->lock, flags);
  226. mrq = host->mrq;
  227. if (IS_ERR_OR_NULL(mrq)) {
  228. spin_unlock_irqrestore(&host->lock, flags);
  229. return;
  230. }
  231. host->cmd = NULL;
  232. host->data = NULL;
  233. host->force_pio = false;
  234. cancel_delayed_work(&host->delayed_reset_work);
  235. host->mrq = NULL;
  236. spin_unlock_irqrestore(&host->lock, flags);
  237. if (mrq->cmd->error || (mrq->data && mrq->data->error))
  238. tmio_mmc_abort_dma(host);
  239. mmc_request_done(host->mmc, mrq);
  240. }
  241. static void tmio_mmc_done_work(struct work_struct *work)
  242. {
  243. struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
  244. done);
  245. tmio_mmc_finish_request(host);
  246. }
  247. /* These are the bitmasks the tmio chip requires to implement the MMC response
  248. * types. Note that R1 and R6 are the same in this scheme. */
  249. #define APP_CMD 0x0040
  250. #define RESP_NONE 0x0300
  251. #define RESP_R1 0x0400
  252. #define RESP_R1B 0x0500
  253. #define RESP_R2 0x0600
  254. #define RESP_R3 0x0700
  255. #define DATA_PRESENT 0x0800
  256. #define TRANSFER_READ 0x1000
  257. #define TRANSFER_MULTI 0x2000
  258. #define SECURITY_CMD 0x4000
  259. static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
  260. {
  261. struct mmc_data *data = host->data;
  262. int c = cmd->opcode;
  263. u32 irq_mask = TMIO_MASK_CMD;
  264. /* CMD12 is handled by hardware */
  265. if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
  266. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
  267. return 0;
  268. }
  269. switch (mmc_resp_type(cmd)) {
  270. case MMC_RSP_NONE: c |= RESP_NONE; break;
  271. case MMC_RSP_R1: c |= RESP_R1; break;
  272. case MMC_RSP_R1B: c |= RESP_R1B; break;
  273. case MMC_RSP_R2: c |= RESP_R2; break;
  274. case MMC_RSP_R3: c |= RESP_R3; break;
  275. default:
  276. pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
  277. return -EINVAL;
  278. }
  279. host->cmd = cmd;
  280. /* FIXME - this seems to be ok commented out but the spec suggest this bit
  281. * should be set when issuing app commands.
  282. * if(cmd->flags & MMC_FLAG_ACMD)
  283. * c |= APP_CMD;
  284. */
  285. if (data) {
  286. c |= DATA_PRESENT;
  287. if (data->blocks > 1) {
  288. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
  289. c |= TRANSFER_MULTI;
  290. }
  291. if (data->flags & MMC_DATA_READ)
  292. c |= TRANSFER_READ;
  293. }
  294. if (!host->native_hotplug)
  295. irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
  296. tmio_mmc_enable_mmc_irqs(host, irq_mask);
  297. /* Fire off the command */
  298. sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
  299. sd_ctrl_write16(host, CTL_SD_CMD, c);
  300. return 0;
  301. }
  302. /*
  303. * This chip always returns (at least?) as much data as you ask for.
  304. * I'm unsure what happens if you ask for less than a block. This should be
  305. * looked into to ensure that a funny length read doesn't hose the controller.
  306. */
  307. static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
  308. {
  309. struct mmc_data *data = host->data;
  310. void *sg_virt;
  311. unsigned short *buf;
  312. unsigned int count;
  313. unsigned long flags;
  314. if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
  315. pr_err("PIO IRQ in DMA mode!\n");
  316. return;
  317. } else if (!data) {
  318. pr_debug("Spurious PIO IRQ\n");
  319. return;
  320. }
  321. sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
  322. buf = (unsigned short *)(sg_virt + host->sg_off);
  323. count = host->sg_ptr->length - host->sg_off;
  324. if (count > data->blksz)
  325. count = data->blksz;
  326. pr_debug("count: %08x offset: %08x flags %08x\n",
  327. count, host->sg_off, data->flags);
  328. /* Transfer the data */
  329. if (data->flags & MMC_DATA_READ)
  330. sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  331. else
  332. sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  333. host->sg_off += count;
  334. tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
  335. if (host->sg_off == host->sg_ptr->length)
  336. tmio_mmc_next_sg(host);
  337. return;
  338. }
  339. static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
  340. {
  341. if (host->sg_ptr == &host->bounce_sg) {
  342. unsigned long flags;
  343. void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
  344. memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
  345. tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
  346. }
  347. }
  348. /* needs to be called with host->lock held */
  349. void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
  350. {
  351. struct mmc_data *data = host->data;
  352. struct mmc_command *stop;
  353. host->data = NULL;
  354. if (!data) {
  355. dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
  356. return;
  357. }
  358. stop = data->stop;
  359. /* FIXME - return correct transfer count on errors */
  360. if (!data->error)
  361. data->bytes_xfered = data->blocks * data->blksz;
  362. else
  363. data->bytes_xfered = 0;
  364. pr_debug("Completed data request\n");
  365. /*
  366. * FIXME: other drivers allow an optional stop command of any given type
  367. * which we dont do, as the chip can auto generate them.
  368. * Perhaps we can be smarter about when to use auto CMD12 and
  369. * only issue the auto request when we know this is the desired
  370. * stop command, allowing fallback to the stop command the
  371. * upper layers expect. For now, we do what works.
  372. */
  373. if (data->flags & MMC_DATA_READ) {
  374. if (host->chan_rx && !host->force_pio)
  375. tmio_mmc_check_bounce_buffer(host);
  376. dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
  377. host->mrq);
  378. } else {
  379. dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
  380. host->mrq);
  381. }
  382. if (stop) {
  383. if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
  384. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
  385. else
  386. BUG();
  387. }
  388. schedule_work(&host->done);
  389. }
  390. static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
  391. {
  392. struct mmc_data *data;
  393. spin_lock(&host->lock);
  394. data = host->data;
  395. if (!data)
  396. goto out;
  397. if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
  398. /*
  399. * Has all data been written out yet? Testing on SuperH showed,
  400. * that in most cases the first interrupt comes already with the
  401. * BUSY status bit clear, but on some operations, like mount or
  402. * in the beginning of a write / sync / umount, there is one
  403. * DATAEND interrupt with the BUSY bit set, in this cases
  404. * waiting for one more interrupt fixes the problem.
  405. */
  406. if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
  407. tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
  408. tasklet_schedule(&host->dma_complete);
  409. }
  410. } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
  411. tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
  412. tasklet_schedule(&host->dma_complete);
  413. } else {
  414. tmio_mmc_do_data_irq(host);
  415. tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
  416. }
  417. out:
  418. spin_unlock(&host->lock);
  419. }
  420. static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
  421. unsigned int stat)
  422. {
  423. struct mmc_command *cmd = host->cmd;
  424. int i, addr;
  425. spin_lock(&host->lock);
  426. if (!host->cmd) {
  427. pr_debug("Spurious CMD irq\n");
  428. goto out;
  429. }
  430. host->cmd = NULL;
  431. /* This controller is sicker than the PXA one. Not only do we need to
  432. * drop the top 8 bits of the first response word, we also need to
  433. * modify the order of the response for short response command types.
  434. */
  435. for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
  436. cmd->resp[i] = sd_ctrl_read32(host, addr);
  437. if (cmd->flags & MMC_RSP_136) {
  438. cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
  439. cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
  440. cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
  441. cmd->resp[3] <<= 8;
  442. } else if (cmd->flags & MMC_RSP_R3) {
  443. cmd->resp[0] = cmd->resp[3];
  444. }
  445. if (stat & TMIO_STAT_CMDTIMEOUT)
  446. cmd->error = -ETIMEDOUT;
  447. else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
  448. cmd->error = -EILSEQ;
  449. /* If there is data to handle we enable data IRQs here, and
  450. * we will ultimatley finish the request in the data_end handler.
  451. * If theres no data or we encountered an error, finish now.
  452. */
  453. if (host->data && !cmd->error) {
  454. if (host->data->flags & MMC_DATA_READ) {
  455. if (host->force_pio || !host->chan_rx)
  456. tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
  457. else
  458. tasklet_schedule(&host->dma_issue);
  459. } else {
  460. if (host->force_pio || !host->chan_tx)
  461. tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
  462. else
  463. tasklet_schedule(&host->dma_issue);
  464. }
  465. } else {
  466. schedule_work(&host->done);
  467. }
  468. out:
  469. spin_unlock(&host->lock);
  470. }
  471. static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
  472. int *ireg, int *status)
  473. {
  474. *status = sd_ctrl_read32(host, CTL_STATUS);
  475. *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
  476. pr_debug_status(*status);
  477. pr_debug_status(*ireg);
  478. }
  479. static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
  480. int ireg, int status)
  481. {
  482. struct mmc_host *mmc = host->mmc;
  483. /* Card insert / remove attempts */
  484. if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
  485. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
  486. TMIO_STAT_CARD_REMOVE);
  487. if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
  488. ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
  489. !work_pending(&mmc->detect.work))
  490. mmc_detect_change(host->mmc, msecs_to_jiffies(100));
  491. return true;
  492. }
  493. return false;
  494. }
  495. irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
  496. {
  497. unsigned int ireg, status;
  498. struct tmio_mmc_host *host = devid;
  499. tmio_mmc_card_irq_status(host, &ireg, &status);
  500. __tmio_mmc_card_detect_irq(host, ireg, status);
  501. return IRQ_HANDLED;
  502. }
  503. EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
  504. static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
  505. int ireg, int status)
  506. {
  507. /* Command completion */
  508. if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
  509. tmio_mmc_ack_mmc_irqs(host,
  510. TMIO_STAT_CMDRESPEND |
  511. TMIO_STAT_CMDTIMEOUT);
  512. tmio_mmc_cmd_irq(host, status);
  513. return true;
  514. }
  515. /* Data transfer */
  516. if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
  517. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
  518. tmio_mmc_pio_irq(host);
  519. return true;
  520. }
  521. /* Data transfer completion */
  522. if (ireg & TMIO_STAT_DATAEND) {
  523. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
  524. tmio_mmc_data_irq(host);
  525. return true;
  526. }
  527. return false;
  528. }
  529. irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
  530. {
  531. unsigned int ireg, status;
  532. struct tmio_mmc_host *host = devid;
  533. tmio_mmc_card_irq_status(host, &ireg, &status);
  534. __tmio_mmc_sdcard_irq(host, ireg, status);
  535. return IRQ_HANDLED;
  536. }
  537. EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
  538. irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
  539. {
  540. struct tmio_mmc_host *host = devid;
  541. struct mmc_host *mmc = host->mmc;
  542. struct tmio_mmc_data *pdata = host->pdata;
  543. unsigned int ireg, status;
  544. if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
  545. return IRQ_HANDLED;
  546. status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
  547. ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
  548. sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
  549. if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
  550. mmc_signal_sdio_irq(mmc);
  551. return IRQ_HANDLED;
  552. }
  553. EXPORT_SYMBOL(tmio_mmc_sdio_irq);
  554. irqreturn_t tmio_mmc_irq(int irq, void *devid)
  555. {
  556. struct tmio_mmc_host *host = devid;
  557. unsigned int ireg, status;
  558. pr_debug("MMC IRQ begin\n");
  559. tmio_mmc_card_irq_status(host, &ireg, &status);
  560. if (__tmio_mmc_card_detect_irq(host, ireg, status))
  561. return IRQ_HANDLED;
  562. if (__tmio_mmc_sdcard_irq(host, ireg, status))
  563. return IRQ_HANDLED;
  564. tmio_mmc_sdio_irq(irq, devid);
  565. return IRQ_HANDLED;
  566. }
  567. EXPORT_SYMBOL(tmio_mmc_irq);
  568. static int tmio_mmc_start_data(struct tmio_mmc_host *host,
  569. struct mmc_data *data)
  570. {
  571. struct tmio_mmc_data *pdata = host->pdata;
  572. pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
  573. data->blksz, data->blocks);
  574. /* Some hardware cannot perform 2 byte requests in 4 bit mode */
  575. if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
  576. int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
  577. if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
  578. pr_err("%s: %d byte block unsupported in 4 bit mode\n",
  579. mmc_hostname(host->mmc), data->blksz);
  580. return -EINVAL;
  581. }
  582. }
  583. tmio_mmc_init_sg(host, data);
  584. host->data = data;
  585. /* Set transfer length / blocksize */
  586. sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
  587. sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
  588. tmio_mmc_start_dma(host, data);
  589. return 0;
  590. }
  591. /* Process requests from the MMC layer */
  592. static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  593. {
  594. struct tmio_mmc_host *host = mmc_priv(mmc);
  595. unsigned long flags;
  596. int ret;
  597. spin_lock_irqsave(&host->lock, flags);
  598. if (host->mrq) {
  599. pr_debug("request not null\n");
  600. if (IS_ERR(host->mrq)) {
  601. spin_unlock_irqrestore(&host->lock, flags);
  602. mrq->cmd->error = -EAGAIN;
  603. mmc_request_done(mmc, mrq);
  604. return;
  605. }
  606. }
  607. host->last_req_ts = jiffies;
  608. wmb();
  609. host->mrq = mrq;
  610. spin_unlock_irqrestore(&host->lock, flags);
  611. if (mrq->data) {
  612. ret = tmio_mmc_start_data(host, mrq->data);
  613. if (ret)
  614. goto fail;
  615. }
  616. ret = tmio_mmc_start_command(host, mrq->cmd);
  617. if (!ret) {
  618. schedule_delayed_work(&host->delayed_reset_work,
  619. msecs_to_jiffies(2000));
  620. return;
  621. }
  622. fail:
  623. host->force_pio = false;
  624. host->mrq = NULL;
  625. mrq->cmd->error = ret;
  626. mmc_request_done(mmc, mrq);
  627. }
  628. static int tmio_mmc_clk_update(struct mmc_host *mmc)
  629. {
  630. struct tmio_mmc_host *host = mmc_priv(mmc);
  631. struct tmio_mmc_data *pdata = host->pdata;
  632. int ret;
  633. if (!pdata->clk_enable)
  634. return -ENOTSUPP;
  635. ret = pdata->clk_enable(host->pdev, &mmc->f_max);
  636. if (!ret)
  637. mmc->f_min = mmc->f_max / 512;
  638. return ret;
  639. }
  640. static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
  641. {
  642. struct mmc_host *mmc = host->mmc;
  643. int ret = 0;
  644. /* .set_ios() is returning void, so, no chance to report an error */
  645. if (host->set_pwr)
  646. host->set_pwr(host->pdev, 1);
  647. if (!IS_ERR(mmc->supply.vmmc)) {
  648. ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
  649. /*
  650. * Attention: empiric value. With a b43 WiFi SDIO card this
  651. * delay proved necessary for reliable card-insertion probing.
  652. * 100us were not enough. Is this the same 140us delay, as in
  653. * tmio_mmc_set_ios()?
  654. */
  655. udelay(200);
  656. }
  657. /*
  658. * It seems, VccQ should be switched on after Vcc, this is also what the
  659. * omap_hsmmc.c driver does.
  660. */
  661. if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
  662. ret = regulator_enable(mmc->supply.vqmmc);
  663. udelay(200);
  664. }
  665. if (ret < 0)
  666. dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
  667. ret);
  668. }
  669. static void tmio_mmc_power_off(struct tmio_mmc_host *host)
  670. {
  671. struct mmc_host *mmc = host->mmc;
  672. if (!IS_ERR(mmc->supply.vqmmc))
  673. regulator_disable(mmc->supply.vqmmc);
  674. if (!IS_ERR(mmc->supply.vmmc))
  675. mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
  676. if (host->set_pwr)
  677. host->set_pwr(host->pdev, 0);
  678. }
  679. /* Set MMC clock / power.
  680. * Note: This controller uses a simple divider scheme therefore it cannot
  681. * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
  682. * MMC wont run that fast, it has to be clocked at 12MHz which is the next
  683. * slowest setting.
  684. */
  685. static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  686. {
  687. struct tmio_mmc_host *host = mmc_priv(mmc);
  688. struct device *dev = &host->pdev->dev;
  689. unsigned long flags;
  690. mutex_lock(&host->ios_lock);
  691. spin_lock_irqsave(&host->lock, flags);
  692. if (host->mrq) {
  693. if (IS_ERR(host->mrq)) {
  694. dev_dbg(dev,
  695. "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
  696. current->comm, task_pid_nr(current),
  697. ios->clock, ios->power_mode);
  698. host->mrq = ERR_PTR(-EINTR);
  699. } else {
  700. dev_dbg(dev,
  701. "%s.%d: CMD%u active since %lu, now %lu!\n",
  702. current->comm, task_pid_nr(current),
  703. host->mrq->cmd->opcode, host->last_req_ts, jiffies);
  704. }
  705. spin_unlock_irqrestore(&host->lock, flags);
  706. mutex_unlock(&host->ios_lock);
  707. return;
  708. }
  709. host->mrq = ERR_PTR(-EBUSY);
  710. spin_unlock_irqrestore(&host->lock, flags);
  711. /*
  712. * host->power toggles between false and true in both cases - either
  713. * or not the controller can be runtime-suspended during inactivity.
  714. * But if the controller has to be kept on, the runtime-pm usage_count
  715. * is kept positive, so no suspending actually takes place.
  716. */
  717. if (ios->power_mode == MMC_POWER_ON && ios->clock) {
  718. if (host->power != TMIO_MMC_ON_RUN) {
  719. tmio_mmc_clk_update(mmc);
  720. pm_runtime_get_sync(dev);
  721. if (host->resuming) {
  722. tmio_mmc_reset(host);
  723. host->resuming = false;
  724. }
  725. }
  726. if (host->power == TMIO_MMC_OFF_STOP)
  727. tmio_mmc_reset(host);
  728. tmio_mmc_set_clock(host, ios->clock);
  729. if (host->power == TMIO_MMC_OFF_STOP)
  730. /* power up SD card and the bus */
  731. tmio_mmc_power_on(host, ios->vdd);
  732. host->power = TMIO_MMC_ON_RUN;
  733. /* start bus clock */
  734. tmio_mmc_clk_start(host);
  735. } else if (ios->power_mode != MMC_POWER_UP) {
  736. struct tmio_mmc_data *pdata = host->pdata;
  737. unsigned int old_power = host->power;
  738. if (old_power != TMIO_MMC_OFF_STOP) {
  739. if (ios->power_mode == MMC_POWER_OFF) {
  740. tmio_mmc_power_off(host);
  741. host->power = TMIO_MMC_OFF_STOP;
  742. } else {
  743. host->power = TMIO_MMC_ON_STOP;
  744. }
  745. }
  746. if (old_power == TMIO_MMC_ON_RUN) {
  747. tmio_mmc_clk_stop(host);
  748. pm_runtime_put(dev);
  749. if (pdata->clk_disable)
  750. pdata->clk_disable(host->pdev);
  751. }
  752. }
  753. if (host->power != TMIO_MMC_OFF_STOP) {
  754. switch (ios->bus_width) {
  755. case MMC_BUS_WIDTH_1:
  756. sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
  757. break;
  758. case MMC_BUS_WIDTH_4:
  759. sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
  760. break;
  761. }
  762. }
  763. /* Let things settle. delay taken from winCE driver */
  764. udelay(140);
  765. if (PTR_ERR(host->mrq) == -EINTR)
  766. dev_dbg(&host->pdev->dev,
  767. "%s.%d: IOS interrupted: clk %u, mode %u",
  768. current->comm, task_pid_nr(current),
  769. ios->clock, ios->power_mode);
  770. host->mrq = NULL;
  771. mutex_unlock(&host->ios_lock);
  772. }
  773. static int tmio_mmc_get_ro(struct mmc_host *mmc)
  774. {
  775. struct tmio_mmc_host *host = mmc_priv(mmc);
  776. struct tmio_mmc_data *pdata = host->pdata;
  777. int ret = mmc_gpio_get_ro(mmc);
  778. if (ret >= 0)
  779. return ret;
  780. return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
  781. (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
  782. }
  783. static const struct mmc_host_ops tmio_mmc_ops = {
  784. .request = tmio_mmc_request,
  785. .set_ios = tmio_mmc_set_ios,
  786. .get_ro = tmio_mmc_get_ro,
  787. .get_cd = mmc_gpio_get_cd,
  788. .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
  789. };
  790. static void tmio_mmc_init_ocr(struct tmio_mmc_host *host)
  791. {
  792. struct tmio_mmc_data *pdata = host->pdata;
  793. struct mmc_host *mmc = host->mmc;
  794. mmc_regulator_get_supply(mmc);
  795. if (!mmc->ocr_avail)
  796. mmc->ocr_avail = pdata->ocr_mask ? : MMC_VDD_32_33 | MMC_VDD_33_34;
  797. else if (pdata->ocr_mask)
  798. dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n");
  799. }
  800. static void tmio_mmc_of_parse(struct platform_device *pdev,
  801. struct tmio_mmc_data *pdata)
  802. {
  803. const struct device_node *np = pdev->dev.of_node;
  804. if (!np)
  805. return;
  806. if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
  807. pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
  808. }
  809. int tmio_mmc_host_probe(struct tmio_mmc_host **host,
  810. struct platform_device *pdev,
  811. struct tmio_mmc_data *pdata)
  812. {
  813. struct tmio_mmc_host *_host;
  814. struct mmc_host *mmc;
  815. struct resource *res_ctl;
  816. int ret;
  817. u32 irq_mask = TMIO_MASK_CMD;
  818. tmio_mmc_of_parse(pdev, pdata);
  819. if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
  820. pdata->write16_hook = NULL;
  821. res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  822. if (!res_ctl)
  823. return -EINVAL;
  824. mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
  825. if (!mmc)
  826. return -ENOMEM;
  827. ret = mmc_of_parse(mmc);
  828. if (ret < 0)
  829. goto host_free;
  830. pdata->dev = &pdev->dev;
  831. _host = mmc_priv(mmc);
  832. _host->pdata = pdata;
  833. _host->mmc = mmc;
  834. _host->pdev = pdev;
  835. platform_set_drvdata(pdev, mmc);
  836. _host->set_pwr = pdata->set_pwr;
  837. _host->set_clk_div = pdata->set_clk_div;
  838. /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
  839. _host->bus_shift = resource_size(res_ctl) >> 10;
  840. _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
  841. if (!_host->ctl) {
  842. ret = -ENOMEM;
  843. goto host_free;
  844. }
  845. mmc->ops = &tmio_mmc_ops;
  846. mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
  847. mmc->caps2 = pdata->capabilities2;
  848. mmc->max_segs = 32;
  849. mmc->max_blk_size = 512;
  850. mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
  851. mmc->max_segs;
  852. mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
  853. mmc->max_seg_size = mmc->max_req_size;
  854. tmio_mmc_init_ocr(_host);
  855. _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
  856. mmc->caps & MMC_CAP_NEEDS_POLL ||
  857. mmc->caps & MMC_CAP_NONREMOVABLE ||
  858. mmc->slot.cd_irq >= 0);
  859. _host->power = TMIO_MMC_OFF_STOP;
  860. pm_runtime_enable(&pdev->dev);
  861. ret = pm_runtime_resume(&pdev->dev);
  862. if (ret < 0)
  863. goto pm_disable;
  864. if (tmio_mmc_clk_update(mmc) < 0) {
  865. mmc->f_max = pdata->hclk;
  866. mmc->f_min = mmc->f_max / 512;
  867. }
  868. /*
  869. * There are 4 different scenarios for the card detection:
  870. * 1) an external gpio irq handles the cd (best for power savings)
  871. * 2) internal sdhi irq handles the cd
  872. * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
  873. * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
  874. *
  875. * While we increment the runtime PM counter for all scenarios when
  876. * the mmc core activates us by calling an appropriate set_ios(), we
  877. * must additionally ensure that in case 2) the tmio mmc hardware stays
  878. * powered on during runtime for the card detection to work.
  879. */
  880. if (_host->native_hotplug)
  881. pm_runtime_get_noresume(&pdev->dev);
  882. tmio_mmc_clk_stop(_host);
  883. tmio_mmc_reset(_host);
  884. _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
  885. tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
  886. /* Unmask the IRQs we want to know about */
  887. if (!_host->chan_rx)
  888. irq_mask |= TMIO_MASK_READOP;
  889. if (!_host->chan_tx)
  890. irq_mask |= TMIO_MASK_WRITEOP;
  891. if (!_host->native_hotplug)
  892. irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
  893. _host->sdcard_irq_mask &= ~irq_mask;
  894. if (pdata->flags & TMIO_MMC_SDIO_IRQ)
  895. tmio_mmc_enable_sdio_irq(mmc, 0);
  896. spin_lock_init(&_host->lock);
  897. mutex_init(&_host->ios_lock);
  898. /* Init delayed work for request timeouts */
  899. INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
  900. INIT_WORK(&_host->done, tmio_mmc_done_work);
  901. /* See if we also get DMA */
  902. tmio_mmc_request_dma(_host, pdata);
  903. ret = mmc_add_host(mmc);
  904. if (pdata->clk_disable)
  905. pdata->clk_disable(pdev);
  906. if (ret < 0) {
  907. tmio_mmc_host_remove(_host);
  908. return ret;
  909. }
  910. dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
  911. if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
  912. ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
  913. if (ret < 0) {
  914. tmio_mmc_host_remove(_host);
  915. return ret;
  916. }
  917. }
  918. *host = _host;
  919. return 0;
  920. pm_disable:
  921. pm_runtime_disable(&pdev->dev);
  922. iounmap(_host->ctl);
  923. host_free:
  924. mmc_free_host(mmc);
  925. return ret;
  926. }
  927. EXPORT_SYMBOL(tmio_mmc_host_probe);
  928. void tmio_mmc_host_remove(struct tmio_mmc_host *host)
  929. {
  930. struct platform_device *pdev = host->pdev;
  931. struct mmc_host *mmc = host->mmc;
  932. if (!host->native_hotplug)
  933. pm_runtime_get_sync(&pdev->dev);
  934. dev_pm_qos_hide_latency_limit(&pdev->dev);
  935. mmc_remove_host(mmc);
  936. cancel_work_sync(&host->done);
  937. cancel_delayed_work_sync(&host->delayed_reset_work);
  938. tmio_mmc_release_dma(host);
  939. pm_runtime_put_sync(&pdev->dev);
  940. pm_runtime_disable(&pdev->dev);
  941. iounmap(host->ctl);
  942. mmc_free_host(mmc);
  943. }
  944. EXPORT_SYMBOL(tmio_mmc_host_remove);
  945. #ifdef CONFIG_PM
  946. int tmio_mmc_host_suspend(struct device *dev)
  947. {
  948. struct mmc_host *mmc = dev_get_drvdata(dev);
  949. struct tmio_mmc_host *host = mmc_priv(mmc);
  950. int ret = mmc_suspend_host(mmc);
  951. if (!ret)
  952. tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
  953. return ret;
  954. }
  955. EXPORT_SYMBOL(tmio_mmc_host_suspend);
  956. int tmio_mmc_host_resume(struct device *dev)
  957. {
  958. struct mmc_host *mmc = dev_get_drvdata(dev);
  959. struct tmio_mmc_host *host = mmc_priv(mmc);
  960. tmio_mmc_enable_dma(host, true);
  961. /* The MMC core will perform the complete set up */
  962. host->resuming = true;
  963. return mmc_resume_host(mmc);
  964. }
  965. EXPORT_SYMBOL(tmio_mmc_host_resume);
  966. #endif /* CONFIG_PM */
  967. int tmio_mmc_host_runtime_suspend(struct device *dev)
  968. {
  969. return 0;
  970. }
  971. EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
  972. int tmio_mmc_host_runtime_resume(struct device *dev)
  973. {
  974. struct mmc_host *mmc = dev_get_drvdata(dev);
  975. struct tmio_mmc_host *host = mmc_priv(mmc);
  976. tmio_mmc_enable_dma(host, true);
  977. return 0;
  978. }
  979. EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
  980. MODULE_LICENSE("GPL v2");